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3 µm lithography process
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basic wafer drawing.svg Semiconductor lithography processes technology
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The 3 μm lithography process was the semiconductor process technology used by some semiconductor companies during the mid 1970s to the mid 1980s.

Industry

Fab
Process Name​
1st Production​
 ​
Contacted Gate Pitch​
Interconnect Pitch (M1P)​
SRAM bit cell
Hitachi
Hi-CMOS I
 ?
Value
3 µm
3 µm
 ? µm²

3 μm Microprocessors

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3 μm Microcontrollers

3 μm Chips

References

  • Meguro, S., et al. "Hi-CMOS III technology." Electron Devices Meeting, 1984 International. IEEE, 1984.
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