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Difference between revisions of "3 µm lithography process"

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== Industry ==
 
== Industry ==
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{{scrolling table/top|style=text-align: right; | first=Fab
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|Process Name
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|1st Production
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| 
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|Contacted Gate Pitch
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|Interconnect Pitch (M1P)
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|SRAM bit cell
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}}
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{{scrolling table/mid}}
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|-
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! [[Hitachi]]
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|- style="text-align: center;"
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|  Hi-CMOS I
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|- style="text-align: center;"
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| ?
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|-
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! Value
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|-
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| 3 µm
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|-
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| 3 µm
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|-
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| ? µm²
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{{scrolling table/end}}
  
 
== 3 μm Microprocessors ==
 
== 3 μm Microprocessors ==

Revision as of 04:48, 4 April 2017

The 3 μm lithography process was the semiconductor process technology used by some semiconductor companies during the mid 1970s to the mid 1980s.

Industry

Fab
Process Name​
1st Production​
 ​
Contacted Gate Pitch​
Interconnect Pitch (M1P)​
SRAM bit cell
Hitachi
Hi-CMOS I
 ?
Value
3 µm
3 µm
 ? µm²

3 μm Microprocessors

This list is incomplete; you can help by expanding it.

3 μm Microcontrollers

3 μm Chips

References

  • Meguro, S., et al. "Hi-CMOS III technology." Electron Devices Meeting, 1984 International. IEEE, 1984.