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  • #REDIRECT [[x86]]
    17 bytes (2 words) - 01:14, 17 May 2017

Page text matches

  • | isa = x86-64 ...n''' (pronounced ''"Zee-On"'') is an extended family of high-performance [[x86]] microprocessors developed by [[Intel]] for server environments and non-co
    13 KB (1,417 words) - 12:37, 22 December 2018
  • |isa=x86-64 |isa family=x86
    4 KB (693 words) - 01:48, 2 April 2023
  • |isa=x86-64 |isa family=x86
    4 KB (666 words) - 01:48, 2 April 2023
  • ...uch as {{intel|execute disable|XD}}, {{amd|no execute|NX}}, and various {{x86|SSE}} extensions in the case of [[Intel]].
    1 KB (193 words) - 03:07, 1 May 2017
  • === [[x86]] === ...all microarchitectures]] [[designer::AMD]] [[instruction set architecture::x86-32]]
    1 KB (137 words) - 19:55, 5 December 2019
  • === [[x86]] === ...all microarchitectures]] [[designer::AMD]] [[instruction set architecture::x86-64]]
    2 KB (240 words) - 02:48, 17 March 2019
  • | isa = x86 ...:AMD Athlon Processor x86 Code Optimization Guide.pdf|AMD Athlon Processor x86 Code Optimization Guide]]; Publication No. 22007; Revision K; Date February
    10 KB (1,163 words) - 10:41, 26 February 2019
  • ...e agreement was later expanded in [[1982]] which grew to incorporate the [[x86]] family of microprocessors and which later grew into legal dispute that la
    5 KB (683 words) - 23:46, 7 March 2018
  • |isa=x86-64 ...as|Austin]] - [[wikipedia:Mount Bonnell|Mount Bonnell]], was Intel's first x86-compatible [[microarchitecture]] designed to target the ultra-low power mar
    38 KB (5,468 words) - 20:29, 23 May 2019
  • |isa=x86-64 ! Cores !! {{intel|Hyper-Threading|HT}} !! {{x86|AVX}} !! {{x86|AVX2}} !! {{intel|Turbo Boost|TBT}} !! [[ECC]]
    79 KB (11,922 words) - 06:46, 11 November 2022
  • |isa=x86-64 ! Cores !! {{intel|Hyper-Threading|HT}} !! {{x86|AVX}} !! {{x86|AVX2}} !! {{intel|Turbo Boost|TBT}} !! [[ECC]]
    38 KB (5,431 words) - 10:41, 8 April 2024
  • |isa=x86-64 Cannon Lake introduced a number of {{x86|extensions|new instructions}}. See {{intel|palm cove#New instructions|Palm
    7 KB (887 words) - 12:53, 5 August 2019
  • {{x86 title|UMIP}}{{x86 isa main}} '''User-Mode Instruction Prevention''' (UMIP) is an x86 security feature introduced in the Intel {{intel|Cannon Lake}}, {{intel|Gol
    2 KB (338 words) - 01:25, 30 December 2019
  • * May 28: AMD introduces the {{amd|K6-2}} family implementing {{x86|3DNow}} [[SIMD]] extension
    556 bytes (75 words) - 10:20, 28 January 2018
  • | arch = x86 ...nges brought about by 386 became the standard for all future {{arch|32}} [[x86]] processors, dubbed [[IA-32|i386-architecture]].
    4 KB (400 words) - 08:43, 5 December 2022
  • ...ess for AMD, allowing them become a fully fledged independent developer of x86 [[microprocessor]]s, as opposed to just a second source manufacturer. In 1985 [[Intel]] introduced its 3rd generation [[x86]] microprocessors, the {{intel|80386}} family. AMD had a cross-licensing ag
    8 KB (1,077 words) - 14:50, 2 April 2020
  • | isa = x86-64 '''Core M''' is a family of [[Consumer Ultra-Low Voltage]] (CULV) [[x86]] microprocessors introduced by [[Intel]] in 2014. Core M microprocessors h
    7 KB (949 words) - 20:01, 8 August 2018
  • | arch = x86 ...ter IPC performance, and an integrated [[FPU]]. The 486 became the first [[x86]] chip family to exceed one million transistors.
    8 KB (953 words) - 08:27, 29 October 2022
  • |isa=x86-32
    1 KB (131 words) - 19:34, 30 November 2017
  • '''Am486''' was a family of {{arch|32}} 4th-generation [[x86]] microprocessors introduced by [[AMD]] in [[1993]]. Am486 chips were compa
    13 KB (1,897 words) - 09:30, 21 July 2021
  • ...ily. The name came about due to competitors selling 5th generation-based [[x86]] processors (e.g. {{Cyrix|Cyrix 5x86}}) - people were more likely to buy a Contrary to its namesake, the 5x86 was not a "5th-generation x86". Architecturally, the 5x86 is identical to the {{amd|Am486#Enhanced Am486|
    7 KB (1,043 words) - 16:50, 14 June 2020
  • | isa = x86-16 ...gy exchange agreement|technology exchange agreement]] which focused on the x86 family of processors.
    9 KB (1,192 words) - 01:35, 29 May 2016
  • | isa = x86-16
    5 KB (750 words) - 21:22, 24 May 2016
  • | isa = x86-16 ...e production started Q4 1984. The Am186 is an offshoot of the mainstream [[x86]] series designed for embedded application as opposed to general personal c
    5 KB (602 words) - 18:20, 3 June 2016
  • | isa = x86-16
    9 KB (1,276 words) - 16:07, 28 June 2016
  • | isa = x86-16
    7 KB (962 words) - 04:25, 22 June 2017
  • '''E86''' is an extended family of embedded [[x86]]-compatible devices designed by [[AMD]]. [[designer::AMD]] designed the fa
    1,006 bytes (139 words) - 06:50, 21 July 2018
  • | isa = x86-16 ...agreement|technology exchange agreement]] which allowed AMD to enter the [[x86]] market and later resulted in the legal battles that spanned much of the l
    5 KB (616 words) - 14:24, 1 May 2019
  • | isa = x86-64 '''Xeon E7''' is a family of high-end enterprise-level [[x86]] microprocessors. These server processors offer the highest performance, m
    4 KB (482 words) - 05:08, 18 February 2020
  • ...Memory Encryption}}, a new full memory encryption {{x86|extension}} for [[x86]]
    5 KB (593 words) - 01:28, 5 August 2018
  • ...{{amd|microarchitectures/k5|K5 Microarchitecture}} which was their first [[x86]] [[microarchitecture]] to be designed in-house from the ground up without ...irst due to early design problems and later due to problems with various [[x86]] incompatibilities. The first few models, using SSA/5, were finally releas
    8 KB (1,002 words) - 22:19, 17 June 2022
  • '''K6''' was a family of {{arch|32}} [[x86]] microprocessors designed by [[AMD]] and introduced in early 1997 as a suc ...ative]] [[out-of-order execution|out-of-order]] execution and supporting {{x86|MMX}}.
    8 KB (1,156 words) - 23:10, 1 August 2016
  • '''AMD-SSA/5-75ABR''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in [[1996]]. This proces
    3 KB (313 words) - 16:08, 13 December 2017
  • '''AMD-SSA/5-90ABQ''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in [[1996]]. This proces
    3 KB (292 words) - 16:08, 13 December 2017
  • '''AMD-K5-PR75ABR''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in [[1996]]. This chip w
    3 KB (303 words) - 16:08, 13 December 2017
  • '''AMD-K5-PR90ABQ''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in [[1996]]. This chip w
    3 KB (294 words) - 16:08, 13 December 2017
  • '''AMD-K5-PR100ABQ''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in [[1996]]. This chip w
    3 KB (308 words) - 16:07, 13 December 2017
  • '''AMD-K5-PR100ABR''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in [[1996]]. This chip w
    3 KB (304 words) - 16:07, 13 December 2017
  • '''AMD-K5-PR120ABQ''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in late [[1996]]. This c
    3 KB (296 words) - 16:07, 13 December 2017
  • '''AMD-K5-PR120ABR''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in late [[1996]]. This c
    3 KB (296 words) - 16:07, 13 December 2017
  • '''AMD-K5-PR133ABQ''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in late [[1996]]. This c
    3 KB (296 words) - 16:07, 13 December 2017
  • '''AMD-K5-PR133ABR''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in late [[1996]]. This c
    3 KB (296 words) - 16:07, 13 December 2017
  • '''AMD-K5-PR150ABR''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in early [[1997]]. This
    3 KB (298 words) - 16:07, 13 December 2017
  • '''AMD-K5-PR166ABX''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in early [[1997]]. This
    3 KB (296 words) - 16:08, 13 December 2017
  • '''AMD-K5-PR166ABQ''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in early [[1997]]. This
    3 KB (296 words) - 16:08, 13 December 2017
  • '''AMD-K5-PR166ABR''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in early [[1997]]. This
    3 KB (317 words) - 16:08, 13 December 2017
  • '''AMD-K5-PR200ABX''' was a {{arch|32}} [[x86]] microprocessor developed by [[AMD]] and released in mid-[[1997]]. This ch
    3 KB (324 words) - 16:08, 13 December 2017
  • '''AMD-K6/PR2-166ALR''' was a {{arch|32}} [[x86]] microprocessor designed by [[AMD]] and introduced in early [[1997]]. This {{x86 features
    3 KB (333 words) - 16:09, 13 December 2017
  • '''AMD-K6/PR2-200ALR''' was a {{arch|32}} [[x86]] microprocessor designed by [[AMD]] and introduced in early [[1997]]. This {{x86 features
    3 KB (333 words) - 16:09, 13 December 2017
  • '''AMD-K6-166ALR''' was a {{arch|32}} [[x86]] microprocessor designed by [[AMD]] and introduced in early [[1997]]. This {{x86 features
    3 KB (343 words) - 16:09, 13 December 2017
  • '''AMD-K6-166ALYD''' was a {{arch|32}} [[x86]] microprocessor designed by [[AMD]] and introduced in early [[1997]]. This {{x86 features
    3 KB (298 words) - 16:09, 13 December 2017
  • '''AMD-K6-200ALYD''' was a {{arch|32}} [[x86]] microprocessor designed by [[AMD]] and introduced in early [[1997]]. This {{x86 features
    3 KB (298 words) - 16:09, 13 December 2017
  • '''AMD-K6-200AFR''' was a {{arch|32}} [[x86]] microprocessor designed by [[AMD]] and introduced in early [[1997]]. This {{x86 features
    3 KB (314 words) - 16:09, 13 December 2017
  • '''AMD-K6-233ANR''' was a {{arch|32}} [[x86]] microprocessor designed by [[AMD]] and introduced in early [[1997]]. This {{x86 features
    3 KB (322 words) - 16:09, 13 December 2017
  • '''AMD-K6-233APR''' was a {{arch|32}} [[x86]] microprocessor designed by [[AMD]] and introduced in early [[1997]]. This {{x86 features
    3 KB (298 words) - 16:09, 13 December 2017
  • '''AMD-K6/266AFR''' was a {{arch|32}} [[x86]] microprocessor designed by [[AMD]] and introduced in early [[1998]]. This {{x86 features
    3 KB (310 words) - 16:09, 13 December 2017
  • '''AMD-K6-233AFR''' was a {{arch|32}} [[x86]] microprocessor designed by [[AMD]] and introduced in early [[1997]]. This {{x86 features
    3 KB (314 words) - 16:09, 13 December 2017
  • '''AMD-K6/233ACZ''' was a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1998] {{x86 features
    3 KB (314 words) - 16:09, 13 December 2017
  • '''AMD-K6/233ADZ''' was a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1998] {{x86 features
    3 KB (295 words) - 16:09, 13 December 2017
  • '''AMD-K6/233BCZ''' was a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1998] {{x86 features
    3 KB (293 words) - 13:34, 18 March 2023
  • '''AMD-K6/266ACZ''' was a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1998] {{x86 features
    3 KB (314 words) - 16:09, 13 December 2017
  • '''AMD-K6-200ALR''' was a {{arch|32}} [[x86]] microprocessor designed by [[AMD]] and introduced in early [[1997]]. This {{x86 features
    3 KB (316 words) - 01:23, 9 November 2020
  • '''AMD-K6/266ADZ''' was a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1998] {{x86 features
    3 KB (295 words) - 16:09, 13 December 2017
  • '''AMD-K6/300BDZ''' was a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1998] {{x86 features
    3 KB (293 words) - 13:34, 18 March 2023
  • '''AMD-K6/300ADZ''' was a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1998] {{x86 features
    3 KB (314 words) - 16:09, 13 December 2017
  • '''AMD-K6/266BCZ''' was a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1998] {{x86 features
    3 KB (293 words) - 13:33, 18 March 2023
  • '''AMD-K6/300AFR''' was a {{arch|32}} [[x86]] microprocessor designed by [[AMD]] and introduced in early [[1998]]. This {{x86 features
    3 KB (329 words) - 16:09, 13 December 2017
  • ...ding support for [[Super Socket 7]] with bus speeds of up to 100 MHz and {{x86|3DNow!}} [[SIMD]] extension. Due to its ability to extend the life of [[Soc ...ries of [[SIMD]] instructions, 3DNow! never gained as much popularity as {{x86|SSE}} did, a later implementation by [[Intel]].
    13 KB (1,969 words) - 18:07, 2 October 2019
  • |isa=x86-64 ! Cores !! {{intel|Hyper-Threading|HT}} !! {{x86|AVX}} !! {{x86|AVX2}} !! {{intel|Turbo Boost|TBT}} !! [[ECC]]
    30 KB (4,192 words) - 13:48, 10 December 2023
  • |isa=x86-64 |isa family=x86
    5 KB (745 words) - 00:23, 26 March 2023
  • |isa=x86-64 |isa family=x86
    5 KB (748 words) - 00:43, 26 March 2023
  • |isa=x86-64 |isa family=x86
    5 KB (748 words) - 00:51, 26 March 2023
  • '''K6-2/200AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    2 KB (291 words) - 11:11, 5 January 2019
  • '''K6-2/233AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (317 words) - 16:08, 13 December 2017
  • '''K6-2/250AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (317 words) - 16:08, 13 December 2017
  • '''K6-2/266AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (344 words) - 16:08, 13 December 2017
  • '''K6-2/300AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (398 words) - 16:08, 13 December 2017
  • '''K6-2/300AFR-66''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (381 words) - 16:08, 13 December 2017
  • '''K6-2/333AFR-66''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (375 words) - 16:08, 13 December 2017
  • '''K6-2/333AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (387 words) - 16:08, 13 December 2017
  • '''K6-2/350AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (338 words) - 16:08, 13 December 2017
  • '''K6-2/350AFQ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (338 words) - 16:08, 13 December 2017
  • '''K6-2/366AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (338 words) - 16:08, 13 December 2017
  • '''K6-2/380AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (338 words) - 16:08, 13 December 2017
  • '''K6-2/400AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (364 words) - 16:08, 13 December 2017
  • '''K6-2/400AFR-66''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (369 words) - 16:08, 13 December 2017
  • '''K6-2/400AFQ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (364 words) - 16:08, 13 December 2017
  • '''K6-2/400AFQ-66''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (369 words) - 16:08, 13 December 2017
  • '''K6-2/400AHX''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (364 words) - 16:08, 13 December 2017
  • '''K6-2/400AHX''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (368 words) - 16:08, 13 December 2017
  • '''K6-2/450AFX''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (338 words) - 16:08, 13 December 2017
  • '''K6-2/450AGX''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (338 words) - 16:08, 13 December 2017
  • '''K6-2/450AHX''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (343 words) - 16:08, 13 December 2017
  • '''K6-2/475AFX''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (338 words) - 16:08, 13 December 2017
  • '''K6-2/475AHX''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (338 words) - 16:08, 13 December 2017
  • '''K6-2/500AFX''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (353 words) - 16:08, 13 December 2017
  • '''K6-2/500AHX''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (338 words) - 16:08, 13 December 2017
  • '''K6-2/533AFX''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (344 words) - 16:08, 13 December 2017
  • '''K6-2/550AFX''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (338 words) - 16:08, 13 December 2017
  • '''K6-2/550AGR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (338 words) - 16:09, 13 December 2017
  • '''K6-2/337AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (336 words) - 16:08, 13 December 2017
  • '''K6-2/350AFK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/366AFK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/380AFK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/400AFK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (361 words) - 16:08, 13 December 2017
  • '''K6-2/400AFK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (361 words) - 16:08, 13 December 2017
  • '''K6-2/400ACK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (361 words) - 16:08, 13 December 2017
  • '''K6-2/400ACK-66''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (362 words) - 16:08, 13 December 2017
  • '''K6-2/433ADK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/450ADK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/475ACK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/500ADK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/500ACK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/475ADK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/450ACK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/233AMZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (339 words) - 16:08, 13 December 2017
  • '''K6-2/266AMZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/266ANZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/266BNZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (335 words) - 16:08, 13 December 2017
  • '''K6-2/300AMZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/300ANZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/300ANZ-66''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (341 words) - 16:08, 13 December 2017
  • '''K6-2/333AMZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/333AMZ-66''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (341 words) - 16:08, 13 December 2017
  • '''K6-2/333ANZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (340 words) - 16:08, 13 December 2017
  • '''K6-2/333ANZ-66''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (341 words) - 16:08, 13 December 2017
  • '''K6-2/300BNZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
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  • '''K6-2/300BNZ-66''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (336 words) - 16:08, 13 December 2017
  • '''K6-2/333BNZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (335 words) - 16:08, 13 December 2017
  • '''K6-2/333BNZ-66''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
    3 KB (336 words) - 16:08, 13 December 2017
  • '''K6-2/380ACK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed {{x86 features
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  • '''K6-2E/233AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
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  • '''K6-2E/233AMZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (345 words) - 16:09, 13 December 2017
  • '''K6-2E/266AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (345 words) - 16:09, 13 December 2017
  • '''K6-2E/266AMZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (345 words) - 16:09, 13 December 2017
  • '''K6-2E/300AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (345 words) - 16:09, 13 December 2017
  • '''K6-2E/300AFR-66''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (346 words) - 16:09, 13 December 2017
  • '''K6-2E/300AMZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (345 words) - 16:09, 13 December 2017
  • '''K6-2E/300AMZ-66''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (346 words) - 16:09, 13 December 2017
  • '''K6-2/337AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (344 words) - 16:09, 13 December 2017
  • '''K6-2/337AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (344 words) - 16:09, 13 December 2017
  • '''K6-2/337AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (344 words) - 16:09, 13 December 2017
  • '''K6-2/337AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (344 words) - 16:09, 13 December 2017
  • '''K6-2/337AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (344 words) - 16:09, 13 December 2017
  • '''K6-2/337AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and ma {{x86 features
    3 KB (344 words) - 16:09, 13 December 2017
  • '''K6-III''' was a family of {{arch|32}} [[x86]] microprocessors introduced by [[AMD]] in February of [[1999]] as a succes ...SP instructions. K6-III, however, did not incorporated any new [[Intel]] {{x86|MMX}} instructions. Like its predecessors, K6-III further extended the life
    9 KB (1,264 words) - 02:29, 19 January 2017
  • '''Duron''' was a family of budget {{arch|32}} [[x86]] microprocessors developed by [[AMD]] and introduced in early 2000. Duron, ...sors incorporated {{x86|MMX}}, {{x86|Extended MMX}}, {{x86|3DNow!}}, and {{x86|Extended 3DNow!}}.
    19 KB (2,874 words) - 17:30, 3 December 2016
  • ...mistaken for "Pentium Rating", was a rating system that allowed various [[x86]] manufacturers to gauge the performance level of their [[microprocessor]]s
    3 KB (456 words) - 06:30, 8 July 2020
  • AMD, Cyrix, IBM and SGS-THOMSON sell x86 processors that compete with Intel's processors. The new P-rating evaluatio
    3 KB (423 words) - 17:17, 21 August 2016
  • '''Duron 550''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This mode {{x86 features
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  • '''Duron 600''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This mode {{x86 features
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  • '''Duron 650''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This mode {{x86 features
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  • '''Duron 700''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This mode {{x86 features
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  • '''Duron 750''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This mode {{x86 features
    4 KB (423 words) - 16:07, 13 December 2017
  • '''Duron 800''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This mode {{x86 features
    4 KB (438 words) - 16:07, 13 December 2017
  • '''Duron 850''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This mode {{x86 features
    4 KB (423 words) - 16:07, 13 December 2017
  • '''Duron 950''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This mode {{x86 features
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  • '''Duron 900''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This mode {{x86 features
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  • '''Duron 700''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This mode {{x86 features
    4 KB (427 words) - 16:07, 13 December 2017
  • '''Duron 600''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This mode {{x86 features
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  • '''Duron 650''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This mode {{x86 features
    4 KB (419 words) - 16:07, 13 December 2017
  • '''Duron 750''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This mode {{x86 features
    4 KB (419 words) - 16:07, 13 December 2017
  • '''Duron 700''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This mode {{x86 features
    4 KB (419 words) - 16:07, 13 December 2017
  • '''Duron 800''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This mode {{x86 features
    4 KB (419 words) - 16:07, 13 December 2017
  • ...00''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} mobile [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. Thi {{x86 features
    4 KB (372 words) - 16:07, 13 December 2017
  • ...50''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} mobile [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. Thi {{x86 features
    4 KB (372 words) - 16:07, 13 December 2017
  • ...00''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} mobile [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. Thi {{x86 features
    4 KB (372 words) - 16:07, 13 December 2017
  • |isa=x86-32 ...res|architectures}}. K5 was intended to serve as AMD's baseline for future x86 microarchitectures. K5 was superseded by {{\\|K6}} in 1997.
    2 KB (272 words) - 20:01, 30 November 2017
  • |isa=x86-32 *** Short decode: Two x86 instructions that generate up to two micro-ops each
    4 KB (578 words) - 18:57, 22 May 2019
  • |isa=x86-32
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  • |isa=x86-32
    2 KB (311 words) - 20:02, 30 November 2017
  • |isa=x86-32
    6 KB (923 words) - 16:48, 3 March 2022
  • |isa=x86-64
    2 KB (261 words) - 01:06, 19 June 2023
  • |isa=x86-64
    2 KB (287 words) - 17:28, 1 December 2018
  • |isa=x86-64
    2 KB (261 words) - 16:24, 4 January 2022
  • |isa=x86-64
    2 KB (222 words) - 12:17, 23 June 2019
  • |isa=x86-64
    2 KB (223 words) - 19:54, 14 July 2021
  • |isa=x86-64
    2 KB (213 words) - 16:30, 21 January 2018
  • |isa=x86-64
    2 KB (215 words) - 16:40, 20 July 2018
  • |isa=x86-64 ! Cores !! Unlocked !! {{x86|AVX2}} !! [[SMT]] !! {{amd|XFR}} !! [[IGP]] !! [[ECC]] !! [[Multiprocessin
    79 KB (12,095 words) - 15:27, 9 June 2023
  • |isa=x86-64 ! Cores !! Unlocked !! {{x86|AVX2}} !! [[SMT]] !! [[IGP]] !! [[ECC]] !! [[Multiprocessing|MP]]
    57 KB (8,701 words) - 22:11, 9 October 2022
  • '''AMD-K6-III/333AFR''' is a {{arch|32}} [[x86]] desktop microprocessor designed by [[AMD]] and introduced in early [[1999 {{x86 features
    3 KB (362 words) - 16:09, 13 December 2017
  • '''AMD-K6-III/400AHX''' is a {{arch|32}} [[x86]] desktop microprocessor designed by [[AMD]] and introduced in early [[1999 {{x86 features
    3 KB (374 words) - 16:09, 13 December 2017
  • '''AMD-K6-III/400AFR''' is a {{arch|32}} [[x86]] desktop microprocessor designed by [[AMD]] and introduced in early [[1999 {{x86 features
    3 KB (371 words) - 16:09, 13 December 2017
  • '''AMD-K6-III/450AHX''' is a {{arch|32}} [[x86]] desktop microprocessor designed by [[AMD]] and introduced in early [[1999 {{x86 features
    3 KB (349 words) - 16:09, 13 December 2017
  • '''AMD-K6-III/450AFX''' is a {{arch|32}} [[x86]] desktop microprocessor designed by [[AMD]] and introduced in early [[1999 {{x86 features
    3 KB (349 words) - 16:09, 13 December 2017
  • '''AMD-K6-III/333AFK''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1999] {{x86 features
    3 KB (377 words) - 16:09, 13 December 2017
  • '''AMD-K6-III/350AFK''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1999] {{x86 features
    3 KB (355 words) - 16:09, 13 December 2017
  • '''AMD-K6-III/366AFK''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1999] {{x86 features
    3 KB (355 words) - 16:09, 13 December 2017
  • '''AMD-K6-III/380AFK''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1999] {{x86 features
    3 KB (355 words) - 16:09, 13 December 2017
  • '''AMD-K6-III/400ACK''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in late [[1999]] {{x86 features
    3 KB (355 words) - 16:09, 13 December 2017
  • '''AMD-K6-III/433ACK''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in late [[1999]] {{x86 features
    3 KB (355 words) - 16:09, 13 December 2017
  • '''AMD-K6-III/450ACK''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in late [[1999]] {{x86 features
    4 KB (551 words) - 19:10, 27 October 2018
  • '''AMD-K6-III+/400ACZ''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[2000] {{x86 features
    4 KB (569 words) - 15:16, 26 October 2018
  • '''AMD-K6-III+/475ACZ''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[2000] {{x86 features
    3 KB (368 words) - 16:09, 13 December 2017
  • '''AMD-K6-III+/500ACZ''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[2000] {{x86 features
    3 KB (368 words) - 16:09, 13 December 2017
  • '''AMD-K6-IIIE+/400ATZ''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000 {{x86 features
    3 KB (361 words) - 09:39, 27 July 2020
  • '''AMD-K6-IIIE+/400ITZ''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000 {{x86 features
    3 KB (334 words) - 13:42, 18 March 2023
  • '''AMD-K6-IIIE+/400ICR''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000 {{x86 features
    3 KB (334 words) - 13:42, 18 March 2023
  • '''K6-2E+/500ACR''' was a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000 {{x86 features
    2 KB (299 words) - 06:06, 24 March 2023
  • '''AMD-K6-IIIE+/400ACR''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000 {{x86 features
    4 KB (557 words) - 03:30, 26 October 2018
  • '''AMD-K6-IIIE+/450APZ''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000 {{x86 features
    3 KB (361 words) - 16:09, 13 December 2017
  • '''AMD-K6-IIIE+/450ACR''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000 {{x86 features
    3 KB (361 words) - 16:09, 13 December 2017
  • '''AMD-K6-IIIE+/500ANZ''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000 {{x86 features
    3 KB (361 words) - 16:09, 13 December 2017
  • '''AMD-K6-IIIE+/500ACR''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000 {{x86 features
    3 KB (361 words) - 16:09, 13 December 2017
  • '''AMD-K6-IIIE+/550ACR''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000 {{x86 features
    3 KB (361 words) - 16:09, 13 December 2017
  • ** {{intel|8080}} (part of {{intel|MCS-80}}, forefathers of [[x86]])
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  • | isa 2 = x86-64 '''Sempron''' is a family of budget {{arch|32}} [[x86]] microprocessors developed by [[AMD]] and introduced in early [[2004]], su
    3 KB (332 words) - 01:56, 28 September 2019
  • ...''Duron 900''' based on the {{amd|Morgan|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. Thi {{x86 features
    4 KB (434 words) - 16:07, 13 December 2017
  • ...''Duron 950''' based on the {{amd|Morgan|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2001. This {{x86 features
    4 KB (434 words) - 16:07, 13 December 2017
  • ...'Duron 1000''' based on the {{amd|Morgan|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2001. This {{x86 features
    4 KB (434 words) - 16:07, 13 December 2017
  • ...Duron 11000''' based on the {{amd|Morgan|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in late 2001. This {{x86 features
    4 KB (434 words) - 16:07, 13 December 2017
  • ...'Duron 1200''' based on the {{amd|Morgan|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in late 2001. This {{x86 features
    4 KB (456 words) - 16:07, 13 December 2017
  • ...'Duron 1300''' based on the {{amd|Morgan|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2002. Thi {{x86 features
    4 KB (445 words) - 16:07, 13 December 2017
  • * {{x86|MMX}}, {{x86|Extended MMX}}, {{x86|3DNow!}}, and {{x86|Extended 3DNow!}}
    2 KB (308 words) - 18:31, 23 October 2016
  • ...was manufactured on a [[180 nm process]]. Morgan introduced support for {{x86|SSE}} as well as a cache data hardware prefetcher. ...MX}}, {{x86|Extended MMX}}, {{x86|3DNow!}}, {{x86|Extended 3DNow!}}, and {{x86|SSE}}
    3 KB (350 words) - 17:29, 3 December 2016
  • ...ron 1400''' based on the {{amd|Applebred|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2003. This {{x86 features
    4 KB (414 words) - 16:07, 13 December 2017
  • ...ron 1600''' based on the {{amd|Applebred|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2003. This {{x86 features
    4 KB (429 words) - 16:07, 13 December 2017
  • ...ron 1800''' based on the {{amd|Applebred|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2003. This {{x86 features
    4 KB (414 words) - 16:07, 13 December 2017
  • ...MX}}, {{x86|Extended MMX}}, {{x86|3DNow!}}, {{x86|Extended 3DNow!}}, and {{x86|SSE}}
    3 KB (369 words) - 15:04, 7 November 2016
  • ...00''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in late early 2002 {{x86 features
    4 KB (403 words) - 16:07, 13 December 2017
  • ...00''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in late early 2002 {{x86 features
    4 KB (403 words) - 16:07, 13 December 2017
  • ...00''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in late early 2002 {{x86 features
    4 KB (403 words) - 16:07, 13 December 2017
  • ...00''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in late 2001. This {{x86 features
    4 KB (409 words) - 16:07, 13 December 2017
  • ...50''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in late 2001. This {{x86 features
    4 KB (409 words) - 16:07, 13 December 2017
  • ...00''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2001. This {{x86 features
    4 KB (409 words) - 16:07, 13 December 2017
  • ...50''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. Thi {{x86 features
    4 KB (409 words) - 16:07, 13 December 2017
  • ...50''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. Thi {{x86 features
    4 KB (409 words) - 16:07, 13 December 2017
  • ...00''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. Thi {{x86 features
    4 KB (409 words) - 16:07, 13 December 2017
  • ...00''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This mode {{x86 features
    4 KB (406 words) - 16:07, 13 December 2017
  • ...00''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This mode {{x86 features
    4 KB (443 words) - 16:07, 13 December 2017
  • ...50''' based on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This mode {{x86 features
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  • {{x86 isa main}} ...re is widely used in the [[desktop]] and [[server]] markets. Today, custom x86-based implementations are designed by a number of [[semiconductor companies
    3 KB (334 words) - 11:29, 10 July 2021
  • | isa = x86-64 '''Xeon E5''' is a family of mid-range enterprise-level [[x86]] microprocessors. These server processors offer high performance, multi-so
    11 KB (1,395 words) - 08:36, 4 November 2020
  • ...MX}}, {{x86|Extended MMX}}, {{x86|3DNow!}}, {{x86|Extended 3DNow!}}, and {{x86|SSE}}
    1 KB (173 words) - 16:31, 7 November 2016
  • | arch = Performance mobile x86 chips | isa = x86
    2 KB (199 words) - 17:44, 17 November 2016
  • | arch = Performance desktop x86 chips | isa = x86
    2 KB (263 words) - 05:36, 14 November 2016
  • | arch = Server x86 multiprocessors | isa = x86
    11 KB (1,571 words) - 18:57, 17 November 2016
  • | isa = x86 '''Geode NX''' was a family of {{arch|32}} [[x86]] embedded microprocessors designed by [[AMD]] targeting the higher-end emb
    1 KB (119 words) - 23:46, 9 November 2016
  • | arch = Performance mobile x86 chips | isa = x86
    2 KB (281 words) - 15:41, 16 November 2016
  • | arch = Server x86 multiprocessors | isa = x86
    2 KB (292 words) - 02:17, 8 July 2018
  • | arch = Performance desktop x86 chips | isa = x86-64
    2 KB (209 words) - 18:21, 17 November 2016
  • | arch = Performance desktop dual-core x86 chips | isa = x86-64
    1 KB (140 words) - 14:59, 16 November 2016
  • | arch = Budget dual-core x86 chips | isa = x86-64
    1 KB (138 words) - 15:13, 16 November 2016
  • | arch = Budget dual-core x86 chips | isa = x86-64
    4 KB (434 words) - 15:06, 9 December 2020
  • | arch = Performance desktop quad-core x86 chips | isa = x86-64
    3 KB (367 words) - 23:01, 11 January 2021
  • | arch = Performance desktop quad-core x86 chips | isa = x86-64
    1 KB (115 words) - 12:50, 16 November 2016
  • | arch = Budget desktop tri-core x86 chips | isa = x86-64
    3 KB (313 words) - 03:29, 11 January 2021
  • | arch = Budget desktop tri-core x86 chips | isa = x86-64
    2 KB (278 words) - 12:33, 18 June 2021
  • | arch = Performance desktop dual-core x86 chips | isa = x86-64
    3 KB (357 words) - 21:08, 18 June 2021
  • | arch = Performance desktop hexa-core x86 chips | isa = x86-64
    2 KB (285 words) - 11:15, 18 June 2021
  • | arch = Budget tri-core x86 chips | isa = x86-64
    2 KB (278 words) - 19:37, 7 December 2020
  • | arch = Budget quad-core x86 chips | isa = x86-64
    3 KB (338 words) - 19:13, 7 December 2020
  • | arch = Performance mobile x86-64 chips | isa = x86-64
    1 KB (109 words) - 15:50, 16 November 2016
  • | arch = Performance mobile x86-64 chips | isa = x86-64
    1,009 bytes (94 words) - 16:25, 16 November 2016
  • | arch = Performance mobile dual-core x86-64 chips | isa = x86-64
    988 bytes (95 words) - 17:13, 16 November 2016
  • | arch = Performance mobile dual-core x86-64 chips | isa = x86-64
    1 KB (118 words) - 18:12, 16 November 2016
  • | arch = Performance mobile dual-core x86-64 chips | isa = x86-64
    1 KB (130 words) - 18:07, 16 November 2016
  • | arch = Performance mobile dual-core x86-64 chips | isa = x86-64
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  • ...1000AMS3C'') based on the {{amd|Palomino|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in [[2001]] for th {{x86 features
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  • ...1200ANS3B'') based on the {{amd|Palomino|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in [[2001]] for th {{x86 features
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  • ...1200AMS3C'') based on the {{amd|Palomino|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in [[2001]] for th {{x86 features
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  • ...1200DHS3C'') based on the {{amd|Palomino|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in [[2001]] for th {{x86 features
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  • ...1500DMS3C'') based on the {{amd|Palomino|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in late [[2001]] f {{x86 features
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  • ...2000DMS3C'') based on the {{amd|Palomino|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in early [[2002]] {{x86 features
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  • ...1600DMS3C'') based on the {{amd|Palomino|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in late [[2001]] f {{x86 features
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  • ...1800DMS3C'') based on the {{amd|Palomino|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in late [[2001]] f {{x86 features
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  • ...1900DMS3C'') based on the {{amd|Palomino|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in late [[2001]] f {{x86 features
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  • ...2100DMS3C'') based on the {{amd|Palomino|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in mid-[[2002]] fo {{x86 features
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  • ...DUT3C'') based on the {{amd|Thoroughbred|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in late [[2002]] f {{x86 features
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  • ...DKT3C'') based on the {{amd|Thoroughbred|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in late [[2002]] f {{x86 features
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  • ...DKT3C'') based on the {{amd|Thoroughbred|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in late [[2002]] f {{x86 features
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  • ...DKT3C'') based on the {{amd|Thoroughbred|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in late [[2002]] f {{x86 features
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  • ...DUT3C'') based on the {{amd|Thoroughbred|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in late [[2002]] f {{x86 features
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  • ...DKT3C'') based on the {{amd|Thoroughbred|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in late [[2002]] f {{x86 features
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  • ...ased on the last-generation {{amd|Barton|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in early [[2003]] {{x86 features
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  • ...ased on the last-generation {{amd|Barton|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in early [[2003]] {{x86 features
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  • {{x86 title|Extensions}}{{x86 isa main}} The [[x86]] [[instruction set architecture|ISA]] has gone through numerous iterations
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  • {{x86 title|List of processor families}}{{x86 isa main}} Below is a '''list of [[x86]] processor families''' including both current and discontinued families.
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  • ...announces the {{amd|Ryzen 7}} processor family for high-end performance [[x86]] based on {{amd|Zen|l=arch}} ...t 10: AMD introduces {{amd|Threadripper}}, a family of enthusiasts-class [[x86]] microprocessors
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  • * {{\\|Ryzen Threadripper}}, high-end/enthusiasts [[x86]] microprocessors * {{\\|Ryzen 9}}, high-end/enthusiasts [[12 cores|12]]-[[16 cores]] [[x86]] microprocessors
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  • |THERMTRIP_L||{{x86|Thermal protection|Temperature Trip}} Input/Output
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  • | arch = high-performance x86 processors | isa = x86-64
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  • | arch = mid-range performance x86 processors | isa = x86-64
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  • | arch = low-end performance x86 processors | isa = x86-64
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  • |isa=x86-64 * {{x86|VAES}} - 256-bit Vector AES instructions
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  • |isa=x86-64 ...SSE4.2}}, {{x86|AES}}, {{x86|AVX}}, {{x86|FMA3}}, and {{x86|AVX2}}), and {{x86|SHA}}
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  • |isa=x86-64 ...SSE4.2}}, {{x86|AES}}, {{x86|AVX}}, {{x86|FMA3}}, and {{x86|AVX2}}), and {{x86|SHA}}
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  • | isa = x86-32 ...net device]] (MID) market. Silverthorne-based processors are {{arch|32}} [[x86]] single core processors with TDP ranging from just 650 mW to 2.5 W. Silver
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  • | isa = x86-32 | isa 2 = x86-64
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  • ...ic operations at once. In AMD's context, those are refered to as actual "[[x86-64|AMD64]] instructions". ...m a read, modify, and write operation. Another way of describing MOPs is [[x86]] instructions that have undergone a number of transformations to make them
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  • ...SC]] concept. While more often associated with [[CISC]] [[ISA]]s such as [[x86]] and [[z/Architecture]], micro-ops are also used in various [[RISC]] desig
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  • |isa=x86-64 ...ssing, up to [[28 cores]], and incorporate a new {{x86|AVX-512}} [[x86]] {{x86|extension}}. Skylake SP-based chips are manufactured on an enhanced [[14 nm
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  • | isa = x86-64 '''EPYC''' (pronounced ''epic'') is a family of {{arch|64}} [[x86]] high-performance server [[multiprocessors]] introduced by [[AMD]] in 2017
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  • |isa=x86-64 * 8 to 64 {{amd|Zen 3|l=arch}} [[x86]] CPU cores with 2-way [[SMT]]
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  • | arch = High-performance, high core count x86 desktop processors ...9''' is a family of high-performance and high [[core count]] {{arch|64}} [[x86]] microprocessors introduced by [[Intel]] in mid-2017. This family targets
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  • | arch = High-performance, high core count x86 desktop processors ...X''' is a family of high-performance and high [[core count]] {{arch|64}} [[x86]] microprocessors introduced by [[Intel]] in mid-2017.
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  • * {{x86|Interrupt Flag}} (IF), [[x86]]
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  • * {{x86|Extensions|x86 Extensions}}
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  • | arch = high-performance x86 processors | isa = x86-64
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  • '''Mainstream ([[x86]]):''' '''ULP ([[x86]]):'''
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  • ...s shown on the left. This table is stored within the read-only processor {{x86|model specific register}} (MSR) and is used to ensure that frequencies do n ...and [[integer]] vector multiplications). This also includes the various {{x86|AVX-512}} bit scanning, and other simple (i.e., non INT/FP MUL) operations.
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  • |isa=x86-64 ! Cores !! {{intel|Hyper-Threading|HT}} !! {{x86|AVX}} !! {{x86|AVX2}} !! {{x86|AVX-512}} !! {{intel|Turbo Boost|TBT}} !! [[ECC]]
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  • {{x86 title|Secure Memory Encryption (SME)}}{{x86 isa main}} ...ry. '''Secure Encrypted Virtualization''' ('''SEV''') extends SME to {{x86|AMD-V}}, allowing individual VMs to run SME using their own secure keys.
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  • * {{x86|Secure Memory Encryption}} (SME) * {{x86|Secure Encrypted Virtualization}} (SEV)
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  • ...hitect of [[AMD]]'s {{amd|Bobcat|l=arch}} microarchitecture, a low-power [[x86]] design.
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  • | arch = Embedded x86 SoCs | isa = x86-64
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  • | arch = Embedded x86 SoCs | isa = x86-64
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  • {{amd title|CPUID}}{{x86 isa main}} Below is a list of '''{{x86|CPUID}}s''' of [[AMD]] x86 processors broken down by processor family, [[microarchitecture]], and proc
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  • ...h than PCIe. Although it's unlikely that NVLink would be implemented on an x86 system by either [[AMD]] or [[Intel]], [[IBM]] has collaborated with Nvidia
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  • SB-TSI was first implemented on processors of the {{amd|CPUID|x86 CPU Family}} 10h, augmenting and later replacing pins which provide direct * {{x86|Thermal protection}}
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  • ...oarchitecture with advanced dynamic branch prediction, 4-way decoding of [[x86]] instructions with a stack optimizer, multiple caches including an Op cach * {{x86|AVX-512}} instructions support, 256-bit data path<ref name="ryzen-7000-prev
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  • ..., THATIC is a [[Chinese]] holding company designed to deliver customized [[x86]]-based solutions for the Chinese market. Two separate joint ventures were ...e for the production of the chips. Haiguang Microelectronics has access to x86 and AMD's architectures (most importantly, {{amd|Zen|l=arch}}). Note that s
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  • ...') is a [[Chinese]] fabless semiconductor company that designs and sells [[x86]]-based solutions for the Chinese server market. HiGon is a joint-venture b
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  • |isa=x86-64 ...SSE4.2}}, {{x86|AES}}, {{x86|AVX}}, {{x86|FMA3}}, and {{x86|AVX2}}), and {{x86|SHA}}
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  • |isa=x86-64 ...SSE4.2}}, {{x86|AES}}, {{x86|AVX}}, {{x86|FMA3}}, and {{x86|AVX2}}), and {{x86|SHA}}
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  • |THERMTRIP_L||B-IO33-OD||{{x86|Thermal protection|Temperature Trip}} Input/Output
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  • |THERMTRIP_L||B-IO33-OD||{{x86|Thermal protection|Temperature Trip}} Input/Output ...;Schaefer, Alex|title=Zen 2: The AMD 7nm Energy-Efficient High-Performance x86-64 Microprocessor Core|date=2020-02|conference=Proceedings of IEEE ISSCC 20
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  • ...through the introduction of various vector extensions such as [[x86]]'s {{x86|AVX}} and [[ARM]]'s {{arm|SVE}}. With those extensions, it's possible to pe === x86 ===
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  • |isa=x86-64 * 16 to 96 {{amd|Zen 4|l=arch}} [[x86]] CPU cores with 2-way [[SMT]]
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  • {{x86 title|Persistent Memory Extensions}}{{x86 isa main}} '''Persistent memory {{x86|extensions}}''' ('''PMEM''') are a set of [[x86]] instructions designed to improve the usability of working with [[storage-
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  • |isa=x86-64 ...'''), the successor to {{\\|Palm Cove}}, is a high-performance [[10 nm]] [[x86]]-64 core microarchitecture designed by [[Intel]] for an array of server an
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  • | arch = high-performance x86 processors | isa = x86-64
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  • ...esource 2''') is the successor to {{\\|ARCHER}}, a planned [[petascale]] [[x86]] supercomputer intended to serve as the UK's primary academic research sup
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  • ...ECToR''' ('''High-End Computing Terascale Resource''') was [[terascale]] [[x86]] [[supercomputer]] serving as the UK's primary academic research supercomp
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  • {{x86 title|CLZERO}}{{x86 isa main}} '''CLZERO''' is an AMD vendor specific {{x86|extensions|x86 instruction}} introduced with the {{amd|Zen|l=arch}} microarchitecture.
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  • |isa=x86-64 ...aging to OEMs. They identify as members of {{amd|CPUID#Family 25 (19h)|AMD x86 CPU Family 19h, Model 08h}}.
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