|Zen 4 µarch|
Zen 4 was first mentioned by Forrest Norrod during AMD's EPYC One Year Anniversary webinar. During the next horizon event which was held on November 6, 2018, AMD stated that Zen 4 was at the design completion phase.
|Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.|
|Genoa||Up to 96/192||High-end server multiprocessors|
|Warhol||Up to 20/40||Mainstream to high-end desktops & enthusiasts market processors|
|Rembrandt||Up to 8/16||Mainstream desktop & mobile processors with GPU|
Little is currently known about the architectural improvements that are being done to Zen 4.
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raised core/thread count from 64/128 to at least 96/192 (vastly due to 5nm process allowing more space, therefore more cores).
improved cache load, write and prefetch from/to register (less latency).
improved iGPUs for APU variants; navi integrated gpu with up to 3.4 TFLOPs FP32 (clock frequency unknown, at least 2 GHz).
utilizes new AM5 socket and is expected to support DDR5 and possibly PCIe 5.
more transistors (depending on AM5 socket as well and not just the CPU it self).
- Mike Clark(?), chief architect