Duron 1300 (Camaro) - AMD

	Edit Values
	Duron 1300
	General Info
Designer	AMD
Manufacturer	AMD
Model Number	Duron 1300
Part Number	DHM1300ALQ1B
Market	Mobile
Introduction	January 30, 2002 (announced); January 30, 2002 (launched)
Shop	Amazon
	General Specs
Family	Duron
Series	Duron Mobile
Locked	Yes
Frequency	1300 MHz
Bus type	FSB
Bus speed	100 MHz
Bus rate	200 MT/s
Clock multiplier	13
CPUID	670
	Microarchitecture
Microarchitecture	K7
Core Name	Morgan
Core Family	6
Core Model	7
Core Stepping	0
Process	180 nm
Transistors	25,180,000
Technology	CMOS
Die	105.68 mm²
Word Size	32 bit
Cores	1
Threads	1
Max Memory	4 GiB
	Multiprocessing
Max SMP	1-Way (Uniprocessor)
	Electrical
Vcore	1.50 V ± 0.1 V
VI/O	2.5 V ± 0.25 V
Tcase	0 °C – 95 °C
Tstorage	-40 °C – 100 °C

The Mobile Duron 1300 based on the Morgan (Camaro) core was a 32-bit x86 microprocessor developed by AMD and introduced in late early 2002. This model was part of the second generation of the Duron family. Designed based on AMD's K7 on a 180 nm process, this MPU operated at 1300 MHz with a bus capable of 200 MT/s.

Cache[edit]

Main article: K7 § Cache

Cache Info [Edit Values]
L1I$	64 KiB 65,536 B 0.0625 MiB	1x64 KiB 2-way set associative
L1D$	64 KiB 65,536 B 0.0625 MiB	1x64 KiB 2-way set associative
L2$	64 KiB 0.0625 MiB 65,536 B 6.103516e-5 GiB	1x64 KiB 16-way set associative

Graphics[edit]

This SoC has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX	MMX Extension
EMMX	Extended MMX Extension
3DNow!	3DNow! Extension
E3DNow!	Extended 3DNow! Extension
SSE	Streaming SIMD Extensions

Halt State
Sleep State

Documents[edit]

DataSheet[edit]

Mobile AMD Duron Processor Model 7 Data Sheet; Publication # 24068; Rev: F; Issue Date: December 2001.

base frequency	1,300 MHz (1.3 GHz, 1,300,000 kHz) +
bus rate	200 MT/s (0.2 GT/s, 200,000 kT/s) +
bus speed	100 MHz (0.1 GHz, 100,000 kHz) +
bus type	FSB +
clock multiplier	13 +
core count	1 +
core family	6 +
core model	7 +
core name	Morgan +
core stepping	0 +
core voltage	1.5 V (15 dV, 150 cV, 1,500 mV) +
core voltage tolerance	0.1 V +
cpuid	670 +
designer	AMD +
die area	105.68 mm² (0.164 in², 1.057 cm², 105,680,000 µm²) +
family	Duron +
first announced	January 30, 2002 +
first launched	January 30, 2002 +
full page name	amd/duron/dhm1300alq1b +
has feature	Halt State + and Sleep State +
has locked clock multiplier	true +
instance of	microprocessor +
io voltage	2.5 V (25 dV, 250 cV, 2,500 mV) +
io voltage tolerance	0.25 V +
l1d$ description	2-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	2-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	16-way set associative +
l2$ size	0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
ldate	January 30, 2002 +
manufacturer	AMD +
market segment	Mobile +
max case temperature	368.15 K (95 °C, 203 °F, 662.67 °R) +
max cpu count	1 +
max memory	4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitecture	K7 +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	233.15 K (-40 °C, -40 °F, 419.67 °R) +
model number	Duron 1300 +
name	Duron 1300 +
part number	DHM1300ALQ1B +
process	180 nm (0.18 μm, 1.8e-4 mm) +
series	Duron Mobile +
smp max ways	1 +
technology	CMOS +
thread count	1 +
transistor count	25,180,000 +
word size	32 bit (4 octets, 8 nibbles) +

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas