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From WikiChip
Appaloosa - Cores - AMD
< amd
Edit Values | |
Appaloosa | |
General Info | |
Designer | AMD |
Manufacturer | AMD |
Introduction | April, 2002 (announced) |
Microarchitecture | |
ISA | IA-32 |
Microarchitecture | K7 |
Word Size | 4 octets 32 bit8 nibbles |
Process | 130 nm 0.13 μm 1.3e-4 mm |
Technology | CMOS |
Succession | |
Appaloosa was AMD's core name for a planned third generation Duron microprocessors, a successor to Morgan. Appaloosa was announced in 2002 but never officially released although some chips appear to have entered the market. AMD eventually released a different set of chips based on Applebred instead. Appaloosa was set to be based on the K7 microarchitecture and was intended to be manufactured on AMD's newer 130 nm process
Features[edit]
- K7-based.
- Die shrink from 180 nm to a 130 nm process
- Higher base frequency than Morgan
- 133.33 MHz FSB (up from 100) DDR (266.66 MT/s effective throughput)
- MMX, Extended MMX, 3DNow!, Extended 3DNow!, and SSE
See also[edit]
Facts about "Appaloosa - Cores - AMD"
designer | AMD + |
first announced | April 2002 + |
instance of | core + |
isa | IA-32 + |
manufacturer | AMD + |
microarchitecture | K7 + |
name | Appaloosa + |
process | 130 nm (0.13 μm, 1.3e-4 mm) + |
technology | CMOS + |
word size | 32 bit (4 octets, 8 nibbles) + |