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Athlon PRO 300U - AMD
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Athlon PRO 300U
General Info
DesignerAMD
ManufacturerGlobalFoundries
Model NumberPRO 300U
Part NumberYM300BC4T2OFG
MarketMobile
IntroductionApril 8, 2019 (announced)
April 8, 2019 (launched)
ShopAmazon
General Specs
FamilyAthlon
Series300
Frequency2,400 MHz
Turbo Frequency3,300 MHz
Bus typePCIe 3.0
Clock multiplier24
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen+
Core NamePicasso
Process12 nm
Transistors4,940,000,000
TechnologyCMOS
Die209.78 mm²
Word Size64 bit
Cores2
Threads4
Max Memory32 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP15 W
cTDP down12 W
cTDP up25 W
OP Temperature0° C – 95 °C
Packaging
PackageFP5
Package TypeOrganic Micro Ball Grid Array
Dimension35 mm × 25 mm
Pitch0.7 mm
Contacts1140

Athlon PRO 300U is a 64-bit dual-core value x86 mobile microprocessor introduced by AMD in early 2019. This processor is based on AMD's Zen+ microarchitecture and is fabricated on a 12 nm process. The PRO 300U operates at a base frequency of 2.4 GHz with a TDP of 15 W and a Boost frequency of 3.3 GHz. This APU supports up to 32 GiB of dual-channel DDR4-2400 memory and incorporates Radeon Vega 3 Graphics operating at up to 1 GHz.

This model supports a configurable TDP-down of 12 W and TDP-up of 25 W.


Cache[edit]

Main article: Zen+ § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$192 KiB
196,608 B
0.188 MiB
L1I$128 KiB
131,072 B
0.125 MiB
2x64 KiB4-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back

L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  2x512 KiB8-way set associativewrite-back

L3$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  1x4 MiB  

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2400
Supports ECCYes
Max Mem32 GiB
Controllers2
Channels2
Max Bandwidth35.76 GiB/s
36,618.24 MiB/s
38.397 GB/s
38,397.008 MB/s
0.0349 TiB/s
0.0384 TB/s
Bandwidth
Single 17.88 GiB/s
Double 35.76 GiB/s

Expansions[edit]

This processor has 12 PCIe lanes, 1x8 typically designated for a GPU and 4 additional lanes for storage (e.g., NVMe).

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 12
Configuration: 1x8+1x4, 2x4+1x4


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPURadeon Vega 3
DesignerAMD
Execution Units3Max Displays3
Unified Shaders192
Burst Frequency1,200 MHz
1.2 GHz
1,200,000 KHz
OutputDP, HDMI

Standards
DirectX12
OpenGL4.6
OpenCL2.2

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
SSE4aStreaming SIMD Extensions 4a
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
SHASHA Extensions
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
SMTSimultaneous Multithreading
AMD-ViAMD-Vi (I/O MMU virtualization)
AMD-VAMD Virtualization
TSMETransparent SME
SenseMISenseMI Technology

Die[edit]

Further information: Zen+ § Die


raven ridge die.png


raven ridge die (annotated).png
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Athlon Silver 3050U - AMD#pcie +
base frequency2,300 MHz (2.3 GHz, 2,300,000 kHz) +
clock multiplier23 +
core count2 +
core family23 +
core model1 +
core nameDali +
designerAMD +
familyAthlon Silver +
first announcedJanuary 6, 2020 +
first launchedJanuary 6, 2020 +
full page nameamd/athlon silver/3050u +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has amd amd-v technologytrue +
has amd amd-vi technologytrue +
has amd precision boost 2true +
has amd sensemi technologytrue +
has ecc memory supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, SenseMI Technology + and Precision Boost 2 +
has locked clock multipliertrue +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuRadeon Vega 2 +
integrated gpu designerAMD +
integrated gpu execution units2 +
integrated gpu max frequency1,100 MHz (1.1 GHz, 1,100,000 KHz) +
isax86-64 +
isa familyx86 +
l1$ size192 KiB (196,608 B, 0.188 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description4-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description8-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
ldateJanuary 6, 2020 +
manufacturerGlobalFoundries +
market segmentMobile +
max cpu count1 +
max memory32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) +
max memory bandwidth35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels2 +
microarchitectureZen +
model number3050U +
nameAthlon Silver 3050U +
packageFP5 +
part numberYM3050C4T2OFG +
process14 nm (0.014 μm, 1.4e-5 mm) +
series3000 +
smp max ways1 +
supported memory typeDDR4-2400 +
tdp15 W (15,000 mW, 0.0201 hp, 0.015 kW) +
tdp down12 W (12,000 mW, 0.0161 hp, 0.012 kW) +
tdp up25 W (25,000 mW, 0.0335 hp, 0.025 kW) +
technologyCMOS +
thread count2 +
turbo frequency3,200 MHz (3.2 GHz, 3,200,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +