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Duron 950 (Spitfire) - AMD
Edit Values | |
Duron 950 | |
General Info | |
Designer | AMD |
Manufacturer | AMD |
Model Number | Duron 950 |
Part Number | D950AUT1B, D0950AUT1B |
Market | Desktop |
Introduction | June 6, 2001 (announced) June 6, 2001 (launched) |
Shop | Amazon |
General Specs | |
Family | Duron |
Series | Duron Desktop |
Locked | Yes |
Frequency | 950 MHz |
Bus type | FSB |
Bus speed | 100 MHz |
Bus rate | 200 MT/s |
Clock multiplier | 9.5 |
CPUID | 630 |
Microarchitecture | |
Microarchitecture | K7 |
Core Name | Spitfire |
Core Family | 6 |
Core Model | 3 |
Core Stepping | 0 |
Process | 180 nm |
Transistors | 25,000,000 |
Technology | CMOS |
Die | 100 mm² |
Word Size | 32 bit |
Cores | 1 |
Threads | 1 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Vcore | 1.6 V ± 0.1 V |
TDP | 41.5 W |
Tcase | 0 °C – 90 °C |
Tstorage | -40 °C – 100 °C |
Duron 950 based on the Spitfire core was a 32-bit x86 microprocessor developed by AMD and introduced in 2001. This model was part of the first series of the Duron family. Designed based on AMD's K7 (a Thunderbird-derivative) on a 180 nm process, this MPU operated at 950 MHz with a bus capable of 200 MT/s with a TDP of 41.5 W.
Cache[edit]
- Main article: K7 § Cache
Cache Info [Edit Values] | ||
L1I$ | 64 KiB 65,536 B 0.0625 MiB |
1x64 KiB 2-way set associative |
L1D$ | 64 KiB 65,536 B 0.0625 MiB |
1x64 KiB 2-way set associative |
L2$ | 64 KiB 0.0625 MiB 65,536 B 6.103516e-5 GiB |
1x64 KiB 16-way set associative |
Graphics[edit]
This SoC has no integrated graphics processing unit.
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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- Halt State
- Sleep State
Documents[edit]
DataSheet[edit]
- AMD Duron Processor Model 3 Data Sheet; Publication # 23802; Rev: I; Issue Date: June 2001.
Other[edit]
- AMD Duron Processor Model 3 Revision Guide; Publication # 23865; Rev: K; Issue Date: October 2003.
Facts about "Duron 950 (Spitfire) - AMD"
base frequency | 950 MHz (0.95 GHz, 950,000 kHz) + |
bus rate | 200 MT/s (0.2 GT/s, 200,000 kT/s) + |
bus speed | 100 MHz (0.1 GHz, 100,000 kHz) + |
bus type | FSB + |
clock multiplier | 9.5 + |
core count | 1 + |
core family | 6 + |
core model | 3 + |
core name | Spitfire + |
core stepping | 0 + |
core voltage | 1.6 V (16 dV, 160 cV, 1,600 mV) + |
core voltage tolerance | 0.1 V + |
cpuid | 630 + |
designer | AMD + |
die area | 100 mm² (0.155 in², 1 cm², 100,000,000 µm²) + |
family | Duron + |
first announced | June 6, 2001 + |
first launched | June 6, 2001 + |
full page name | amd/duron/d950aut1b + |
has feature | Halt State + and Sleep State + |
has locked clock multiplier | true + |
instance of | microprocessor + |
l1d$ description | 2-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 2-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) + |
ldate | June 6, 2001 + |
manufacturer | AMD + |
market segment | Desktop + |
max case temperature | 363.15 K (90 °C, 194 °F, 653.67 °R) + |
max cpu count | 1 + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
max storage temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
microarchitecture | K7 + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 233.15 K (-40 °C, -40 °F, 419.67 °R) + |
model number | Duron 950 + |
name | Duron 950 + |
part number | D950AUT1B + and D0950AUT1B + |
process | 180 nm (0.18 μm, 1.8e-4 mm) + |
series | Duron Desktop + |
smp max ways | 1 + |
tdp | 41.5 W (41,500 mW, 0.0557 hp, 0.0415 kW) + |
technology | CMOS + |
thread count | 1 + |
transistor count | 25,000,000 + |
word size | 32 bit (4 octets, 8 nibbles) + |