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Difference between revisions of "arm holdings/cortex"
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== Cores == | == Cores == | ||
{{see also|arm/versions|neoverse|zen}} | {{see also|arm/versions|neoverse|zen}} | ||
| − | |||
=== Cortex-A === | === Cortex-A === | ||
{| class="wikitable" style="text-align: center; | {| class="wikitable" style="text-align: center; | ||
| Line 20: | Line 19: | ||
| [[2005]] || colspan="4" | {{armh|Cortex-A8|l=arch}} (''{{armh|Tiger|l=arch}}'') | | [[2005]] || colspan="4" | {{armh|Cortex-A8|l=arch}} (''{{armh|Tiger|l=arch}}'') | ||
|- | |- | ||
| − | | [[2006]] | + | | [[2006]] || colspan="4" | |
|- | |- | ||
| [[2007]] || colspan="4" | {{armh|Cortex-A9|l=arch}} (''{{armh|Falcon|l=arch}}'') | | [[2007]] || colspan="4" | {{armh|Cortex-A9|l=arch}} (''{{armh|Falcon|l=arch}}'') | ||
|- | |- | ||
| − | | [[2008]] | + | | [[2008]] || colspan="4" | |
|- | |- | ||
! !! Ultra-low power !! Mainstream-performance !! High-efficiency !! High-performance | ! !! Ultra-low power !! Mainstream-performance !! High-efficiency !! High-performance | ||
| Line 46: | Line 45: | ||
| [[2017]] || || || {{armh|Cortex-A55|l=arch}} (''{{armh|Ananke|l=arch}}'') || {{armh|Cortex-A75|l=arch}} (''{{armh|Prometheus|l=arch}}'') | | [[2017]] || || || {{armh|Cortex-A55|l=arch}} (''{{armh|Ananke|l=arch}}'') || {{armh|Cortex-A75|l=arch}} (''{{armh|Prometheus|l=arch}}'') | ||
|- | |- | ||
| − | | [[2018]] || || || {{armh|Cortex-A65|l=arch}} (''{{armh|Helios|l=arch}}'') < | + | | [[2018]] || || || {{armh|Cortex-A65|l=arch}} (''{{armh|Helios|l=arch}}'') <hr>{{armh|Cortex-A65AE|l=arch}} (''{{armh|Helios-SL|l=arch}}'') <br>Zena 65AE ([[#ARM Zena|Zena series]]) || {{armh|Cortex-A76|l=arch}} (''{{armh|Enyo|l=arch}}'') <hr>{{armh|Cortex-A76AE|l=arch}} (''{{armh|Enyo-SL|l=arch}}'') <br>Zena 76AE ([[#ARM Zena|Zena series]]) |
|- | |- | ||
| [[2019]] || {{armh|Cortex-A34|l=arch}} (''{{armh|Metis|l=arch}}'') || || || {{armh|Cortex-A77|l=arch}} (''{{armh|Deimos|l=arch}}'') | | [[2019]] || {{armh|Cortex-A34|l=arch}} (''{{armh|Metis|l=arch}}'') || || || {{armh|Cortex-A77|l=arch}} (''{{armh|Deimos|l=arch}}'') | ||
|- | |- | ||
| − | | [[2020]] || || || || {{armh|Cortex-A78|l=arch}} (''{{armh|Hercules|l=arch}}'') <br>{{armh|Cortex- | + | | [[2020]] || || || || {{armh|Cortex-A78|l=arch}} (''{{armh|Hercules|l=arch}}'') <br>{{armh|Cortex-A78C|l=arch}} (''{{armh|Hera Prime|l=arch}}'') <hr>{{armh|Cortex-A78AE|l=arch}} (''{{armh|Hercules-AE|l=arch}}'') <br>Zena 78AE ([[#ARM Zena|Zena series]]) |
|- | |- | ||
| [[2021]] || || || {{armh|Cortex-A510|l=arch}} (''{{armh|Klein|l=arch}}'') || {{armh|Cortex-A710|l=arch}} (''{{armh|Matterhorn|l=arch}}'') | | [[2021]] || || || {{armh|Cortex-A510|l=arch}} (''{{armh|Klein|l=arch}}'') || {{armh|Cortex-A710|l=arch}} (''{{armh|Matterhorn|l=arch}}'') | ||
| Line 58: | Line 57: | ||
| [[2023]] || || || {{armh|Cortex-A520|l=arch}} (''{{armh|Hayes|l=arch}}'') || {{armh|Cortex-A720|l=arch}} (''{{armh|Hunter|l=arch}}'') | | [[2023]] || || || {{armh|Cortex-A520|l=arch}} (''{{armh|Hayes|l=arch}}'') || {{armh|Cortex-A720|l=arch}} (''{{armh|Hunter|l=arch}}'') | ||
|- | |- | ||
| − | | [[2024]] || || || {{armh|Cortex-A520AE|l=arch}} (''{{armh|Hayes-AE|l=arch}}'') || {{armh|Cortex-A720AE|l=arch}} (''{{armh|Hunter-AE|l=arch}}'') <br>{{armh|Cortex-A725|l=arch}} (''{{armh|Chaberton|l=arch}}'') <!-- big.Mid.LITTLE with Logan and Hayes or as big.LITTLE • https://fuse.wikichip.org/wp-content/uploads/2024/05/arm-client-cores-roadmap-2025.png --> | + | | [[2024]] || || || {{armh|Cortex-A520AE|l=arch}} (''{{armh|Hayes-AE|l=arch}}'') <br>Zena 520AE ([[#ARM Zena|Zena series]]) || {{armh|Cortex-A720AE|l=arch}} (''{{armh|Hunter-AE|l=arch}}'') <br>Zena 720AE ([[#ARM Zena|Zena series]]) <hr>{{armh|Cortex-A725|l=arch}} (''{{armh|Chaberton|l=arch}}'') <!-- big.Mid.LITTLE with Logan and Hayes or as big.LITTLE • https://fuse.wikichip.org/wp-content/uploads/2024/05/arm-client-cores-roadmap-2025.png --> |
| + | |- | ||
| + | | [[2025]] || <s>{{armh|Cortex-A320|l=arch}}</s> (''IoT & AI'' ) <br>Lumex C1-Pico ([[#ARM Lumex|Lumex CSS]]) || || <s>{{armh|Cortex-A530|l=arch}}</s> (''{{armh|Nevis|l=arch}}'') <br>Lumex C1-Nano ([[#ARM Lumex|Lumex CSS]]) || <s>{{armh|Cortex-A730|l=arch}}</s> (''{{armh|Gelas|l=arch}}'') <br>Lumex C1-Pro ([[#ARM Lumex|Lumex CSS]]) | ||
|- | |- | ||
| − | | [[ | + | | [[2026]] || || || || |
|- | |- | ||
|} | |} | ||
| − | {| border="0" cellpadding=" | + | {| border="0" cellpadding="5" width="75%" |
|- | |- | ||
|width="30%" valign="top" align="left"| | |width="30%" valign="top" align="left"| | ||
| − | === Cortex-M === | + | ==== Cortex-M ==== |
{| class="wikitable" style="text-align: center; | {| class="wikitable" style="text-align: center; | ||
|- | |- | ||
| Line 82: | Line 83: | ||
| [[2008]] || | | [[2008]] || | ||
|- | |- | ||
| − | | [[2009]] || {{armh|Cortex- | + | | [[2009]] || {{armh|Cortex-M0|l=arch}} (''{{armh|Swift|l=arch}}'') |
|- | |- | ||
| − | | [[2010]] || {{armh|Cortex- | + | | [[2010]] || {{armh|Cortex-M4|l=arch}} (''{{armh|Merlin|l=arch}}'') |
|- | |- | ||
| [[2011]] || | | [[2011]] || | ||
| Line 110: | Line 111: | ||
| [[2022]] || {{armh|Cortex-M85|l=arch}} (''{{arm|Helium}}'') | | [[2022]] || {{armh|Cortex-M85|l=arch}} (''{{arm|Helium}}'') | ||
|- | |- | ||
| − | | [[2023]] || {{armh|Cortex-M52|l=arch}} | + | | [[2023]] || {{armh|Cortex-M52|l=arch}} (Mizar) |
|- | |- | ||
| [[2024]] || | | [[2024]] || | ||
|- | |- | ||
| − | | [[2025]] || | + | | [[2025]] || Orbis ([[#ARM Orbis|Orbis series]]) |
| + | |- | ||
| + | | [[2026]] || | ||
|- | |- | ||
|} | |} | ||
|width="30%" valign="top" align="left"| | |width="30%" valign="top" align="left"| | ||
| − | === Cortex-R === | + | ==== Cortex-R ==== |
{| class="wikitable" style="text-align: center; | {| class="wikitable" style="text-align: center; | ||
|- | |- | ||
| − | ! Year !! Core | + | ! Year !! Core |
| + | |- | ||
| + | | [[2004]] || | ||
| + | |- | ||
| + | | [[2005]] || | ||
| + | |- | ||
| + | | [[2006]] || | ||
| + | |- | ||
| + | | [[2007]] || | ||
| + | |- | ||
| + | | [[2008]] || | ||
| + | |- | ||
| + | | [[2009]] || | ||
| + | |- | ||
| + | | [[2010]] || {{armh|Cortex-R4|l=arch}}(F) <br>(''{{armh|Serval-E|l=arch}}'') | ||
|- | |- | ||
| − | | [[2011]] || {{armh|Cortex- | + | | [[2011]] || {{armh|Cortex-R5|l=arch}}(F) <br>{{armh|Cortex-R7|l=arch}}(F) |
|- | |- | ||
| [[2012]] || | | [[2012]] || | ||
| Line 133: | Line 150: | ||
| [[2015]] || | | [[2015]] || | ||
|- | |- | ||
| − | | [[2016]] || {{armh|Cortex-R8|l=arch}} <br>{{armh|Cortex-R52|l=arch}} | + | | [[2016]] || {{armh|Cortex-R8|l=arch}}(F) <br>{{armh|Cortex-R52|l=arch}}(F) |
|- | |- | ||
| [[2017]] || | | [[2017]] || | ||
| Line 141: | Line 158: | ||
| [[2019]] || | | [[2019]] || | ||
|- | |- | ||
| − | | [[2020]] || {{armh|Cortex-R82|l=arch}} | + | | [[2020]] || {{armh|Cortex-R82|l=arch}}(F) (64-bit) |
|- | |- | ||
| [[2021]] || | | [[2021]] || | ||
|- | |- | ||
| − | | [[2022]] || {{armh|Cortex-R52+|l=arch}} | + | | [[2022]] || {{armh|Cortex-R52+|l=arch}}(F) |
|- | |- | ||
| [[2023]] || | | [[2023]] || | ||
|- | |- | ||
| − | | [[2024]] || {{armh|Cortex-R82AE|l=arch}} | + | | [[2024]] || {{armh|Cortex-R82AE|l=arch}} (64-bit) |
| + | |- | ||
| + | | [[2025]] || Zena 82AE ([[#ARM Zena|Zena series]]) | ||
|- | |- | ||
| − | | [[ | + | | [[2026]] || |
|- | |- | ||
|} | |} | ||
|width="30%" valign="top" align="left"| | |width="30%" valign="top" align="left"| | ||
| − | === Cortex-X === | + | ==== Cortex-X ==== |
{| class="wikitable" style="text-align: center; | {| class="wikitable" style="text-align: center; | ||
|- | |- | ||
| − | ! Year !! Core | + | ! Year !! Core |
|- | |- | ||
| [[2020]] || {{armh|Cortex-X1|l=arch}} (''{{armh|Hera|l=arch}}'') <br>{{armh|Cortex-X1C|l=arch}} (''{{armh|Hera-C|l=arch}}'') | | [[2020]] || {{armh|Cortex-X1|l=arch}} (''{{armh|Hera|l=arch}}'') <br>{{armh|Cortex-X1C|l=arch}} (''{{armh|Hera-C|l=arch}}'') | ||
|- | |- | ||
| − | | [[2021]] || {{armh|Cortex-X2|l=arch}} (''{{armh|Matterhorn-ELP|l=arch}}'') | + | | [[2021]] || {{armh|Cortex-X2|l=arch}} <br>(''{{armh|Matterhorn-ELP|l=arch}}'') |
|- | |- | ||
| [[2022]] || {{armh|Cortex-X3|l=arch}} (''{{armh|Makalu-ELP|l=arch}}'') | | [[2022]] || {{armh|Cortex-X3|l=arch}} (''{{armh|Makalu-ELP|l=arch}}'') | ||
| Line 168: | Line 187: | ||
| [[2023]] || {{armh|Cortex-X4|l=arch}} (''{{armh|Hunter-ELP|l=arch}}'') | | [[2023]] || {{armh|Cortex-X4|l=arch}} (''{{armh|Hunter-ELP|l=arch}}'') | ||
|- | |- | ||
| − | | [[2024]] || <s>{{armh|Cortex-X5|l=arch}} (''{{armh|Chaberton-ELP|l=arch}}'')</s> <br>{{armh|Cortex-X925|l=arch}} (''{{armh|Blackhawk|l=arch}}'') | + | | [[2024]] || <s>{{armh|Cortex-X5|l=arch}}</s> (''{{armh|Chaberton-ELP|l=arch}}'') <br>{{armh|Cortex-X925|l=arch}} (''{{armh|Blackhawk|l=arch}}'') |
| + | |- | ||
| + | | [[2025]] || <s>{{armh|Cortex-X930|l=arch}}</s> (''{{armh|Travis|l=arch}}'') <br>Lumex C1-Ultra ([[#ARM Lumex|Lumex CSS]]) <br>Lumex C1-Premium (''{{armh|Alto|l=arch}}'') | ||
| + | |- | ||
| + | |} | ||
| + | ==== [[Neoverse]] ==== | ||
| + | {| class="wikitable" style="text-align: center; | ||
| + | |- <!-- | ||
| + | | [[2015]] || {{armh|Cosmos|l=arch}} ([[Cortex]]) | ||
| + | |- --> | ||
| + | ! Year !! Core | ||
| + | |- | ||
| + | | [[2019]] || {{armh|Neoverse E1|l=arch}} (''{{armh|Helios|l=arch}}'') <br>{{armh|Neoverse N1|l=arch}} (''{{armh|Ares|l=arch}}'') | ||
| + | |- | ||
| + | | [[2020]] || {{armh|Neoverse V1|l=arch}} (''{{armh|Zeus|l=arch}}'') | ||
| + | |- | ||
| + | | [[2021]] || {{armh|Neoverse E2|l=arch}} (''Genesis'')<br>{{armh|Neoverse N2|l=arch}} (''{{armh|Perseus|l=arch}}'') | ||
| + | |- | ||
| + | | [[2022]] || <!-- Neoverse CSS N2 (''Genesis'') <br>--> {{armh|Neoverse V2|l=arch}} (''{{armh|Demeter|l=arch}}'') | ||
| + | |- | ||
| + | | [[2023]] || {{armh|Neoverse E3|l=arch}} (''{{armh|Aphrodite|l=arch}}'') <br>{{armh|Neoverse N3|l=arch}} (''{{armh|Hermes|l=arch}}'') <br>{{armh|Neoverse V3|l=arch}} (''{{armh|Poseidon|l=arch}}'') | ||
| + | |- | ||
| + | | [[2024]] || Neoverse V3AE ([[#ARM Zena|Zena V3AE]])<!--(''Poseidon-AE'')--><br>Neoverse VN<!--(''Poseidon-VN'')--> | ||
| + | |- | ||
| + | | [[2025]] || {{armh|Neoverse E4|l=arch}} (''{{armh|Lycius|l=arch}}'') <br>{{armh|Neoverse N4|l=arch}} (''{{armh|Dionysus|l=arch}}'') <br>{{armh|Neoverse V4|l=arch}} (''{{armh|Adonis|l=arch}}'') <!-- | ||
| + | Neoverse CSS N4 (Ranger), Neoverse CSS V4 (Vega) --> | ||
| + | |- | ||
| + | |} | ||
| + | |} | ||
| + | |||
| + | == Specifications == | ||
| + | *[https://en.namu.wiki/w/ARM%20Cortex-A%20시리즈#s-1 Spec.] | ||
| + | |||
| + | === Cortex-A === | ||
| + | {| class="wikitable" style="text-align: center; | ||
| + | |- | ||
| + | ! Year !! [[Microarchitecture|µArch]] !! {{arm|Versions|ISA}} !! Decoder !! Out-of-order <br>execution buffer !! ALU/FPU/LSU !! L1 Cache (KiB)<br>I (Instruction) + D (Data) || Performance<br>(per clock) | ||
| + | |- | ||
| + | ! colspan="8" | Little Core target | ||
| + | |- | ||
| + | | [[2014]] || {{armh|Cortex-A53|l=arch}} || [[ARMv8]].0-A || 2-wide || unsupported || 2/1/1 || 8/64 + 8/64 || 82 | ||
| + | |- | ||
| + | | [[2017]] || {{armh|Cortex-A55|l=arch}} || [[ARMv8]].2-A || 2-wide || unsupported || 2/2/2 || 16/64 + 16/64 || 89 | ||
| + | |- | ||
| + | | [[2021]] || {{armh|Cortex-A510|l=arch}} || [[ARMv9]].0-A || 3-wide || unsupported || 3/2*/2 || 32/64 + 32/64 || - | ||
| + | |- | ||
| + | | [[2023]] || {{armh|Hayes|Cortex-A520|l=arch}} || [[ARMv9]].2-A || 3-wide || unsupported || 2/2*/2 || 32/64 + 32/64 || - | ||
| + | |- | ||
| + | | [[2025]] || {{armh|Cortex-A530|l=arch}} || [[ARMv9]].3-A || 3-wide || unsupported || // || + || - | ||
| + | |- | ||
| + | ! colspan="8" | Big/Middle Core target | ||
| + | |- | ||
| + | | [[2014]] || {{armh|Cortex-A57|l=arch}} || [[ARMv8]].0-A || 3-wide || 128 || 2/2/2 || 48 + 32 || 127 | ||
| + | |- | ||
| + | | [[2015]] || {{armh|Cortex-A72|l=arch}} || [[ARMv8]].0-A || 3-wide || 128 || 2/2/2 || 48 + 32 || 147 | ||
| + | |- | ||
| + | | [[2016]] || {{armh|Cortex-A73|l=arch}} || [[ARMv8]].0-A || 2-wide || 128 || 2/2/2 || 64 + 32 || 157 | ||
| + | |- | ||
| + | | [[2017]] || {{armh|Cortex-A75|l=arch}} || [[ARMv8]].2-A || 3-wide || 128 || 2/3/2 || 64 + 64 || 177 | ||
| + | |- | ||
| + | | [[2018]] || {{armh|Cortex-A76|l=arch}} || [[ARMv8]].2-A || 4-wide || 128 || 3/2/2 || 64 + 64 || 265 | ||
| + | |- | ||
| + | | [[2019]] || {{armh|Cortex-A77|l=arch}} || [[ARMv8]].2-A || 4-wide || 160 || 4/2/2 || 64 + 64 || 306 | ||
| + | |- | ||
| + | | [[2020]] || {{armh|Cortex-A78|l=arch}} || [[ARMv8]].2-A || 4-wide || 160 || 4/2/3 || 32/64 + 32/64 || 325 | ||
| + | |- | ||
| + | | [[2021]] || {{armh|Cortex-A710|l=arch}} || [[ARMv9]].0-A || 4-wide || - || // || 32/64 + 32/64 || - | ||
| + | |- | ||
| + | | [[2022]] || {{armh|Cortex-A715|l=arch}} || [[ARMv9]].0-A || 5-wide || 192 || // || 32/64 + 32/64 || - | ||
| + | |- | ||
| + | | [[2023]] || {{armh|Hunter|Cortex-A720|l=arch}} || [[ARMv9]].2-A || 5-wide || - || // || 32/64 + 32/64 || - | ||
| + | |- | ||
| + | | [[2024]] || {{armh|Chaberton|Cortex-A725|l=arch}} || [[ARMv9]].2-A || 5-wide || - || // || 32/64 + 32/64 || - | ||
| + | |- | ||
| + | | [[2025]] || {{armh|Cortex-A730|l=arch}} || [[ARMv9]].3-A || 5-wide || - || // || + || - | ||
| + | |- | ||
| + | |} | ||
| + | |||
| + | ==== Comparison ==== | ||
| + | :;"LITTLE" core | ||
| + | {| class="wikitable sortable" cellpadding="3px" style="border: 1px solid black; border-spacing: 0px; width: 100%; text-align:center; | ||
| + | |- | ||
| + | ! [[Microarchitecture|µArch]] | ||
| + | ! {{armh|Cortex-A53|l=arch}} | ||
| + | ! {{armh|Cortex-A55|l=arch}} | ||
| + | ! {{armh|Cortex-A510|l=arch}} | ||
| + | ! {{armh|Cortex-A520|l=arch}} | ||
| + | ! {{armh|Cortex-A530|l=arch}} | ||
| + | |- | ||
| + | ! Codename | ||
| + | | ''{{armh|Apollo|l=arch}}'' | ||
| + | | ''{{armh|Ananke|l=arch}}'' | ||
| + | | ''{{armh|Klein|l=arch}}'' | ||
| + | | ''{{armh|Hayes|l=arch}}'' | ||
| + | | Lumex C1-Nano ''(Nevis)'' | ||
| + | |- | ||
| + | ! Peak clock speed | ||
| + | | 2.3 GHz | ||
| + | | 2.1 GHz | ||
| + | | 2.0 GHz | ||
| + | | 2.0 GHz | ||
| + | | 2.0 GHz | ||
| + | |- | ||
| + | ! Architecture | ||
| + | | [[ARMv8]].0-A | ||
| + | | [[ARMv8]].2-A | ||
| + | | [[ARMv9]].0-A | ||
| + | | [[ARMv9]].2-A | ||
| + | | [[ARMv9]].3-A | ||
| + | |- | ||
| + | ! '''AArch''' | ||
| + | | colspan="3" | 32-bit and 64-bit | ||
| + | | colspan="2" | 64-bit | ||
| + | |- | ||
| + | ! '''L1 (I + D)''' (KiB) | ||
| + | | 8/64 + 8/64 KiB | ||
| + | | 16/64 + 16/64 KiB | ||
| + | | colspan="2" | 32/64 + 32/64 KiB | ||
| + | | - | ||
| + | |- | ||
| + | ! L2 Cache (KiB) | ||
| + | | colspan="2" | 0–256 KiB | ||
| + | | colspan="2" | 0–512 KiB | ||
| + | | - | ||
| + | |- | ||
| + | ! L3 Cache (MiB) | ||
| + | | - | ||
| + | | 0–4 MiB | ||
| + | | 0–16 MiB | ||
| + | | 0–32 MiB | ||
| + | | 0–32 MiB | ||
| + | |- | ||
| + | ! Decode width | ||
| + | | colspan="2" | 2-way | ||
| + | | 3-way | ||
| + | | 3-way (2 ALU) | ||
| + | | 3-way | ||
| + | |- | ||
| + | ! Dispatch | ||
| + | | colspan="2" | 8 Mops/cycle | ||
| + | | - | ||
| + | | - | ||
| + | | - | ||
| + | |- | ||
| + | |} | ||
| + | |||
| + | :;"big" core | ||
| + | {| class="wikitable sortable" cellpadding="3px" style="border: 1px solid black; border-spacing: 0px; width: 100%; text-align:center; | ||
| + | |- | ||
| + | ! [[Microarchitecture|µArch]] | ||
| + | ! {{armh|Cortex-A77|l=arch}} | ||
| + | ! {{armh|Cortex-A78|l=arch}} | ||
| + | ! {{armh|Cortex-A710|l=arch}} | ||
| + | ! {{armh|Cortex-A715|l=arch}} | ||
| + | ! {{armh|Cortex-A720|l=arch}} | ||
| + | ! {{armh|Cortex-A725|l=arch}} | ||
| + | ! {{armh|Cortex-A730|l=arch}} | ||
| + | |- | ||
| + | ! Codename | ||
| + | | ''{{armh|Deimos|l=arch}}'' | ||
| + | | ''{{armh|Hercules|l=arch}}'' | ||
| + | | ''{{armh|Matterhorn|l=arch}}'' | ||
| + | | ''{{armh|Makalu|l=arch}}'' | ||
| + | | ''{{armh|Hunter|l=arch}}'' | ||
| + | | ''{{armh|Chaberton|l=arch}}'' | ||
| + | | Lumex C1-Pro ''(Gelas)'' | ||
| + | |- | ||
| + | ! Peak clock speed | ||
| + | | 2.6 GHz | ||
| + | | colspan="4" | ~3.0 GHz | ||
| + | | 2.5 GHz | ||
| + | | 2.5 GHz | ||
| + | |- | ||
| + | ! Architecture | ||
| + | | colspan="2" | [[ARMv8]].2-A | ||
| + | | colspan="2" | [[ARMv9]].0-A | ||
| + | | colspan="2" | [[ARMv9]].2-A | ||
| + | | [[ARMv9]].3-A | ||
| + | |- | ||
| + | ! AArch | ||
| + | | - | ||
| + | | colspan="2" | 32-bit and 64-bit | ||
| + | | colspan="2" | 64-bit | ||
| + | | colspan="2" | 64-bit | ||
| + | |- | ||
| + | ! Max In-flight | ||
| + | | 2x 160 | ||
| + | | 2x 160 | ||
| + | | ? | ||
| + | | 2x 192+ <ref>{{cite book |title=Arm introduces Cortex-A715 |url=https://fuse.wikichip.org/news/6853/arm-introduces-the-cortex-a715/ |website=WikiChip Fuse |date=2022-06-28}}</ref> | ||
| + | | ? | ||
| + | | - | ||
| + | | - | ||
| + | |- | ||
| + | ! L0 (Mops entries) | ||
| + | | - | ||
| + | | colspan="2" | 1536 | ||
| + | | colspan="2" | 0 | ||
| + | | - | ||
| + | | - | ||
| + | |- | ||
| + | ! '''L1 (I + D)''' (KiB) | ||
| + | | 64 + 64 KiB | ||
| + | | colspan="4" | 32/64 + 32/64 KiB | ||
| + | | 64 + 64 KiB | ||
| + | | - | ||
| + | |- | ||
| + | ! L2 Cache (KiB) | ||
| + | | 256–512 KiB | ||
| + | | colspan="4" | 128–512 KiB | ||
| + | | 0.25–1 MiB <ref>{{cite book |title=Arm launches next gen big core Cortex-A725 |website=WikiChip Fuse |url=https://fuse.wikichip.org/news/7829/arm-launches-next-gen-big-core-cortex-a725/ |date=2024-05-29}}</ref><!-- From 32K/512K/8M L1/2/3 on the Cortex-A720 to 64K/1M/16M L1/2/3 on the new Cortex-A725 ? --> | ||
| + | | - | ||
| + | |- | ||
| + | ! L3 Cache (MiB) | ||
| + | | 0–4 MiB | ||
| + | | 0–8 MiB | ||
| + | | colspan="2" | 0–16 MiB | ||
| + | | colspan="2" | 0–32 MiB <ref>{{cite book |title=Arm introduces a new big core Cortex-A720 |website=WikiChip Fuse |url=https://fuse.wikichip.org/news/7529/arm-introduces-a-new-big-core-the-cortex-a720/ |date=2023-05-28}}</ref> | ||
| + | | 0–32 MiB | ||
| + | |- | ||
| + | ! Decode width | ||
| + | | colspan="3" | 4-way | ||
| + | | colspan="3" | 5-way | ||
| + | | 5-way | ||
| + | |- | ||
| + | ! Dispatch | ||
| + | | colspan="2" | 6 Mops/cycle | ||
| + | | colspan="2" | 5 Mops/cycle | ||
| + | | ? | ||
| + | | - | ||
| + | | - | ||
| + | |- | ||
| + | |} | ||
| + | |||
| + | === Cortex-X === | ||
| + | :;"Prime" core | ||
| + | {| class="wikitable sortable" cellpadding="3px" style="border: 1px solid black; border-spacing: 0px; width: 100%; text-align:center; | ||
| + | |- | ||
| + | ! [[Microarchitecture|µArch]] | ||
| + | ! {{armh|Cortex-X1|l=arch}}(C) | ||
| + | ! {{armh|Cortex-X2|l=arch}} | ||
| + | ! {{armh|Cortex-X3|l=arch}} | ||
| + | ! {{armh|Cortex-X4|l=arch}} <!-- | ||
| + | ! <s>{{armh|Cortex-X5|l=arch}}</s> --> | ||
| + | ! {{armh|Cortex-X925|l=arch}} | ||
| + | ! {{armh|Cortex-X930|l=arch}} | ||
| + | ! {{armh|Cortex-X930|l=arch}} | ||
| + | |- | ||
| + | ! Codename | ||
| + | | ''{{armh|Hera|l=arch}}(-C)'' | ||
| + | | ''{{armh|Matterhorn-ELP|l=arch}}'' | ||
| + | | ''{{armh|Makalu-ELP|l=arch}}'' | ||
| + | | ''{{armh|Hunter-ELP|l=arch}}'' | ||
| + | | ''{{armh|Blackhawk|l=arch}}''<br><s>''({{armh|Chaberton-ELP|l=arch}})''</s> | ||
| + | | Lumex C1-Ultra<br>''(Travis)'' | ||
| + | | Lumex C1-Premium<br>''(Alto)'' | ||
| + | |- | ||
| + | ! Peak clock speed | ||
| + | | 3.0 GHz | ||
| + | | 3.0 GHz | ||
| + | | 3.2 GHz | ||
| + | | 3.3 GHz | ||
| + | | 3.6 GHz | ||
| + | | 4.1 GHz | ||
| + | | 4.1 GHz | ||
| + | |- | ||
| + | ! Architecture | ||
| + | | [[ARMv8]].2-A | ||
| + | | colspan="2" | [[ARMv9]].0-A | ||
| + | | colspan="2" | [[ARMv9]].2-A | ||
| + | | colspan="2" | [[ARMv9]].3-A | ||
| + | |- | ||
| + | ! AArch | ||
| + | | 32/64-bit | ||
| + | | colspan="2" | 64-bit (SVE/SVE2) | ||
| + | | colspan="2" | 64-bit (SVE/SVE2) | ||
| + | | colspan="2" | 64-bit (SVE/SVE2/SME2) | ||
| + | |- | ||
| + | ! Max in-flight | ||
| + | | 2x 224 <ref>{{cite book |last=Schor |first=David |date=2020-05-26 |title=Arm Cortex-X1: The First From The Cortex-X Custom Program |url=https://fuse.wikichip.org/news/3543/arm-cortex-x1-the-first-from-the-cortex-x-custom-program/ |website=WikiChip Fuse}}</ref> | ||
| + | | 2x 288 | ||
| + | | 2x 320 | ||
| + | | 2x 384 | ||
| + | | 2x 768 <ref>https://www.androidauthority.com/arm-cortex-x925-g925-explained-3445480/</ref> | ||
| + | | colspan="2" | - | ||
| + | |- | ||
| + | ! L0 (Mops entries) | ||
| + | | colspan="2" | 3072 <ref>{{cite book |title=Arm's New Cortex-A78 and Cortex-X1 Microarchitectures: An Efficiency and Performance Divergence |url=https://www.anandtech.com/show/15813/arm-cortex-a78-cortex-x1-cpu-ip-diverging |website=www.anandtech.com}}</ref> | ||
| + | | 1536 | ||
| + | | 0 <ref>{{cite book |title=Arm Cortex-X4, A720, and A520: 2024 smartphone CPUs deep dive |url=https://www.androidauthority.com/arm-cortex-x4-explained-3328008/ |website=Android Authority}}</ref> | ||
| + | | - | ||
| + | | colspan="2" | - | ||
| + | |- | ||
| + | ! '''L1 (I + D)''' (KiB) | ||
| + | | colspan="2" | 64 + 64 KiB | ||
| + | | colspan="2" | 64 + 64 KiB | ||
| + | | 64 + 64 KiB | ||
| + | | colspan="2" | 64 + 128 KiB | ||
| + | |- | ||
| + | ! L2 Cache (KiB) | ||
| + | | colspan="3" | 0.25–1 MiB | ||
| + | | 0.5–2 MiB | ||
| + | | 2–3 MiB | ||
| + | | colspan="2" | 2–3 MiB | ||
| + | |- | ||
| + | ! L3 Cache (MiB) | ||
| + | | 0–8 MiB | ||
| + | | colspan="2" |0–16 MiB | ||
| + | | colspan="2" |0–32 MiB | ||
| + | | colspan="2" |0–32 MiB | ||
| + | |- | ||
| + | ! Dispatch | ||
| + | | colspan="3" | 8 Mops/cycle | ||
| + | | colspan="2" | 10 Mops/cycle | ||
| + | | colspan="2" | 10 Mops/cycle | ||
| + | |- | ||
| + | ! Decode width | ||
| + | | colspan="2" | 5-way | ||
| + | | 6-way | ||
| + | | colspan="2" | 10-way | ||
| + | | colspan="2" | 10-way | ||
| + | |- | ||
| + | ! ALU | ||
| + | | colspan="2" | 4 | ||
| + | | 6 | ||
| + | | colspan="2" | 8 | ||
| + | | colspan="2" | 8 | ||
| + | |- | ||
| + | ! FP/SIMD | ||
| + | | colspan="2" | 4 | ||
| + | | 4 | ||
| + | | 4 | ||
| + | | 6 | ||
| + | | colspan="2" | 6 | ||
| + | |||
| + | |- | ||
| + | ! DSU | ||
| + | | colspan="2" | DSU-110 | ||
| + | | DSU-110 | ||
| + | | colspan="2" | DSU-120 | ||
| + | | colspan="2" | Lumex C1-DSU | ||
| + | |- | ||
| + | ! GPU | ||
| + | | colspan="2" | Mali-G710 | ||
| + | | Immortalis<br>-G715 | ||
| + | | Immortalis<br>-G720 | ||
| + | | Immortalis<br>-G925 | ||
| + | | colspan="2" | Mali G1-Ultra,<br>Mali G1-Premium, <br>Mali G1-Pro | ||
| + | |- | ||
| + | ! Fabric | ||
| + | | colspan="2" | 5 nm | ||
| + | | 4 nm | ||
| + | | 4 nm | ||
| + | | 3 nm | ||
| + | | colspan="2" | 3 nm | ||
| + | |- | ||
| + | |} | ||
| + | |||
| + | * [https://pc.watch.impress.co.jp/docs/column/ubiq/2046162.html ARM Lumex CSS Platform] | ||
| + | |||
| + | === Part numbers === | ||
| + | :;[[ARM]] • 0x41 | ||
| + | <!-- if (Implementer == "0x41") { // ARM Ltd. | ||
| + | // The CPU part is a 3 digit hexadecimal number with a 0x prefix. | ||
| + | // The values correspond to the "Part number" in the CP15/c0 register. | ||
| + | // The contents are specified in the various processor manuals. | ||
| + | // This corresponds to the Main ID Register in Technical Reference Manuals and | ||
| + | // is used in programs like sys-utils return StringSwitch <const char *> (Part) --> | ||
| + | |||
| + | {| border="0" cellpadding="5" width="75%" | ||
| + | |- | ||
| + | |width="30%" valign="top" align="left"| | ||
| + | {| class="wikitable sortable" cellpadding="3px" style="border: 1px solid black; border-spacing: 0px; width: 95%; text-align:center; | ||
| + | |- | ||
| + | ! Part number !! [[Microarchitecture|µArch]] | ||
| + | |- | ||
| + | | 0x926 || ARM926EJ-S | ||
| + | |- | ||
| + | | 0xb02 || MPCore | ||
| + | |- | ||
| + | | 0xb36 || ARM1136J-S | ||
| + | |- | ||
| + | | 0xb56 || ARM1156T2-S | ||
| + | |- | ||
| + | | 0xb76 || ARM1176JZ-S | ||
| + | |- | ||
| + | | | ||
| + | |- | ||
| + | | 0xc05 || {{armh|Cortex-A5|l=arch}} | ||
| + | |- | ||
| + | | 0xc07 || {{armh|Cortex-A7|l=arch}} | ||
| + | |- | ||
| + | | 0xc08 || {{armh|Cortex-A8|l=arch}} | ||
| + | |- | ||
| + | | 0xc09 || {{armh|Cortex-A9|l=arch}} | ||
| + | |- | ||
| + | | 0xc0f || {{armh|Cortex-A15|l=arch}} | ||
| + | |- | ||
| + | | 0xc0e || {{armh|Cortex-A17|l=arch}} | ||
| + | |- | ||
| + | | | ||
| + | |- | ||
| + | | 0xc18 || Cortex-R8 | ||
| + | |- | ||
| + | | 0xd13 || Cortex-R52 | ||
| + | |- | ||
| + | | 0xd16 || Cortex-R52+ | ||
| + | |- | ||
| + | | 0xd15 || Cortex-R82 | ||
| + | |- | ||
| + | | 0xd14 || Cortex-R82AE ° | ||
| + | |- | ||
| + | | | ||
| + | |- | ||
| + | | 0xc20 || Cortex-M0 | ||
| + | |- | ||
| + | | 0xc23 || Cortex-M3 | ||
| + | |- | ||
| + | | 0xc24 || Cortex-M4 | ||
| + | |- | ||
| + | | 0xc27 || Cortex-M7 | ||
| + | |- | ||
| + | | 0xd20 || Cortex-M23 | ||
| + | |- | ||
| + | | 0xd21 || Cortex-M33 | ||
| + | |- | ||
| + | | 0xd24 || Cortex-M52 | ||
| + | |- | ||
| + | | 0xd22 || {{armh|Cortex-M55|l=arch}} | ||
| + | |- | ||
| + | | 0xd23 || Cortex-M85 | ||
| + | |- | ||
| + | |} | ||
| + | |width="30%" valign="top" align="left"| | ||
| + | {| class="wikitable sortable" cellpadding="3px" style="border: 1px solid black; border-spacing: 0px; width: 95%; text-align:center; | ||
| + | |- | ||
| + | ! Part number !! [[Microarchitecture|µArch]] | ||
| + | |- | ||
| + | | 0xd02 || {{armh|Cortex-A34|l=arch}} | ||
| + | |- | ||
| + | | 0xd04 || {{armh|Cortex-A35|l=arch}} | ||
| + | |- | ||
| + | | 0xd03 || {{armh|Cortex-A53|l=arch}} | ||
| + | |- | ||
| + | | 0xd05 || {{armh|Cortex-A55|l=arch}} | ||
| + | |- | ||
| + | | 0xd07 || {{armh|Cortex-A57|l=arch}} | ||
| + | |- | ||
| + | | 0xd06 || {{armh|Cortex-A65|l=arch}} | ||
| + | |- | ||
| + | | 0xd43 || Cortex-A65AE ° | ||
| + | |- | ||
| + | | | ||
| + | |- | ||
| + | | 0xd08 || {{armh|Cortex-A72|l=arch}} | ||
| + | |- | ||
| + | | 0xd09 || {{armh|Cortex-A73|l=arch}} | ||
| + | |- | ||
| + | | 0xd0a || {{armh|Cortex-A75|l=arch}} | ||
| + | |- | ||
| + | | 0xd0b || {{armh|Cortex-A76|l=arch}} | ||
| + | |- | ||
| + | | 0xd0e || Cortex-A76AE ° | ||
| + | |- | ||
| + | | 0xd0d || {{armh|Cortex-A77|l=arch}} | ||
| + | |- | ||
| + | | 0xd41 || {{armh|Cortex-A78|l=arch}} | ||
| + | |- | ||
| + | | 0xd42 || Cortex-A78AE ° | ||
| + | |- | ||
| + | | 0xd4b || Cortex-A78C | ||
| + | |- | ||
| + | | | ||
| + | |- | ||
| + | | 0xd46 || {{armh|Cortex-A510|l=arch}} | ||
| + | |- | ||
| + | | 0xd80 || {{armh|Cortex-A520|l=arch}} | ||
| + | |- | ||
| + | | 0xd88 || Cortex-A520AE ° | ||
| + | |- <!-- | ||
| + | | 0xd8a || <s>Cortex-A530</s> <!-- Lumex C1-Nano --> | ||
| + | |- --> | ||
| + | | 0xd47 || {{armh|Cortex-A710|l=arch}} | ||
| + | |- | ||
| + | | 0xd4d || {{armh|Cortex-A715|l=arch}} | ||
| + | |- | ||
| + | | 0xd81 || {{armh|Cortex-A720|l=arch}} | ||
|- | |- | ||
| − | | | + | | 0xd89 || Cortex-A720AE ° |
| + | |- | ||
| + | | 0xd87 || {{armh|Cortex-A725|l=arch}} | ||
| + | |- <!-- | ||
| + | | 0xd8b || <s>Cortex-A730</s> <!-- Lumex C1-Pro --> | ||
| + | |- --> | ||
| + | | 0xd8f || Cortex-A320 ^<!-- Lumex C1-Pico ? --> | ||
|- | |- | ||
|} | |} | ||
| + | |width="30%" valign="top" align="left"| | ||
| + | {| class="wikitable sortable" cellpadding="3px" style="border: 1px solid black; border-spacing: 0px; width: 95%; text-align:center; | ||
| + | |- | ||
| + | ! Part number !! [[Microarchitecture|µArch]] | ||
| + | |- | ||
| + | | 0xd44 || {{armh|Cortex-X1|l=arch}} | ||
| + | |- | ||
| + | | 0xd4c || Cortex-X1C | ||
| + | |- | ||
| + | | 0xd48 || {{armh|Cortex-X2|l=arch}} | ||
| + | |- | ||
| + | | 0xd4e || {{armh|Cortex-X3|l=arch}} | ||
| + | |- | ||
| + | | 0xd82 || {{armh|Cortex-X4|l=arch}} | ||
| + | |- | ||
| + | | 0xd85 || {{armh|Cortex-X925|l=arch}} | ||
| + | |- <!-- | ||
| + | | 0xd8c || <s>Cortex-X930</s> <!-- Lumex C1-Ultra --> | ||
| + | |- --> | ||
| + | | | ||
| + | |- | ||
| + | | 0xd8f || Lumex C1-Pico ? ^ <!-- ex Cortex-A320 ? --> | ||
| + | |- | ||
| + | | 0xd8a || Lumex C1-Nano ^ <!-- ex Cortex-A530 --> | ||
| + | |- | ||
| + | | 0xd8b || Lumex C1-Pro ^ <!-- ex Cortex-A730 --> | ||
| + | |- | ||
| + | | 0xd90 || Lumex C1-Premium <!-- Cortex-X930 (Alto) --> | ||
| + | |- | ||
| + | | 0xd8c || Lumex C1-Ultra ^ <!-- Cortex-X930 (Travis) --> | ||
| + | |- | ||
| + | | | ||
| + | |- | ||
| + | | 0xd4a || {{armh|Neoverse E1|l=arch}} | ||
| + | |- | ||
| + | | 0xd0c || {{armh|Neoverse N1|l=arch}} | ||
| + | |- | ||
| + | | 0xd49 || {{armh|Neoverse N2|l=arch}} | ||
| + | |- | ||
| + | | 0xd8e || {{armh|Neoverse N3|l=arch}} | ||
| + | |- | ||
| + | | 0xd40 || {{armh|Neoverse V1|l=arch}} | ||
| + | |- | ||
| + | | 0xd4f || {{armh|Neoverse V2|l=arch}} | ||
| + | |- | ||
| + | | 0xd84 || {{armh|Neoverse V3|l=arch}} | ||
| + | |- | ||
| + | | 0xd83 || Neoverse-V3AE ° | ||
| + | |- | ||
|} | |} | ||
| + | |} | ||
| + | |||
| + | Note: ''Orbis'' (ex Cortex-M) • [[#ARM Orbis|Orbis series]] | ||
| + | :° - ''Zena'' (ex Cortex-AxxAE) • [[#ARM Zena|Zena series]] | ||
| + | :^ - ''Lumex'' C1 (ex Cortex-A/X) • [[#ARM Lumex|Lumex series]] | ||
| + | :+ - ''Neoverse'' • [[Neoverse|Neoverse series]] | ||
| + | <!-- | ||
| + | <pre> | ||
| + | *[https://gpages.juszkiewicz.com.pl/arm-socs-table/arm-cpu-cores.html Build info] • Table generated on 10 September 2025 07:42 UTC. | ||
| + | |||
| + | • CPU core name Architecture level ID number AArch32 support physical memory address size (bits) virtual memory address size (bits) supported page sizes SVE vector length | ||
| + | |||
| + | Cortex-A34 v8.0 0xd02 NO 40 4k, 16k, 64k | ||
| + | Cortex-A53 v8.0 0xd03 EL0-EL3 40 4k, 64k | ||
| + | Cortex-A35 v8.0 0xd04 EL0-EL3 40 4k, 16k, 64k | ||
| + | Cortex-A55 v8.2 0xd05 EL0-EL3 40 48 4k, 16k, 64k | ||
| + | Cortex-A65 v8.2 0xd06 NO 44 48 4k, 16k, 64k | ||
| + | Cortex-A57 v8.0 0xd07 EL0-EL3 44 4k, 64k | ||
| + | Cortex-A72 v8.0 0xd08 EL0-EL3 44 4k, 64k | ||
| + | Cortex-A73 v8.0 0xd09 EL0-EL3 40 4k, 16k, 64k | ||
| + | Cortex-A75 v8.2 0xd0a EL0-EL3 44 4k, 16k, 64k | ||
| + | Cortex-A76 v8.2 0xd0b EL0 40 48 4k, 16k, 64k | ||
| + | Neoverse-N1 v8.2 0xd0c EL0 48 48 4k, 16k, 64k | ||
| + | Cortex-A77 v8.2 0xd0d EL0 40 48 4k, 16k, 64k | ||
| + | Cortex-A76AE v8.2 0xd0e EL0 40 48 4k, 16k, 64k | ||
| + | Neoverse-V1 v8.4 0xd40 EL0 48 48 4k, 16k, 64k 256 | ||
| + | Cortex-A78 v8.2 0xd41 EL0 40 48 4k, 16k, 64k | ||
| + | Cortex-A78AE v8.2 0xd42 EL0 48 48 4k, 16k, 64k | ||
| + | Cortex-A65AE v8.2 0xd43 NO 44 48 4k, 16k, 64k | ||
| + | Cortex-X1 v8.2 0xd44 EL0 40 48 4k, 16k, 64k | ||
| + | Cortex-A510 v9.0 0xd46 NO/EL0 40 48 4k, 16k, 64k 128 | ||
| + | Cortex-A710 v9.0 0xd47 EL0 40 48 4k, 16k, 64k 128 | ||
| + | Cortex-X2 v9.0 0xd48 NO 40 48 4k, 16k, 64k 128 | ||
| + | Neoverse-N2 v9.0 0xd49 EL0 48 48 4k, 16k, 64k 128 | ||
| + | Neoverse-E1 v8.2 0xd4a NO 44 48 4k, 16k, 64k | ||
| + | Cortex-A78C v8.2 0xd4b EL0 40 48 4k, 16k, 64k | ||
| + | Cortex-X1C v8.2 0xd4c EL0 40 48 4k, 16k, 64k | ||
| + | Cortex-A715 v9.0 0xd4d NO 40 48 4k, 16k, 64k 128 | ||
| + | Cortex-X3 v9.0 0xd4e NO 40 48 4k, 16k, 64k 128 | ||
| + | Neoverse-V2 v9.0 0xd4f NO 48 48 4k, 16k, 64k 128 | ||
| + | Cortex-A520 v9.2 0xd80 NO 40 48 4k, 16k, 64k 128 | ||
| + | Cortex-A720 v9.2 0xd81 NO 40 48 4k, 16k, 64k 128 | ||
| + | Cortex-X4 v9.2 0xd82 NO 40 48 4k, 16k, 64k 128 | ||
| + | Neoverse-V3 v9.2 0xd84 NO 48 48 4k, 16k, 64k 128 | ||
| + | Cortex-X925 v9.2 0xd85 NO 40 48 4k, 16k, 64k 128 | ||
| + | Cortex-A725 v9.2 0xd87 NO 40 48 4k, 16k, 64k 128 | ||
| + | C1-Nano v9.3 0xd8a NO 40 48 4k, 16k, 64k 128 | ||
| + | C1-Pro v9.3 0xd8b NO 40 48 4k, 16k, 64k 128 | ||
| + | C1-Ultra v9.3 0xd8c NO 40 48 4k, 16k, 64k 128 | ||
| + | Neoverse-N3 v9.2 0xd8e NO 48 48 4k, 16k, 64k 128 | ||
| + | Cortex-A320 v9.2 0xd8f NO 40 48 4k, 16k, 64k 128 | ||
| + | C1-Premium v9.3 0xd90 NO 40 48 4k, 16k, 64k 128 | ||
| + | </pre> | ||
| + | --> | ||
| + | |||
| + | == ARM Lumex == | ||
| + | *[https://pc.watch.impress.co.jp/docs/column/ubiq/2046162.html ARM Lumex CSS Platform] | ||
| + | :• CPU: C1 • ARMv9.3-A, SME2, [[3 nm]] | ||
| + | :;Lumex C1 series (mobile) | ||
| + | *Lumex C1-Ultra • <s>Cortex-X930</s> (Travis) | ||
| + | *Lumex C1-Premium • <s>Cortex-X930</s> (Alto) | ||
| + | *Lumex C1-Pro • <s>Cortex-A730</s> (Gelas) | ||
| + | *Lumex C1-Nano • <s>Cortex-A530</s> (Nevis) | ||
| + | |||
| + | :;Mali G1 series (GPU) | ||
| + | :• GPU: Immortalis-G925 -> Mali G1 | ||
| + | * Mali G1-Ultra | ||
| + | * Mali G1-Premium | ||
| + | * Mali G1-Pro | ||
| + | |||
| + | == ARM Niva == | ||
| + | :PC, Notebooks | ||
| + | |||
| + | == ARM Orbis == | ||
| + | :Orbis series (IoT) • Cortex-M | ||
| + | *Cortex-M0+ • Orbis Pico0+ | ||
| + | * Nano | ||
| + | * Pro | ||
| + | * Premium | ||
| + | * Ultra | ||
| + | |||
| + | == ARM Zena == | ||
| + | :Automotive | ||
| + | * Cortex-A65AE • ARMv8-A | ||
| + | * Cortex-A76AE • ARMv8-A | ||
| + | * Cortex-A78AE • ARMv8-A • Zena Premium 78AE | ||
| + | * Cortex-R82AE • ARMv8-R | ||
| + | * Cortex-A520AE • ARMv9-A | ||
| + | * Cortex-A720AE • ARMv9-A | ||
| + | * [[Neoverse]] V3AE • ARMv9-A | ||
| + | * Mali-C720AE • GPU | ||
== See also == | == See also == | ||
| − | * ARM {{arm|Versions}} | + | * [[ARM]] {{arm|Versions}} |
| − | * {{\\|Neoverse}} | + | * [[Cortex]] series |
| + | * {{\\|Neoverse}} series (infrastructure) | ||
| + | * Lumex series (mobile) • C1 | ||
| + | * Niva series (PC, notebooks) | ||
| + | * Orbis series (IoT) • Cortex-M | ||
| + | * Zena series (automotive) • AE | ||
| + | |||
| + | == References == | ||
| + | |||
[[category:arm holdings]] | [[category:arm holdings]] | ||
Latest revision as of 11:05, 11 October 2025
Cortex is a family of specialized ARM microarchitectures designed by Arm for various edge market such as embedded and mobile. The Cortex family succeed Arm's classic cores with more specialized cores with highly targeted requirements
Contents
Overview[edit]
Cortex is a family of ARM cores that address a broad set of markets. First announced in 2004, Cortex cores have replaced Arm's classic cores with more market-specific variations. Cortex can be broadly categorized into three types of workloads: Applications, Real-time, Microcontroller (A.R.M).
- Cortex-A - Application processors. Designed for fully capable computers, running typical operating systems (Android, Windows, Linux, iOS). Those processors are found in anything from smartphones to tablets and laptops.
- Cortex-X - Application processors. Slightly enhanced version of the Cortex-A designs in order to to further optimize the Cortex-A design (in terms of PPA) for certain markets or workloads/
- Cortex-R - Real-time processors. Designed for real-time operating systems with very deterministic behavior. Those cores are typically less powerful than the A series and are used for things such as controllers, factory equipment, medical devices, and other machines.
- Cortex-M - Microcontrollers. Designed for ultra-low power, typically small factor and low-performance systems. Those are found in cost-sensitive devices and electronics, automated systems, and many other embedded devices.
Cores[edit]
- See also: arm/versions, neoverse, and zen
Cortex-A[edit]
Specifications[edit]
Cortex-A[edit]
| Year | µArch | ISA | Decoder | Out-of-order execution buffer |
ALU/FPU/LSU | L1 Cache (KiB) I (Instruction) + D (Data) |
Performance (per clock) |
|---|---|---|---|---|---|---|---|
| Little Core target | |||||||
| 2014 | Cortex-A53 | ARMv8.0-A | 2-wide | unsupported | 2/1/1 | 8/64 + 8/64 | 82 |
| 2017 | Cortex-A55 | ARMv8.2-A | 2-wide | unsupported | 2/2/2 | 16/64 + 16/64 | 89 |
| 2021 | Cortex-A510 | ARMv9.0-A | 3-wide | unsupported | 3/2*/2 | 32/64 + 32/64 | - |
| 2023 | Cortex-A520 | ARMv9.2-A | 3-wide | unsupported | 2/2*/2 | 32/64 + 32/64 | - |
| 2025 | Cortex-A530 | ARMv9.3-A | 3-wide | unsupported | // | + | - |
| Big/Middle Core target | |||||||
| 2014 | Cortex-A57 | ARMv8.0-A | 3-wide | 128 | 2/2/2 | 48 + 32 | 127 |
| 2015 | Cortex-A72 | ARMv8.0-A | 3-wide | 128 | 2/2/2 | 48 + 32 | 147 |
| 2016 | Cortex-A73 | ARMv8.0-A | 2-wide | 128 | 2/2/2 | 64 + 32 | 157 |
| 2017 | Cortex-A75 | ARMv8.2-A | 3-wide | 128 | 2/3/2 | 64 + 64 | 177 |
| 2018 | Cortex-A76 | ARMv8.2-A | 4-wide | 128 | 3/2/2 | 64 + 64 | 265 |
| 2019 | Cortex-A77 | ARMv8.2-A | 4-wide | 160 | 4/2/2 | 64 + 64 | 306 |
| 2020 | Cortex-A78 | ARMv8.2-A | 4-wide | 160 | 4/2/3 | 32/64 + 32/64 | 325 |
| 2021 | Cortex-A710 | ARMv9.0-A | 4-wide | - | // | 32/64 + 32/64 | - |
| 2022 | Cortex-A715 | ARMv9.0-A | 5-wide | 192 | // | 32/64 + 32/64 | - |
| 2023 | Cortex-A720 | ARMv9.2-A | 5-wide | - | // | 32/64 + 32/64 | - |
| 2024 | Cortex-A725 | ARMv9.2-A | 5-wide | - | // | 32/64 + 32/64 | - |
| 2025 | Cortex-A730 | ARMv9.3-A | 5-wide | - | // | + | - |
Comparison[edit]
- "LITTLE" core
| µArch | Cortex-A53 | Cortex-A55 | Cortex-A510 | Cortex-A520 | Cortex-A530 |
|---|---|---|---|---|---|
| Codename | Apollo | Ananke | Klein | Hayes | Lumex C1-Nano (Nevis) |
| Peak clock speed | 2.3 GHz | 2.1 GHz | 2.0 GHz | 2.0 GHz | 2.0 GHz |
| Architecture | ARMv8.0-A | ARMv8.2-A | ARMv9.0-A | ARMv9.2-A | ARMv9.3-A |
| AArch | 32-bit and 64-bit | 64-bit | |||
| L1 (I + D) (KiB) | 8/64 + 8/64 KiB | 16/64 + 16/64 KiB | 32/64 + 32/64 KiB | - | |
| L2 Cache (KiB) | 0–256 KiB | 0–512 KiB | - | ||
| L3 Cache (MiB) | - | 0–4 MiB | 0–16 MiB | 0–32 MiB | 0–32 MiB |
| Decode width | 2-way | 3-way | 3-way (2 ALU) | 3-way | |
| Dispatch | 8 Mops/cycle | - | - | - | |
- "big" core
| µArch | Cortex-A77 | Cortex-A78 | Cortex-A710 | Cortex-A715 | Cortex-A720 | Cortex-A725 | Cortex-A730 |
|---|---|---|---|---|---|---|---|
| Codename | Deimos | Hercules | Matterhorn | Makalu | Hunter | Chaberton | Lumex C1-Pro (Gelas) |
| Peak clock speed | 2.6 GHz | ~3.0 GHz | 2.5 GHz | 2.5 GHz | |||
| Architecture | ARMv8.2-A | ARMv9.0-A | ARMv9.2-A | ARMv9.3-A | |||
| AArch | - | 32-bit and 64-bit | 64-bit | 64-bit | |||
| Max In-flight | 2x 160 | 2x 160 | ? | 2x 192+ [1] | ? | - | - |
| L0 (Mops entries) | - | 1536 | 0 | - | - | ||
| L1 (I + D) (KiB) | 64 + 64 KiB | 32/64 + 32/64 KiB | 64 + 64 KiB | - | |||
| L2 Cache (KiB) | 256–512 KiB | 128–512 KiB | 0.25–1 MiB [2] | - | |||
| L3 Cache (MiB) | 0–4 MiB | 0–8 MiB | 0–16 MiB | 0–32 MiB [3] | 0–32 MiB | ||
| Decode width | 4-way | 5-way | 5-way | ||||
| Dispatch | 6 Mops/cycle | 5 Mops/cycle | ? | - | - | ||
Cortex-X[edit]
- "Prime" core
| µArch | Cortex-X1(C) | Cortex-X2 | Cortex-X3 | Cortex-X4 | Cortex-X925 | Cortex-X930 | Cortex-X930 |
|---|---|---|---|---|---|---|---|
| Codename | Hera(-C) | Matterhorn-ELP | Makalu-ELP | Hunter-ELP | Blackhawk |
Lumex C1-Ultra (Travis) |
Lumex C1-Premium (Alto) |
| Peak clock speed | 3.0 GHz | 3.0 GHz | 3.2 GHz | 3.3 GHz | 3.6 GHz | 4.1 GHz | 4.1 GHz |
| Architecture | ARMv8.2-A | ARMv9.0-A | ARMv9.2-A | ARMv9.3-A | |||
| AArch | 32/64-bit | 64-bit (SVE/SVE2) | 64-bit (SVE/SVE2) | 64-bit (SVE/SVE2/SME2) | |||
| Max in-flight | 2x 224 [4] | 2x 288 | 2x 320 | 2x 384 | 2x 768 [5] | - | |
| L0 (Mops entries) | 3072 [6] | 1536 | 0 [7] | - | - | ||
| L1 (I + D) (KiB) | 64 + 64 KiB | 64 + 64 KiB | 64 + 64 KiB | 64 + 128 KiB | |||
| L2 Cache (KiB) | 0.25–1 MiB | 0.5–2 MiB | 2–3 MiB | 2–3 MiB | |||
| L3 Cache (MiB) | 0–8 MiB | 0–16 MiB | 0–32 MiB | 0–32 MiB | |||
| Dispatch | 8 Mops/cycle | 10 Mops/cycle | 10 Mops/cycle | ||||
| Decode width | 5-way | 6-way | 10-way | 10-way | |||
| ALU | 4 | 6 | 8 | 8 | |||
| FP/SIMD | 4 | 4 | 4 | 6 | 6 | ||
| DSU | DSU-110 | DSU-110 | DSU-120 | Lumex C1-DSU | |||
| GPU | Mali-G710 | Immortalis -G715 |
Immortalis -G720 |
Immortalis -G925 |
Mali G1-Ultra, Mali G1-Premium, Mali G1-Pro | ||
| Fabric | 5 nm | 4 nm | 4 nm | 3 nm | 3 nm | ||
Part numbers[edit]
- ARM • 0x41
|
|
|
Note: Orbis (ex Cortex-M) • Orbis series
- ° - Zena (ex Cortex-AxxAE) • Zena series
- ^ - Lumex C1 (ex Cortex-A/X) • Lumex series
- + - Neoverse • Neoverse series
ARM Lumex[edit]
- • CPU: C1 • ARMv9.3-A, SME2, 3 nm
- Lumex C1 series (mobile)
- Lumex C1-Ultra •
Cortex-X930(Travis) - Lumex C1-Premium •
Cortex-X930(Alto) - Lumex C1-Pro •
Cortex-A730(Gelas) - Lumex C1-Nano •
Cortex-A530(Nevis)
- Mali G1 series (GPU)
- • GPU: Immortalis-G925 -> Mali G1
- Mali G1-Ultra
- Mali G1-Premium
- Mali G1-Pro
ARM Niva[edit]
- PC, Notebooks
ARM Orbis[edit]
- Orbis series (IoT) • Cortex-M
- Cortex-M0+ • Orbis Pico0+
- Nano
- Pro
- Premium
- Ultra
ARM Zena[edit]
- Automotive
- Cortex-A65AE • ARMv8-A
- Cortex-A76AE • ARMv8-A
- Cortex-A78AE • ARMv8-A • Zena Premium 78AE
- Cortex-R82AE • ARMv8-R
- Cortex-A520AE • ARMv9-A
- Cortex-A720AE • ARMv9-A
- Neoverse V3AE • ARMv9-A
- Mali-C720AE • GPU
See also[edit]
- ARM Versions
- Cortex series
- Neoverse series (infrastructure)
- Lumex series (mobile) • C1
- Niva series (PC, notebooks)
- Orbis series (IoT) • Cortex-M
- Zena series (automotive) • AE
References[edit]
- ↑ (2022-06-28) Arm introduces Cortex-A715.
- ↑ (2024-05-29) Arm launches next gen big core Cortex-A725.
- ↑ (2023-05-28) Arm introduces a new big core Cortex-A720.
- ↑ Schor, David (2020-05-26). Arm Cortex-X1: The First From The Cortex-X Custom Program.
- ↑ https://www.androidauthority.com/arm-cortex-x925-g925-explained-3445480/
- ↑ Arm's New Cortex-A78 and Cortex-X1 Microarchitectures: An Efficiency and Performance Divergence.
- ↑ Arm Cortex-X4, A720, and A520: 2024 smartphone CPUs deep dive.