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Ares - Microarchitectures - ARM
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Ares µarch
General Info
Arch TypeCPU
DesignerARM Holdings
ManufacturerTSMC
Introduction2019
Process7 nm
Pipeline
OoOEYes
SpeculativeYes
Reg RenamingYes
Succession

Ares is a high-performance ARM microarchitecture designed by ARM Holdings for the server market. This microarchitecture is designed as a synthesizable IP core and is sold to other semiconductor companies to be implemented in their own chips.

History[edit]

Arm's server roadmap.

Ares was first announced by Drew Henry, Arm’s SVP and GM of Infrastructure Business Unit, at his TechCon 2018 keynote. Ares is expected to be a new core specifically designed with higher and power for the server market.

Release Dates[edit]

Ares is expected to show up in products in 2019.

Process Technology[edit]

Ares specifically takes advantage of the power and area advantages of the 7 nm process.

Architecture[edit]

Symbol version future.svg Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.

This list is incomplete; you can help by expanding it.

Bibliography[edit]

  • Drew Henry keynote, TechCon 2018 keynote.
codenameAres +
designerARM Holdings +
first launched2019 +
full page namearm holdings/microarchitectures/ares +
instance ofmicroarchitecture +
manufacturerTSMC +
microarchitecture typeCPU +
nameAres +
process7 nm (0.007 μm, 7.0e-6 mm) +