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Poseidon - Microarchitectures - ARM
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Poseidon µarch
General Info
Arch TypeCPU
DesignerARM Holdings
ManufacturerTSMC
Introduction2021
Process5 nm
Pipeline
OoOEYes
SpeculativeYes
Reg RenamingYes
Succession

Poseidon is the successor to Zeus, a high-performance ARM microarchitecture designed by ARM Holdings for the server market. This microarchitecture is designed as a synthesizable IP core and is sold to other semiconductor companies to be implemented in their own chips.

History[edit]

Arm's server roadmap.

Poseidon was first announced by Drew Henry, Arm’s SVP and GM of Infrastructure Business Unit, at his TechCon 2018 keynote.

Release Dates[edit]

Ares is expected to show up in products around 2021.

Process Technology[edit]

Zeus specifically designed takes advantage of the power and area advantages of the 5nm process.

Architecture[edit]

Symbol version future.svg Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.

Key changes from Zeus[edit]

This list is incomplete; you can help by expanding it.

Bibliography[edit]

  • Drew Henry keynote, TechCon 2018 keynote.
codenamePoseidon +
designerARM Holdings +
first launched2021 +
full page namearm holdings/microarchitectures/poseidon +
instance ofmicroarchitecture +
manufacturerTSMC +
microarchitecture typeCPU +
namePoseidon +
process5 nm (0.005 μm, 5.0e-6 mm) +