From WikiChip
Search results

Page title matches

Page text matches

  • ...16 through 23. Because the company ID is a relatively new addition, legacy processors have it defined as 0. The linux kernel defines the following values:<ref>[h | 0x030000 || [[Alchemy]], [[AMD]], [[RMI]] ({{alchemy|Alchemy}} processors)
    5 KB (802 words) - 03:15, 20 March 2022
  • ...lly known as '''Programming languages - C - Extensions to support embedded processors''' is a technical reported approved by ISO for publication which specifies ...f the machine's address spaces. Such ability is often required in embedded processors that perform special operators. The technical report added the ability to n
    3 KB (398 words) - 07:52, 4 January 2015
  • ...re itself, but rather to allow others to integrate their own IP such as co-processors
    4 KB (434 words) - 03:31, 15 February 2016
  • ...s a family of high-end performance {{arch|64}} [[x86-64]] [[microprocessor|processors]] designed by [[Intel]] for high-end desktops and laptops. It was introduce ...the entry-level consumer performance {{intel|Core i3}}. Likewise, Core i7 processors offer the most complete set of features
    43 KB (5,739 words) - 21:30, 22 April 2024
  • ...main [[Haswell]] die but is packaged together with it. Crystal Well based processors started shipping in the third quarter of 2013. == Processors ==
    2 KB (371 words) - 02:53, 15 February 2017
  • ...]'s [[Core i7]], [[Texas Instruments]] custom [[ASIC]]s, and [[Freescale]] processors. ...micro-FCBGA''' is a line of fcBGA packages that ships with Intel's line of processors.
    2 KB (239 words) - 07:17, 17 December 2013
  • Microprocessors are [[instruction set processors]] (ISPs), meaning they operate on a predefined [[instruction set|set of ins
    8 KB (1,149 words) - 00:41, 16 September 2019
  • ...f> The Arduino is an open-source hardware project that use 8-bit to 32-bit processors. The Arduino has a [[C]] compiler with a set of {{arduino|standard librarie
    3 KB (520 words) - 16:56, 19 December 2015
  • ...cus on high-bandwidth, large-memory, and highly concurrent workloads. Xeon processors typically incorporate a large number of [[cores]], large [[cache]], and sup
    13 KB (1,417 words) - 12:37, 22 December 2018
  • ...small [[microcontrollers]], [[programmable logic device|PLDs]] and [[soft processors]].
    682 bytes (91 words) - 12:10, 21 July 2018
  • ...uent components to determine the course of action that must be taken. Some processors have a dedicated storage space for such flags called a [[flag register]]. W
    687 bytes (100 words) - 13:54, 12 April 2014
  • * {{cite techdoc|title=Revision Guide for AMD Family 19h Models 10h-1Fh Processors|url=https://www.amd.com/system/files/TechDocs/57095-PUB_1.00.pdf|publ=AMD|p
    4 KB (693 words) - 01:48, 2 April 2023
  • * {{cite techdoc|title=Revision Guide for AMD Family 19h Models 10h-1Fh Processors|url=https://www.amd.com/system/files/TechDocs/57095-PUB_1.00.pdf|publ=AMD|p
    4 KB (666 words) - 01:48, 2 April 2023
  • ...n their products. While they no longer sell such chips, they still use ARM processors in various products (e.g. in their FPGAs) as well as still retain full a ar '''[[Many-core]]:'''
    9 KB (1,150 words) - 00:03, 2 October 2022
  • ...ames, and thousands of other electronic products. Over one hundred million processors were sold.
    6 KB (711 words) - 04:39, 26 April 2017
  • ...microprocessors. The GT3e is identical to the GT3 level integrated graphic processors with an additional L4$ of {{intel|crystal well|128 MB eDRAM}}.
    2 KB (300 words) - 19:39, 3 January 2016
  • 1 KB (176 words) - 17:29, 3 December 2016
  • ...microprocessors. The GT3e is identical to the GT3 level integrated graphic processors with an additional L4$ of eDRAM.
    3 KB (326 words) - 03:59, 4 January 2016
  • Integrated graphics processors are designed to make use of the existing resources in the computer system s
    804 bytes (121 words) - 17:03, 4 January 2016
  • 2 KB (181 words) - 13:08, 18 March 2017
  • ...in mid-range and high-end performance mobile ({{intel|Skylake U|l=core}}) processors. This GPU incorporates 64 MiB of [[eDRAM]] side cache on-chip for added per == Processors with Iris Graphics 540 ==
    4 KB (470 words) - 17:01, 9 July 2017
  • ...in mid-range and high-end performance mobile ({{intel|Skylake U|l=core}}) processors. This GPU incorporates 64 MiB of [[eDRAM]] side cache on-chip for added per == Processors with Iris Graphics 550 ==
    4 KB (475 words) - 06:43, 8 May 2018
  • == 24-bit digital signal processors ==
    484 bytes (58 words) - 11:06, 28 May 2017
  • * {{\\|SX}} [[vector processors]]
    874 bytes (78 words) - 14:46, 30 November 2019
  • ...plicity, being an [[in-order]] dual-issue pipelined CPU. All Bonnell-based processors were manufactured on Intel's [[45 nm process]]. ...re designed for the [[Mobile Internet Devices]] (MID) market. Silverthorne processors have 56 [[KiB]] of L1$ and 512 KiB of L2. Silverthorne has support for the
    17 KB (2,292 words) - 09:32, 16 July 2019
  • ...essors included {{amd|Argon}}, {{amd|Pluto}}, and {{amd|Orion}}-core based processors. Later microprocessors (starting with {{amd|Thunderbird}} core-based) intro ...rs.pdf|Methodologies for Measuring Temperature on AMD Athlon and AMD Duron Processors Application Note]]; Publication # 24228; Revision: E; Issue Date: January 2
    10 KB (1,163 words) - 10:41, 26 February 2019
  • ...tel|Celeron|Celeron family}}. Pentium is Intel's longest serving family of processors. ...}} to low-end processors. Pentium is still presently a line of entry-level processors. In 2014 Intel released the ''Pentium 20th Anniversary Edition'' commemorat
    10 KB (1,057 words) - 19:30, 1 November 2021
  • Introduced in 2012, the original Athlon X4 processors were based on the {{amd|Piledriver|l=arch}} microarchitecture. In 2014 a nu
    3 KB (333 words) - 21:33, 27 May 2023
  • ...nd FMA3 instructions. Manufactured in [[32 nm]] and later [[28 nm]], these processors have a 4 MB (2x2 MB 16-way set associative) L2$ and no L3$.
    6 KB (619 words) - 05:05, 2 January 2019
  • ...processors have 4 MB (2x2 MB 16-way set associative) L2$ and no L3$. These processors have Virtualization and {{amd|Turbo Core}} 3.0 support.
    6 KB (700 words) - 15:43, 1 December 2019
  • ...rst introduced by [[Intel]] in early 2015. The x3 is the low-end family of processors designed for the mobile market below the {{intel|Atom x5|x5}} and {{intel|A * [[:File:atom-x3-c3000-brief.pdf|Intel Atom x3 Processors Product Brief, 2015]]
    3 KB (425 words) - 17:29, 3 December 2016
  • ...15. This is Intel's flagship line of mobile and [[internet of things|IoT]] processors, a tier above the {{intel|Atom x5}}.
    4 KB (540 words) - 06:21, 26 October 2016
  • ...} and Server/HEDT {{intel|Skylake SP|l=core}}/{{intel|Skylake X|X|l=core}} processors. ...onductor engineers) and the process which is used by IBM for their various processors. This process was designed by IBM for their very large chips with effective
    17 KB (2,243 words) - 19:32, 25 May 2023
  • ...antity]]''' property representing the maximum memory size supported by the processors. '''This property adheres to the [[WikiChip:data size units policy]].'''
    506 bytes (61 words) - 20:29, 12 April 2017
  • {{comp table header|main|10:List of Braswell-based Processors}}
    4 KB (488 words) - 19:42, 5 October 2020
  • ** [[:File:45nmSummaryFoils.pdf|New Intel 45 nm Processors]]
    5 KB (602 words) - 05:51, 20 July 2018
  • Intel sold Bonnell-based processors under the '''{{intel|Atom}}''' brand. Additionally, manufacturers were allo ...Core|l=arch}} architecture (specficially the then-new {{intel|Core 2 Duo}} processors.
    38 KB (5,468 words) - 20:29, 23 May 2019
  • ...a lightweight in-die interconnect (IDI) - same one used in the {{\\|Core}} processors. The use of IDI should have noticeable performance impact per thread.
    9 KB (1,160 words) - 09:35, 25 September 2019
  • ...[[system on chip]]s for the ultra-low power (ULP) devices. Goldmont-based processors and SoCs are part of the {{intel|Atom}}, {{intel|Pentium (2009)|Pentium}},
    7 KB (956 words) - 23:05, 23 March 2020
  • ** {{intel|Pentium}}, an extended family of processors ** {{intel|Pentium (1992)}}, a family of processors introduced in 1992 (the "original" Pentium)
    559 bytes (67 words) - 11:29, 11 October 2017
  • ...t-side bus|FSB]] replaced with {{intel|Direct Media Interface}} 1.0. These processors use {{packages|Socket-G1}}. They all have the following features: ...32 nm process]], mobile {{intel|Sandy Bridge|l=arch}}-based budget Pentium processors were introduced in mid-[[2011]]. Mobile Pentium uses {{intel|FCBGA-1023}} p
    20 KB (2,661 words) - 00:45, 11 October 2017
  • ...uced in April of 1998, Celeron is Intel's second longest serving family of processors after {{intel|Pentium}}. ...t-side bus|FSB]] replaced with {{intel|Direct Media Interface}} 1.0. These processors use {{packages|Socket-G1}}. They all have the following features:
    25 KB (3,201 words) - 03:13, 22 September 2018
  • ...is a family of {{arch|64}} multi-core [[x86]] [[microserver]] single-chip processors introduced by [[Intel]] in March of 2015. Xeon D chips are aimed at filling {{comp table header|main|11:List of Broadwell DE-based Processors}}
    13 KB (1,784 words) - 08:04, 6 April 2019
  • ...randed as 5th Generation Intel {{intel|Core}} processors. For server class processors, Intel branded it as {{intel|Xeon E3|Xeon E3 v4}}, {{intel|Xeon E5|Xeon E5 ...class="comptable-header"><th>&nbsp;</th><th colspan="19">List of Broadwell Processors</th></tr>
    14 KB (1,891 words) - 14:37, 6 January 2022
  • ...randed as 4th Generation Intel {{intel|Core}} processors. For server class processors, Intel branded it as {{intel|Xeon E3|Xeon E3 v3}}, {{intel|Xeon E5|Xeon E5 <tr class="comptable-header"><th>&nbsp;</th><th colspan="19">List of Haswell Processors</th></tr>
    27 KB (3,750 words) - 06:57, 18 November 2023
  • ...randed as 3rd Generation Intel {{intel|Core}} processors. For server class processors, Intel branded it as {{intel|Xeon E3|Xeon E3 v2}}, {{intel|Xeon E5|Xeon E5 ...ass="comptable-header"><th>&nbsp;</th><th colspan="19">List of Ivy Bridge Processors</th></tr>
    5 KB (689 words) - 13:44, 2 May 2020
  • ...d Generation Intel {{intel|Core i3}}, {{intel|Core i5}}, {{intel|Core i7}} processors. For workstations it's branded as first generation {{intel|Xeon E3}}. | {{intel|Sandy Bridge M|l=core}} || SNB-M || Mobile processors
    84 KB (13,075 words) - 00:54, 29 December 2020
  • ...op and mobile, Westmere was branded as 1st Generation Intel {{intel|Core}} processors. ...la}} || [[2 cores|2]](4) || {{tchk|yes}} || Mainstream desktop performance processors
    10 KB (1,258 words) - 21:07, 9 March 2018
  • <tr class="comptable-header"><th>&nbsp;</th><th colspan="20">List of Nehalem Processors</th></tr>
    4 KB (459 words) - 21:44, 26 December 2023
  • ...h Generation Intel {{intel|Core i3}}, {{intel|Core i5}}, {{intel|Core i7}} processors. For workstations it's branded as {{intel|Xeon E3|Xeon E3 v5}}. ...(AVX512F + AVX512CD + AVX512BW + AVX512DQ + AVX512VL). Additionally, those processors Memory Protection Keys for Userspace (PKU), {{x86|PCOMMIT}}, and {{x86|CLWB
    79 KB (11,922 words) - 06:46, 11 November 2022
  • ...{{intel|Core i5}}. and {{intel|Core i7}} processors. For workstation class processors, Intel branded it as {{intel|Xeon E3|Xeon E3 v6}}. There are no Kaby Lake-b ...d mainstream {{intel|Kaby Lake S|l=core}} and {{intel|Kaby Lake H|l=core}} processors on January 3, [[2017]] in time for CES 2017. The enthusiast version, {{inte
    38 KB (5,431 words) - 10:41, 8 April 2024
  • ...neration Intel {{intel|Core i3}}, {{intel|Core i5}}. and {{intel|Core i7}} processors. * Mobile Processors
    7 KB (887 words) - 12:53, 5 August 2019
  • ...mobile devices, Ice Lake is branded as 10th Generation Core i3, i5, and i7 processors. {{comp table header|main|19:List of Ice Lake-based Processors}}
    23 KB (3,613 words) - 12:31, 20 June 2021
  • ...ir second generation, "10nm+" process, for {{intel|Ice Lake|l=arch}}-based processors which will be used for the mainstream and server platform. ...' in late 2022 with the introduction of the company's 13th Generation Core processors based on the {{intel|Raptor Lake|l=arch}} microarchitecture. Nicknamed '''"
    14 KB (1,903 words) - 06:52, 17 February 2023
  • ...' in late 2022 with the introduction of the company's 13th Generation Core processors based on the {{intel|Raptor Lake|l=arch}} microarchitecture. Nicknamed '''"
    13 KB (1,941 words) - 02:40, 5 November 2022
  • * Software Optimization Guide for AMD Family 17h Models 30h and Greater Processors
    2 KB (338 words) - 01:25, 30 December 2019
  • ...where it continued to manufacture Intel's line of {{intel|XScale|l=arch}} processors.
    5 KB (586 words) - 22:44, 4 April 2022
  • ...used BiCMOS process for their {{intel|Pentium}} and {{intel|Pentium Pro}} processors, the 0.28 µm process was a standard CMOS process. Featuring a smaller tran
    2 KB (225 words) - 06:11, 20 July 2018
  • ...ator|clock]] frequency. This feature automatically kicks in on TBT-enabled processors when there is sufficient headroom - subject to power rating, temperature ra ...e OS requests the highest performance state ("P0"). The amount of time the processors remains in Turbo Boosts depends on the workload and OS requests. When Turbo
    7 KB (990 words) - 14:39, 23 July 2022
  • Arm processors can largely be grouped into the three design teams that design them in para '''[[Neural Processors]]:'''
    6 KB (733 words) - 22:02, 3 November 2022
  • ...ntium II was originally introduced in April of 1998. Intel described these processors as having 20 to 40 percent performance increase over the {{intel|Mobile Pen == Processors ==
    5 KB (635 words) - 09:54, 11 November 2017
  • ...rought about by 386 became the standard for all future {{arch|32}} [[x86]] processors, dubbed [[IA-32|i386-architecture]].
    4 KB (400 words) - 08:43, 5 December 2022
  • ...only found in {{intel|Xeon E3}} workstation ({{intel|Skylake DT|l=core}}) processors. == Processors with HD Graphics P530 ==
    4 KB (471 words) - 16:46, 9 July 2017
  • ...is found in high-end mobile workstation (Xeon {{intel|Skylake H|l=core}}) processors. == Processors with Iris Pro Graphics P580 ==
    4 KB (489 words) - 13:38, 9 July 2017
  • ...full backwards [[object code]] comparability with the all previous [[x86]] processors ({{\\|80386}}, {{\\|80286}}, {{\\|80186}}, etc...). To improve performance <tr><th colspan="16" style="background:#D6D6FF;">i486DX Processors</th></tr>
    8 KB (953 words) - 08:27, 29 October 2022
  • ...nt Mode}} (SMM). The DX4 series had twice as much cache space as the older processors.
    3 KB (354 words) - 16:13, 13 December 2017
  • ...nt Mode}} (SMM). The DX4 series had twice as much cache space as the older processors.
    4 KB (414 words) - 16:13, 13 December 2017
  • '''Core i3''' is family of low-end performance processors introduced by [[Intel]] since 2010, following the retirement of the {{intel ...until January 04, 2010. Core i3 microprocessors are considered performance processors, but generally sit on the low side of the scale. They sit below the {{intel
    25 KB (3,397 words) - 03:12, 3 October 2022
  • ...'' is family of mid-range performance {{arch|64}} [[x86]] [[microprocessor|processors]] designed by Intel for desktops and laptops. The Core i5 family was introd ...Core i3}} processors but below those offered by {{intel|Core i7}}. Core i5 processors usually have more cores than i3 (typically 4 vs 2 in i3), and offer more fe
    34 KB (4,663 words) - 20:38, 20 February 2023
  • <tr><th colspan="7" style="background:#D6D6FF;">Am486DX Processors</th></tr> <tr><th colspan="7" style="background:#D6D6FF;">Am486SX Processors</th></tr>
    13 KB (1,897 words) - 09:30, 21 July 2021
  • ...80486|486}}-based microprocessors introduced by [[AMD]] in [[1995]]. These processors came with all the features of the {{amd|Am486#Enhanced Am486|Enhanced Am486 ...he name came about due to competitors selling 5th generation-based [[x86]] processors (e.g. {{Cyrix|Cyrix 5x86}}) - people were more likely to buy a system with
    7 KB (1,043 words) - 16:50, 14 June 2020
  • ...reement|technology exchange agreement]] which focused on the x86 family of processors. <tr><th colspan="10" style="background:#D6D6FF;">Am286 Processors</th></tr>
    9 KB (1,192 words) - 01:35, 29 May 2016
  • <tr><th colspan="8" style="background:#D6D6FF;">Am286ZX Processors</th></tr> <tr><th colspan="8" style="background:#D6D6FF;">Am286LX Processors</th></tr>
    5 KB (750 words) - 21:22, 24 May 2016
  • <tr><th colspan="10" style="background:#D6D6FF;">Am186 Processors</th></tr> <tr><th colspan="8" style="background:#D6D6FF;">Am186 CMOS Processors</th></tr>
    5 KB (602 words) - 18:20, 3 June 2016
  • <tr><th colspan="10" style="background:#D6D6FF;">Am8086 Processors</th></tr> AMD manufactured a number of Class B military MIL-STD-883C compliant processors.
    5 KB (616 words) - 14:24, 1 May 2019
  • ...family of high-end enterprise-level [[x86]] microprocessors. These server processors offer the highest performance, most extensive set of features, and offer mu
    4 KB (482 words) - 05:08, 18 February 2020
  • * May 24: AMD announces the {{amd|Geode NX}} family of performance embedded processors based on the {{amd|Thoroughbred|l=core}} core ...3: [[Cavium]] announces the {{cavium|OCTEON}} family of multi-core network processors.
    824 bytes (108 words) - 22:53, 27 November 2017
  • ...ds, and restart in less than one clock period to reduce power dissipation. Processors, routers, and memory modules with no work to do dissipate exactly zero acti ...uit-switched network supports communication between adjacent and distant processors, as resources allow, with each link supporting a maximum rate of 28.5 Gbps.
    8 KB (1,031 words) - 14:09, 10 May 2019
  • * August 30: Intel release first {{intel|Kaby Lake}} processors * August 30: Intel release first {{intel|Goldmont}} processors
    5 KB (593 words) - 01:28, 5 August 2018
  • * October 9: AMD announces the {{amd|Athlon XP}} family of high-performance processors, a successor to {{amd|Athlon}}
    1 KB (145 words) - 22:48, 27 November 2017
  • * October 9: Cavium announces a new family of multi-core communication processors, the {{cavium|OCTEON Plus}}.
    653 bytes (78 words) - 12:48, 28 May 2018
  • ...eries A funding. In 2006 Ambric introduced the {{ambric|Am2000}} family of processors. Following the [[wikipedia:2008 financial crisis|2008 financial crisis]], A
    1 KB (104 words) - 17:15, 24 June 2016
  • | arch = Many-core 32-bit microprocessor ...massively parallel processor array]] designed to replace high-end embedded processors, DSPs, and FPGAs in applications where fast general-purpose integer arithme
    11 KB (1,421 words) - 14:45, 9 December 2018
  • ...rking and telecommunication devices but switched over to high-end parallel processors and introducing a series of [[field-programmable object array]]s.
    3 KB (313 words) - 22:47, 27 June 2016
  • ...irectly rivaled Intel's {{intel|pentium (1992)|Pentium}} processors. These processors were based on AMD's {{amd|microarchitectures/k5|K5 Microarchitecture}} whic <tr><th colspan="11" style="background:#D6D6FF;">SSA/5-based Processors</th></tr>
    8 KB (1,002 words) - 22:19, 17 June 2022
  • ...he technologies in these patents were used in Intel's {{intel|Pentium II}} processors. On December 1998 S3 Inc and [[Intel]] announced a 10-year patent cross-lic <tr><th colspan="4" style="background:#D6D6FF;">X704 Processors</th></tr>
    8 KB (1,228 words) - 20:49, 2 June 2019
  • ...cores]] for math, signal processors, and general purpose high performance processors. Intrinsity also provides EDA tools, technologies, and expertise that enabl
    1 KB (122 words) - 23:25, 2 September 2018
  • '''FastMATH''' was a family of matrix and vector math processors with an on-die [[RISC]] [[CPU]]s introduced by [[Intrinsity]]. The chips we ...ocessors developed by [[Intrinsity]] using {{\\|Fast14}} technology - i.e. processors designed using custom [[cmos/dynamic|dynamic]] [[cmos/domino|domino logic]]
    4 KB (464 words) - 17:41, 3 July 2016
  • ...mparable or better than {{intel|Pentium II}}'s clock-for-clock) made these processors a viable alternative to Intel's. K6 gained wide acceptance in the PC market ...superior FPU and MMX support. Selling well under Pentium prices allowed K6 processors to gain widespread acceptance.
    8 KB (1,156 words) - 23:10, 1 August 2016
  • == Processors using OBGA-349 == ...mptable-header"><th>&nbsp;</th><th colspan="19">List of all OBGA-349-based Processors</th></tr>
    2 KB (309 words) - 18:42, 25 July 2020
  • ...[[Socket 7]]-based systems and being relatively cheap, the K6-2 family of processors became a highly successful series with some models continued to be manufact ...units boosting the overall performance. The K6-2 was AMD's first series of processors to offer {{x86|3DNow!}}, an [[x86]] extension that offered [[floating point
    13 KB (1,969 words) - 18:07, 2 October 2019
  • ...Lake lineup to incorporate their first series of mainstream [[octa-core]] processors. ...second quarter of 2018. In early 2017 Intel announced that 8th generation processors will be available starting from the 3rd quarter of 2017. While the exact re
    30 KB (4,192 words) - 13:48, 10 December 2023
  • ...manufacturing issues, creating massive shortages of {{intel|Pentium III}} processors. This created significant demand for {{amd|Athlon}} models forcing AMD to d <tr><th colspan="11" style="background:#D6D6FF;">Desktop K6-III Processors</th></tr>
    9 KB (1,264 words) - 02:29, 19 January 2017
  • ...ron}} in the ultra-cheap PC segment. Announced in April of [[2000]], Duron processors offered the best price-performance ratio providing {{intel|Celeron}} with s In April of [[1998]] Intel introduced their {{intel|Celeron}} family of processors - a family specifically designed to target the ultra-cheaper computer segme
    19 KB (2,874 words) - 17:30, 3 December 2016
  • ...entium II}} models. However, the rating system was quickly dropped when K6 processors exceeded PII performance clock-for-clock. The system was later revived for # Compare the Winstone 96 score you get against the Pentium processors. The target processor's P-Rating is based on the highest freqeucny of the P
    3 KB (456 words) - 06:30, 8 July 2020
  • ...tem indicates how such processors perform when compared with Intel Pentium processors. For example, under the P-rating system announced today, a processor that d ...it is the first comprehensive and credible method for comparing competing processors based on the relative performance they bring PC users under real-world cond
    3 KB (423 words) - 17:17, 21 August 2016
  • ...on performance and allows an "apples-to-apples" comparison among different processors on the market. ...te a Pentium processor (the reference platform). If the vendor and Pentium processors share the same pinout and bus interface, a single system can be used by rep
    11 KB (1,244 words) - 06:26, 8 July 2020
  • * April 18: AMD announces {{amd|K6-2+}} and {{amd|K6-III+}} mobile processors * September 25: AMD announces {{amd|K6-III+|K6-IIIE+}} (embedded) K6-III+ processors
    574 bytes (78 words) - 23:22, 27 January 2018
  • == Processors ==
    423 bytes (44 words) - 19:53, 13 January 2018
  • ...[National University of Defense Technology]]. The development for the YHFT processors were driven in an attempt to break away from dependency of international ma ...lectronics Corporation]], have been developing a series of high-end server processors based largely on the previous work.
    2 KB (324 words) - 22:02, 26 June 2018
  • ...e}} || {{amd|Duron}} || Former corename for 2nd generation (Morgan) mobile processors ...thlon MP}}<br>{{amd|Athlon XP}} || 1st generation Athlon XP/MP performance processors
    6 KB (923 words) - 16:48, 3 March 2022
  • ...Ryzen 5}}, {{amd|Ryzen 7}}, {{amd|Ryzen 9}} and {{amd|Ryzen Threadripper}} processors. For servers, Zen is branded as {{amd|EPYC}}. | {{amd|Whitehaven|l=core}} || Up to 16/32 || Enthusiasts market processors
    79 KB (12,095 words) - 15:27, 9 June 2023
  • ...yzen 5}}, {{amd|Ryzen 7}}, {{amd|Ryzen 9}}, and {{amd|Ryzen Threadripper}} processors. For servers, Zen is branded as {{amd|EPYC}}. ...d|Castle Peak|l=core}} || Up to 64/128 || Workstation & enthusiasts market processors
    57 KB (8,701 words) - 22:11, 9 October 2022
  • {{table sep|col=10|Desktop Processors}} {{table sep|col=10|Mobile Processors}}
    3 KB (461 words) - 18:51, 10 September 2018
  • '''PEZY-SC2''' ('''PEZY Super Computer 2''') is a third generation [[many-core microprocessor]] developed by [[PEZY]] and introduced in early 2017. This c ...iny PEZY cores are six {{mips|P-Class}} {{mips|P6600}} [[MIPS]] (MIPS64R6) processors. Previously, the {{\\|PEZY-SC}} relied on two lightweight {{arm|ARM9|ARM926
    5 KB (683 words) - 11:15, 22 September 2018
  • {{title|Many-Core Microprocessor}}{{multi-core processors info}} .... The cores need not be identical nor necessarily fully-featured. Manycore processors often focus on optimizing specific aspects such as power or throughput (i.e
    1 KB (208 words) - 22:39, 1 August 2021
  • ...perate at the old [[Socket 7]] bus speed of 66 MHz (multiplier of 6). This processors had a maximum power dissipation rating of 26.8 W.
    3 KB (374 words) - 16:09, 13 December 2017
  • ...perate at the old [[Socket 7]] bus speed of 66 MHz (multiplier of 6). This processors had a maximum power dissipation rating of 18.1 W.
    3 KB (371 words) - 16:09, 13 December 2017
  • ...}, operated at 450 MHz with a bus of 100 MHz and a multiplier of 4.5. This processors had a maximum power dissipation rating of 29.5 W.
    3 KB (349 words) - 16:09, 13 December 2017
  • ...}, operated at 450 MHz with a bus of 100 MHz and a multiplier of 4.5. This processors had a maximum power dissipation rating of 20.2 W.
    3 KB (349 words) - 16:09, 13 December 2017
  • ...00]] as a replacement for the previous generation of {{amd|K6-III}} mobile processors. K6-III+ enjoyed higher performance and lower voltage as a result of a [[di ...e K6-III+ was designed to replace the older {{amd|K6-III|K6-III-P}} mobile processors. Due to the processor shrink, the new models operated at higher frequency,
    5 KB (730 words) - 19:14, 27 October 2018
  • ...00]] as a replacement for the previous generation of {{amd|K6-III}} mobile processors. K6-2+ enjoyed higher performance and lower voltage as a result of a [[die ...the K6-2+ was designed to replace the older {{amd|K6-III|K6-III-P}} mobile processors. As with the {{amd|K6-III+}}, the K6-2+ were also based on the {{amd|microa
    2 KB (341 words) - 04:25, 26 October 2018
  • This processors has no integrated graphics processing unit.
    4 KB (569 words) - 15:16, 26 October 2018
  • This processors has no integrated graphics processing unit.
    3 KB (368 words) - 16:09, 13 December 2017
  • This processors has no integrated graphics processing unit.
    3 KB (368 words) - 16:09, 13 December 2017
  • This processors has no integrated graphics processing unit.
    3 KB (361 words) - 09:39, 27 July 2020
  • This processors has no integrated graphics processing unit.
    3 KB (334 words) - 13:42, 18 March 2023
  • This processors has no integrated graphics processing unit.
    3 KB (334 words) - 13:42, 18 March 2023
  • * "Embedded AMD-K6™ Processors BIOS Design Guide Application Note", AMD Publ. #23913, Rev. A, November 200
    2 KB (299 words) - 06:06, 24 March 2023
  • This processors has no integrated graphics processing unit.
    4 KB (557 words) - 03:30, 26 October 2018
  • This processors has no integrated graphics processing unit.
    3 KB (361 words) - 16:09, 13 December 2017
  • This processors has no integrated graphics processing unit.
    3 KB (361 words) - 16:09, 13 December 2017
  • This processors has no integrated graphics processing unit.
    3 KB (361 words) - 16:09, 13 December 2017
  • This processors has no integrated graphics processing unit.
    3 KB (361 words) - 16:09, 13 December 2017
  • This processors has no integrated graphics processing unit.
    3 KB (361 words) - 16:09, 13 December 2017
  • ...as the [[microarchitecture]] for [[Intel]]'s {{intel|Pentium M}} family of processors. This microarchitecture was later replaced by a {{\\|Modified Pentium M|mod
    1,000 bytes (117 words) - 09:17, 21 April 2019
  • ...he Latin word "Semper" meaning "always". The name is meant to imply these processors are strong, robust. AMD suggested Sempron meant for "daily use, practical, === K7-based Processors ===
    3 KB (332 words) - 01:56, 28 September 2019
  • A die shot of Intel's Kaby Lake [[Quad Core]] desktop processors:
    5 KB (674 words) - 19:57, 22 October 2019
  • A die shot of Intel's Kaby Lake [[Quad Core]] desktop processors:
    5 KB (694 words) - 23:04, 15 April 2019
  • A die shot of Intel's Kaby Lake [[Quad Core]] desktop processors:
    5 KB (699 words) - 11:45, 15 April 2019
  • A die shot of Intel's Kaby Lake [[Quad Core]] desktop processors:
    4 KB (665 words) - 12:47, 4 June 2018
  • A die shot of Intel's Kaby Lake [[Quad Core]] desktop processors:
    4 KB (658 words) - 16:20, 13 December 2017
  • A die shot of Intel's Kaby Lake [[Quad Core]] desktop processors:
    5 KB (677 words) - 16:20, 13 December 2017
  • A die shot of Intel's Kaby Lake [[Quad Core]] desktop processors:
    5 KB (665 words) - 21:59, 13 September 2018
  • A die shot of Intel's Kaby Lake [[Quad Core]] desktop processors:
    5 KB (684 words) - 16:20, 13 December 2017
  • A die shot of Intel's Kaby Lake [[Quad Core]] desktop processors:
    4 KB (659 words) - 16:20, 13 December 2017
  • A die shot of Intel's Kaby Lake [[Quad Core]] desktop processors:
    5 KB (677 words) - 16:20, 13 December 2017
  • ...family of mid-range enterprise-level [[x86]] microprocessors. These server processors offer high performance, multi-socket configuration support, and an extensiv
    11 KB (1,395 words) - 08:36, 4 November 2020
  • {{title|2 Cores (Dual-Core)}}{{multi-core processors info}} ...class="comptable-header"><th>&nbsp;</th><th colspan="19">List of Dual-Core Processors (40 most recent)</th></tr>
    4 KB (467 words) - 01:15, 21 February 2019
  • {{title|3 Cores (Tri-Core)}}{{multi-core processors info}} ...class="comptable-header"><th>&nbsp;</th><th colspan="19">List of Tri-Core Processors (40 most recent)</th></tr>
    3 KB (408 words) - 02:40, 10 February 2024
  • {{title|Quad-Core (4 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Quad-Core Processors (25 most recent)</th></tr>
    2 KB (276 words) - 04:58, 6 January 2017
  • {{title|Hexa-Core (6 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Hexa-Core Processors (25 most recent)</th></tr>
    2 KB (276 words) - 01:37, 19 July 2022
  • {{title|Octa-Core (8 cores)}}{{multi-core processors info}} <tr><th colspan="11" style="background:#D6D6FF;">List of Octa-Core Processors (40 most recent)</th></tr>
    4 KB (482 words) - 14:25, 24 March 2019
  • {{title|Deca-Core (10 cores)}}{{multi-core processors info}} ...class="comptable-header"><th>&nbsp;</th><th colspan="19">List of Deca-Core Processors (40 most recent)</th></tr>
    3 KB (425 words) - 23:00, 18 July 2017
  • {{title|Dodeca-Core (12 cores)}}{{multi-core processors info}} <tr><th colspan="11" style="background:#D6D6FF;">List of Dodeca-Core Processors (40 most recent)</th></tr>
    4 KB (483 words) - 00:40, 11 December 2016
  • {{title|Tetradeca-Core (14 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Tetradeca-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:07, 22 November 2016
  • {{title|Hexadeca-Core (16 cores)}}{{multi-core processors info}} <tr><th colspan="11" style="background:#D6D6FF;">List of Hexadeca-Core Processors (40 most recent)</th></tr>
    4 KB (483 words) - 01:10, 11 December 2016
  • {{title|Octadeca-Core (18 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Octadeca-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:09, 29 December 2016
  • {{title|Icosa-Core (20 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Icosa-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:07, 22 November 2016
  • {{title|Docosa-Core (22 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Docosa-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:08, 22 November 2016
  • {{title|Penta-Core (5 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Penta-Core Processors (25 most recent)</th></tr>
    2 KB (278 words) - 23:00, 20 July 2017
  • {{title|Nona-Core (9 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Nona-Core Processors (25 most recent)</th></tr>
    2 KB (279 words) - 15:52, 11 March 2018
  • {{title|Hepta-Core (7 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Hepta-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:06, 22 November 2016
  • {{title|Undeca-Core (11 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Undeca-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:06, 22 November 2016
  • {{title|Trideca-Core (13 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Trideca-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:07, 22 November 2016
  • {{title|Pentadeca-Core (15 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Pentadeca-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:07, 22 November 2016
  • {{title|Heptadeca-Core (17 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Heptadeca-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:07, 22 November 2016
  • {{title|Nonadeca-Core (19 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Nonadeca-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:07, 22 November 2016
  • {{title|Henicosa-Core (21 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Henicosa-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:07, 22 November 2016
  • {{title|Tricosa-Core (23 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Tricosa-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:08, 22 November 2016
  • {{title|Tetracosa-Core (24 cores)}}{{multi-core processors info}} <tr><th colspan="11" style="background:#D6D6FF;">List of Tetracosa-Core Processors (40 most recent)</th></tr>
    4 KB (483 words) - 01:19, 11 December 2016
  • {{title|Hexacosa-Core (26 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Hexacosa-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:08, 22 November 2016
  • {{title|Pentacosa-Core (25 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Pentacosa-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:08, 22 November 2016
  • {{title|Heptacosa-Core (27 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Heptacosa-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:08, 22 November 2016
  • {{title|Octacosa-Core (28 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Octacosa-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:08, 22 November 2016
  • {{title|Nonacosa-Core (29 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Nonacosa-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:08, 22 November 2016
  • {{title|Triaconta-Core (30 cores)}}{{multi-core processors info}} <tr><th colspan="7" style="background:#D6D6FF;">List of Triaconta-Core Processors (25 most recent)</th></tr>
    2 KB (277 words) - 16:08, 22 November 2016
  • {{title|Single-Core}}{{multi-core processors info}} ...e the early 2010s for the mobile, desktop, and server markets. Single-core processors can still be found in various low-power, embedded, and special-purpose appl
    3 KB (364 words) - 02:38, 6 September 2017
  • A die shot of Intel's Kaby Lake [[dual-core]] desktop processors:
    5 KB (663 words) - 13:08, 28 March 2021
  • A die shot of Intel's Kaby Lake [[dual-core]] desktop processors:
    4 KB (621 words) - 16:18, 13 December 2017
  • A die shot of Intel's Kaby Lake [[dual-core]] desktop processors:
    4 KB (651 words) - 15:08, 24 December 2017
  • ...ormance mobile segment (i.e. a notch above {{amd|Duron}}). Mobile Athlon 4 processors were manufactured using AMD's [[180 nm process|0.18-micron copper process t
    2 KB (199 words) - 17:44, 17 November 2016
  • ...62 Mother Board.jpg|thumb|Tyan S2462 motherboard for dual-socket Athlon MP processors.]] ...e {{amd|K7|l=arch}} microarchitecture. The platform includes the Athlon MP processors as well as the {{amd|AMD-760MP}} northbridge [[chipset]]. {{amd|AMD-760MP}}
    11 KB (1,571 words) - 18:57, 17 November 2016
  • | arch = Higher-performance Embedded processors
    1 KB (119 words) - 23:46, 9 November 2016
  • A die shot of Intel's Kaby Lake [[dual-core]] desktop processors:
    4 KB (644 words) - 14:59, 24 December 2017
  • A die shot of Intel's Kaby Lake [[dual-core]] desktop processors:
    5 KB (661 words) - 16:18, 13 December 2017
  • A die shot of Intel's Kaby Lake [[dual-core]] desktop processors:
    5 KB (662 words) - 06:02, 27 October 2018
  • A die shot of Intel's Kaby Lake [[dual-core]] desktop processors:
    4 KB (655 words) - 16:26, 13 December 2017
  • A die shot of Intel's Kaby Lake [[dual-core]] desktop processors:
    4 KB (655 words) - 15:07, 24 December 2017
  • A die shot of Intel's Kaby Lake [[dual-core]] desktop processors:
    4 KB (638 words) - 13:29, 7 April 2018
  • A die shot of Intel's Kaby Lake [[dual-core]] desktop processors:
    4 KB (636 words) - 13:30, 7 April 2018
  • ...{amd|K7|K7 microarchitecture|l=arch}}. Later a number of {{amd|K8|l=arch}} processors were also added. Introduced in June of [[2003]], AMD launched the ''Athlon XP-M'' mobile processors as a high-performance low-power chips for mainstream notebooks and desktop
    2 KB (281 words) - 15:41, 16 November 2016
  • ...oduces the {{amd|Athlon XP-M}} family, a series of high-performance mobile processors.
    226 bytes (30 words) - 22:50, 27 November 2017
  • A die shot of Intel's Kaby Lake [[dual-core]] desktop processors:
    4 KB (655 words) - 13:30, 7 April 2018
  • A die shot of Intel's Kaby Lake [[dual-core]] desktop processors:
    5 KB (685 words) - 16:18, 13 December 2017
  • ...ons and servers and are a direct competition to [[Intel]]'s {{intel|Xeon}} processors. Opteron was replaced by {{amd|EPYC}} in 2017.
    2 KB (292 words) - 02:17, 8 July 2018
  • ...on 64 processors competed directly against [[Intel]]'s {{intel|Pentium 4}} processors.
    2 KB (209 words) - 18:21, 17 November 2016
  • All Gemini Lake processors have the following: == Gemini Lake Processors ==
    4 KB (513 words) - 01:11, 6 July 2022
  • Introduced in 2009, the Athlon II X2 processors were based on the {{amd|K10|l=arch}} microarchitecture.
    4 KB (434 words) - 15:06, 9 December 2020
  • Introduced in 2007, all Phenom X4 processors were based on the {{amd|K10|l=arch}} microarchitecture.
    3 KB (367 words) - 23:01, 11 January 2021
  • Introduced in 2008, all Phenom X3 processors were based on the {{amd|K10|l=arch}} microarchitecture.
    3 KB (313 words) - 03:29, 11 January 2021
  • All Phenom II X3 processors are based on the {{amd|K10|l=arch}} microarchitecture.
    2 KB (278 words) - 12:33, 18 June 2021
  • All Phenom II X2 processors are based on the {{amd|K10|l=arch}} microarchitecture.
    3 KB (357 words) - 21:08, 18 June 2021
  • Introduced in 2010, all Phenom II X4 processors are based on the {{amd|K10|l=arch}} microarchitecture.
    2 KB (285 words) - 11:15, 18 June 2021
  • Introduced in 2009, the Athlon II X3 processors were based on the {{amd|K10|l=arch}} microarchitecture.
    2 KB (278 words) - 19:37, 7 December 2020
  • Introduced in 2009, the original Athlon II X4 processors were based on the {{amd|K10|l=arch}} microarchitecture.
    3 KB (338 words) - 19:13, 7 December 2020
  • ...m process]] with the first product being {{amd|Thoroughbred|l=core}}-based processors.
    249 bytes (33 words) - 23:23, 27 January 2018
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (542 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (538 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (542 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (500 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (508 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (508 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (508 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (508 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (508 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (508 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (494 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (492 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (493 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (494 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (492 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (494 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (488 words) - 15:20, 13 December 2017
  • ...Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
    4 KB (488 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (228 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (233 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (239 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (239 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (226 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (226 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (231 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (228 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (233 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (235 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (239 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (239 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (243 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (226 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (226 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (231 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (226 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (228 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (226 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (221 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (226 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (241 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (228 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (230 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (234 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (234 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (229 words) - 15:20, 13 December 2017
  • This processors has no cache.
    2 KB (221 words) - 15:20, 13 December 2017
  • ...IFR3000-IFT3000 RX AND TX IF BASEBAND PROCESSORS.pdf|RX AND TX IF/baseband processors]]
    2 KB (284 words) - 14:56, 4 July 2017
  • ...({{intel|Nehalem|l=arch}}-based) {{intel|Core i7}} high-performance mobile processors. These chips were manufactured on a [[45 nm process]] and uses {{intel|PM55
    2 KB (328 words) - 07:48, 24 December 2019
  • ...estmere)''' (formally '''Ironlake''') is a family of [[integrated graphics processors]] introduced by [[Intel]] in their {{intel|Westmere|l=arch}}-based micropro
    3 KB (378 words) - 03:16, 1 December 2016
  • ...generation ({{intel|Westmere|l=arch}}-based) {{intel|Core i7}} mainstream processors. These chips were manufactured on a [[32 nm process]] and uses {{intel|PM55
    4 KB (537 words) - 01:12, 28 August 2017
  • {{comp table header|main|11:List of Helio A-based Processors}} {{comp table header|main|11:List of Helio G-based Processors}}
    7 KB (902 words) - 16:33, 12 January 2023
  • ...her embedded devices. Often A53 cores are combined with higher performance processors (e.g. based on {{armh|Cortex-A57|l=arch}} or {{armh|Cortex-A72|l=arch}}) in
    6 KB (758 words) - 13:01, 6 March 2022
  • == Processors ==
    1 KB (157 words) - 17:53, 1 February 2019

View (previous 250 | next 250) (20 | 50 | 100 | 250 | 500)