Revision as of 09:20, 17 June 2025 (edit) 95.24.55.171 (talk) (→‎Other Chips) ← Older edit		Latest revision as of 19:05, 2 July 2025 (edit) (undo) 95.24.48.197 (talk) (→‎List of microarchitectures)
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	* {{intel|80386|l=arch}}		* {{intel|80386|l=arch}}
	* {{intel|80486|l=arch}}		* {{intel|80486|l=arch}}
		+
	* {{intel|P5|l=arch}}		* {{intel|P5|l=arch}}
	* {{intel|P6|l=arch}}		* {{intel|P6|l=arch}}
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	* {{intel|Enhanced NetBurst|l=arch}}		* {{intel|Enhanced NetBurst|l=arch}}
	}}		}}
−
	{{collist		{{collist
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	* {{intel|Nehalem (client)|l=arch}}		* {{intel|Nehalem (client)|l=arch}}
	* {{intel|Westmere (client)|l=arch}}		* {{intel|Westmere (client)|l=arch}}
		+
	* {{intel|Sandy Bridge (client)|l=arch}}		* {{intel|Sandy Bridge (client)|l=arch}}
	* {{intel|Ivy Bridge (client)|l=arch}}		* {{intel|Ivy Bridge (client)|l=arch}}
	* {{intel|Haswell (client)|l=arch}}		* {{intel|Haswell (client)|l=arch}}
	* {{intel|Broadwell (client)|l=arch}}		* {{intel|Broadwell (client)|l=arch}}
		+
	* {{intel|Skylake (client)|l=arch}}		* {{intel|Skylake (client)|l=arch}}
	* {{intel|Kaby Lake|l=arch}}		* {{intel|Kaby Lake|l=arch}}
	* {{intel|Coffee Lake|l=arch}}		* {{intel|Coffee Lake|l=arch}}
	* {{intel|Whiskey Lake|l=arch}}		* {{intel|Whiskey Lake|l=arch}}
		+
	* {{intel|Amber Lake|l=arch}}		* {{intel|Amber Lake|l=arch}}
	* {{intel|Comet Lake|l=arch}}		* {{intel|Comet Lake|l=arch}}
	* {{intel|Keystone Lake|l=arch}}		* {{intel|Keystone Lake|l=arch}}
	* {{intel|Rocket Lake|l=arch}}		* {{intel|Rocket Lake|l=arch}}
		+
	* {{intel|Cannon Lake|l=arch}} ("Skymont")		* {{intel|Cannon Lake|l=arch}} ("Skymont")
	* {{intel|Ice Lake (client)|l=arch}}		* {{intel|Ice Lake (client)|l=arch}}
	* {{intel|Tiger Lake|l=arch}}		* {{intel|Tiger Lake|l=arch}}
	* {{intel|Alder Lake|l=arch}}		* {{intel|Alder Lake|l=arch}}
		+
	* {{intel|Raptor Lake|l=arch}}		* {{intel|Raptor Lake|l=arch}}
	* {{intel|Meteor Lake|l=arch}}		* {{intel|Meteor Lake|l=arch}}
		+
	* {{intel|Lunar Lake|l=arch}}		* {{intel|Lunar Lake|l=arch}}
	* {{intel|Arrow Lake|l=arch}}		* {{intel|Arrow Lake|l=arch}}
Line 195:		Line 201:
	* {{intel|Nova Lake|l=arch}}		* {{intel|Nova Lake|l=arch}}
	}}		}}
−
	{{collist		{{collist
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	|		|
	'''Server SoC:'''		'''Server SoC:'''
−	* {{intel|Core (server)|l=arch}}	+	* {{intel|Core|Core (server)|l=arch}}
−	* {{intel|Penryn (server)|l=arch}}	+	* {{intel|Penryn|Penryn (server)|l=arch}}
−	* {{intel|Nehalem (server)|l=arch}}	+	* {{intel|Nehalem|Nehalem (server)|l=arch}}
−	* {{intel|Westmere (server)|l=arch}}	+	* {{intel|Westmere|Westmere (server)|l=arch}}
−	* {{intel|Sandy Bridge (server)|l=arch}}	+
−	* {{intel|Ivy Bridge (server)|l=arch}}	+	* {{intel|Sandy Bridge|Sandy Bridge (server)|l=arch}}
−	* {{intel|Haswell (server)|l=arch}}	+	* {{intel|Ivy Bridge|Ivy Bridge (server)|l=arch}}
−	* {{intel|Broadwell (server)|l=arch}}	+	* {{intel|Haswell|Haswell (server)|l=arch}}
		+	* {{intel|Broadwell|Broadwell (server)|l=arch}}
		+
	* {{intel|Skylake (server)|l=arch}}		* {{intel|Skylake (server)|l=arch}}
	* {{intel|Cascade Lake|l=arch}}		* {{intel|Cascade Lake|l=arch}}
	* {{intel|Cooper Lake|l=arch}}		* {{intel|Cooper Lake|l=arch}}
	* {{intel|Ice Lake (server)|l=arch}}		* {{intel|Ice Lake (server)|l=arch}}
		+
	* {{intel|Sapphire Rapids|l=arch}}		* {{intel|Sapphire Rapids|l=arch}}
	* {{intel|Emerald Rapids|l=arch}}		* {{intel|Emerald Rapids|l=arch}}
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	* {{intel|Diamond Rapids|l=arch}}		* {{intel|Diamond Rapids|l=arch}}
	}}		}}
−
	{{collist		{{collist
−	| count = 4	+	| count = 2
	| style= margin-left: 20px;		| style= margin-left: 20px;
	|		|
	'''High-Efficiency (Small Cores) Server SoC:'''		'''High-Efficiency (Small Cores) Server SoC:'''
−	* {{intel|Sierra Forest (server)|l=arch}}	+	* {{intel|Sierra Forest|Sierra Forest (server)|l=arch}}
−	* {{intel|Clearwater Forest (server)|l=arch}}	+	* {{intel|Clearwater Forest|Clearwater Forest (server)|l=arch}}
	}}		}}
−
	{{collist		{{collist
−	| count = 4	+	| count = 2
	| style= margin-left: 20px;		| style= margin-left: 20px;
	|		|
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	* {{intel|Willow Cove|l=arch}}		* {{intel|Willow Cove|l=arch}}
	* {{intel|Cypress Cove|l=arch}}		* {{intel|Cypress Cove|l=arch}}
		+
	* {{intel|Golden Cove|l=arch}}		* {{intel|Golden Cove|l=arch}}
	* {{intel|Raptor Cove|l=arch}}		* {{intel|Raptor Cove|l=arch}}
	* {{intel|Redwood Cove|l=arch}}		* {{intel|Redwood Cove|l=arch}}
	* {{intel|Lion Cove|l=arch}}		* {{intel|Lion Cove|l=arch}}
		+
	* {{intel|Cougar Cove|l=arch}}		* {{intel|Cougar Cove|l=arch}}
	* {{intel|Coyote Cove|l=arch}}		* {{intel|Coyote Cove|l=arch}}
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	|		|
	'''High-Efficiency (Small Cores)'''		'''High-Efficiency (Small Cores)'''
−	* {{intel|Bonnell|l=arch}}	+	* {{intel|Bonnell|l=arch}} ([[Bonnell]])
−	* {{intel|Saltwell|l=arch}}	+	* {{intel|Saltwell|l=arch}} ([[Saltwell]])
−	* {{intel|Silvermont|l=arch}}	+	* {{intel|Silvermont|l=arch}} ([[Silvermont]])
−	* {{intel|Airmont|l=arch}}	+	* {{intel|Airmont|l=arch}} ([[Airmont]])
−	* {{intel|Goldmont|l=arch}}	+
		+	* {{intel|Goldmont|l=arch}} ([[Goldmont]])
	* {{intel|Goldmont Plus|l=arch}}		* {{intel|Goldmont Plus|l=arch}}
−	* {{intel|Tremont|l=arch}}	+	* {{intel|Tremont|l=arch}} ([[Tremont]])
−	* {{intel|Gracemont|l=arch}}	+	* {{intel|Gracemont|l=arch}} ([[Gracemont]])
−	* {{intel|Crestmont|l=arch}}	+
−	* {{intel|Skymont|l=arch}}	+	* {{intel|Crestmont|l=arch}} ([[Crestmont]])
−	* {{intel|Darkmont|l=arch}}	+	* {{intel|Skymont|l=arch}} ([[Skymont]])
		+	* {{intel|Darkmont|l=arch}} ([[Darkmont]])
	}}		}}
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	| count = 1		| count = 1
	|		|
−	* {{intel|Lakemont|l=arch}}	+	* {{intel|Lakemont|l=arch}} ([[Lakemont]])
	}}		}}
		+
		+
	'''ULP ([[ARM]]):'''		'''ULP ([[ARM]]):'''
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	* Continued by [[Marvell]] ..		* Continued by [[Marvell]] ..
	}}		}}
−
	'''Server (EPIC) ([[Itanium]]):'''		'''Server (EPIC) ([[Itanium]]):'''
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	* {{intel|Madison|l=arch}}		* {{intel|Madison|l=arch}}
	* {{intel|Deerfield|l=arch}}		* {{intel|Deerfield|l=arch}}
		+
	* {{intel|Hondo|l=arch}}		* {{intel|Hondo|l=arch}}
	* {{intel|Madison 9M|l=arch}}		* {{intel|Madison 9M|l=arch}}
	* {{intel|Fanwood|l=arch}}		* {{intel|Fanwood|l=arch}}
	* {{intel|Montecito|l=arch}}		* {{intel|Montecito|l=arch}}
		+
	* {{intel|Chivano|l=arch}}		* {{intel|Chivano|l=arch}}
	* {{intel|Millington|l=arch}}		* {{intel|Millington|l=arch}}
	* {{intel|Montvale|l=arch}}		* {{intel|Montvale|l=arch}}
	* {{intel|Tukwila|l=arch}}		* {{intel|Tukwila|l=arch}}
		+
	* {{intel|Dimona|l=arch}}		* {{intel|Dimona|l=arch}}
	* {{intel|Poulson|l=arch}}		* {{intel|Poulson|l=arch}}
	* {{intel|Kittson|l=arch}}		* {{intel|Kittson|l=arch}}
	}}		}}
		+
	'''[[Many-core]]:'''		'''[[Many-core]]:'''
	{{collist		{{collist
−	| count = 2	+	| count = 3
	| style= margin-left: 20px;		| style= margin-left: 20px;
	|		|
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	}}		}}
	{{clear}}		{{clear}}
		+
	{{collist		{{collist
	| count = 3		| count = 3
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	* {{intel|Knights Corner|l=arch}} (Angel Isle)		* {{intel|Knights Corner|l=arch}} (Angel Isle)
	* {{intel|Knights Landing|l=arch}}		* {{intel|Knights Landing|l=arch}}
		+
	* {{intel|Knights Mill|l=arch}}		* {{intel|Knights Mill|l=arch}}
	* {{intel|Knights Hill|l=arch}}		* {{intel|Knights Hill|l=arch}}
	* {{intel|Knights Peak|l=arch}}		* {{intel|Knights Peak|l=arch}}
	}}		}}
		+
	'''Heterogeneous:'''		'''Heterogeneous:'''
	{{collist		{{collist
−	| count = 1	+	| count = 2
	|		|
	* {{intel|Lakefield|l=arch}}		* {{intel|Lakefield|l=arch}}
	* {{intel|Ryefield|l=arch}}		* {{intel|Ryefield|l=arch}}
	}}		}}
−
	'''GPU:'''		'''GPU:'''
	{{collist		{{collist
−	| count = 3	+	| count = 4
	| style= margin-left: 20px;		| style= margin-left: 20px;
	|		|
Line 361:		Line 378:
	* {{intel|Gen3|l=arch}}		* {{intel|Gen3|l=arch}}
	* {{intel|Gen3.5|l=arch}}		* {{intel|Gen3.5|l=arch}}
		+
	* {{intel|Gen4|l=arch}}		* {{intel|Gen4|l=arch}}
	* {{intel|Gen5|l=arch}}		* {{intel|Gen5|l=arch}}
	* {{intel|Gen5.75|l=arch}} ("Ironlake")		* {{intel|Gen5.75|l=arch}} ("Ironlake")
	* {{intel|Gen6|l=arch}}		* {{intel|Gen6|l=arch}}
		+
	* {{intel|Gen7|l=arch}}		* {{intel|Gen7|l=arch}}
	* {{intel|Gen7.5|l=arch}}		* {{intel|Gen7.5|l=arch}}
	* {{intel|Gen8|l=arch}}		* {{intel|Gen8|l=arch}}
	* {{intel|Gen9|l=arch}}		* {{intel|Gen9|l=arch}}
		+
	* {{intel|Gen9.5|l=arch}}		* {{intel|Gen9.5|l=arch}}
	* {{intel|Gen10|l=arch}}		* {{intel|Gen10|l=arch}}
Line 375:		Line 395:
	}}		}}
	{{clear}}		{{clear}}
		+
	{{collist		{{collist
−	| count = 1	+	| count = 2
	| style= margin-left: 20px;		| style= margin-left: 20px;
	|		|
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	'''Artificial Intelligence:'''		'''Artificial Intelligence:'''
	{{collist		{{collist
−	| count = 3	+	| count = 2
	| style= margin-left: 20px;		| style= margin-left: 20px;
	|		|
Line 395:		Line 416:
	{{clear}}		{{clear}}
	{{collist		{{collist
−	| count = 3	+	| count = 1
	| style= margin-left: 20px;		| style= margin-left: 20px;
	|		|

---

Latest revision as of 19:05, 2 July 2025

Intel
Type	Public
Founded	July 18, 1968 Mountain View, California
Founder	Gordon Moore Robert Noyce Andrew Grove
Headquarters	Santa Clara, California
Website	http://www.intel.com
IC Identification Logo Example Package By Prefix • By Logo

Intel Corporation is an American semiconductor company. While most notably known for their development of microprocessors and x86, Intel also designs and manufactures other integrated circuits including flash memory, network interface controllers, GPUs, chipsets, motherboards, and computers.

In addition to x86, Intel used to also design and manufacture ARM-based chips as well as embed ARC-based cores in their products. While they no longer sell such chips, they still use ARM processors in various products (e.g. in their FPGAs) as well as still retain full a architectural level ARM license allowing them to design and sell their own ARM devices should they wish to.

Subsidiaries[edit]

• Barefoot Networks
• Movidius
• Nervana
• Mobileye

Find Chip[edit]

• By S-Spec

List of processor families[edit]

List of architectures[edit]

List of microarchitectures[edit]

Mainstream (x86):

MCU:

ULP (ARM):

Server (EPIC) (Itanium):

Many-core:

Heterogeneous:

GPU:

Artificial Intelligence:

Integrated Graphics Processors[edit]

Family[edit]

HD Graphics - Intel + (integrated graphics processor family) HD Graphics 510 - Intel + (integrated graphics processor) HD Graphics 515 - Intel + (integrated graphics processor) HD Graphics 520 - Intel + (integrated graphics processor) HD Graphics 530 - Intel + (integrated graphics processor) HD Graphics P530 - Intel + (integrated graphics processor) HD Graphics 610 - Intel + (integrated graphics processor family) HD Graphics 615 - Intel + (integrated graphics processor family) HD Graphics 620 - Intel + (integrated graphics processor) HD Graphics 630 - Intel + (integrated graphics processor family) HD Graphics P630 - Intel + (integrated graphics processor family) UHD Graphics 600 - Intel + (integrated graphics processor) UHD Graphics 605 - Intel + (integrated graphics processor) UHD Graphics 620 - Intel + (integrated graphics processor) UHD Graphics 630 - Intel + (integrated graphics processor)

Iris Graphics - Intel + (integrated graphics processor extended family) Iris Graphics 540 - Intel + (integrated graphics processor) Iris Graphics 550 - Intel + (integrated graphics processor) Iris Pro Graphics - Intel + (integrated graphics processor extended family) Iris Pro Graphics P555 - Intel + (integrated graphics processor) Iris Pro Graphics P580 - Intel + (integrated graphics processor) Iris Pro Graphics 580 - Intel + (integrated graphics processor) Iris Pro Graphics 5200 - Intel + (integrated graphics processor family) Iris Pro Graphics 6200 - Intel + (integrated graphics processor family) Iris Plus Graphics 640 - Intel + (integrated graphics processor family) Iris Plus Graphics 650 - Intel + (integrated graphics processor family)

Other Chips[edit]

Architectural Concepts[edit]

Other[edit]

Other topics[edit]

Technologies[edit]

Packaging Technologies[edit]

Documents[edit]

See Documents.