|Golden Cove µarch|
|Introduction||November 4, 2021|
|Core Names||Alder Lake, Sapphire Rapids|
Golden Cove is the successor to Willow Cove, a high-performance 10 nm x86 core microarchitecture designed by Intel for an array of server and client products, including Sapphire Rapids (server) and Alder Lake (client).
Golden Cove was originally unveiled by Intel at their 2018 architecture day. Golden Cove is intended to succeed Willow Cove in the 2021 timeframe.
Intel has confirmed that the Golden Cove architecture will be fabricated on their Intel 7 process (previously 10 nm Enhanced SuperFin (ESF)).
Key changes from Willow Cove
- Performance improvements
- Strong IPC improvement (19%)
- AI workload improvement (AMX)
- Network/5G performance improvements
- New security features
- Add 2 simple decoders from 5 but canceled the complex decoder design as it is no longer practical and complex instructions can now be handled by macro uop fusion independently in instruction sequencer, total is now 6 simple decoders
- x2.5 BTB at 12K entries
- 2x pages 4k
- Add more 256 and 32 pages of 2M and 4MB respectively
- Increased ROB 512 (from 352 Sunny Cove)
- Add 2 execution port for a total 12
- Execution Engine
- Add one ALU and LEA for a total 5
This list is incomplete; you can help by expanding it.
- Intel Architecture Day 2018, December 11, 2018
- Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
|codename||Golden Cove +|
|first launched||November 4, 2021 +|
|full page name||intel/microarchitectures/golden cove +|
|instance of||microarchitecture +|
|instruction set architecture||x86-64 +|
|microarchitecture type||CPU +|
|name||Golden Cove +|
|process||10 nm (0.01 μm, 1.0e-5 mm) +|