|Palm Cove µarch|
Palm Cove is designed to take advantage of Intel's 10 nm process.
Key changes from Skylake (Server)
This list is incomplete; you can help by expanding it.
Cannon Lake introduced a number of new instructions:
SHA- Hardware acceleration for SHA hashing operations
UMIP- User-Mode Instruction Prevention extension
Palm Cove is the core microarchitecture that is found in Intel's Cannon Lake SoCs. Although originally intended to be mass manufactured for all client and server markets, due to Intel's prolong 10 nm process problems, Palm Cove is getting skipped with the exception of a single chip.
|codename||Palm Cove +|
|first launched||2018 +|
|full page name||intel/microarchitectures/palm cove +|
|instance of||microarchitecture +|
|instruction set architecture||x86-64 +|
|microarchitecture type||CPU +|
|name||Palm Cove +|
|process||10 nm (0.01 μm, 1.0e-5 mm) +|