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− | ! Year !! [[Microarchitecture|µArch]] !! {{arm|Versions|ISA}} !! Decoder !! Out-of-order <br>execution buffer !! ALU/FPU/LSU !! L1 Cache (KiB)<br>I ( | + | ! Year !! [[Microarchitecture|µArch]] !! {{arm|Versions|ISA}} !! Decoder !! Out-of-order <br>execution buffer !! ALU/FPU/LSU !! L1 Cache (KiB)<br>I (Instruction) + D (Data) || Performance<br>(per clock) |
|- | |- | ||
! colspan="8" | Little Core target | ! colspan="8" | Little Core target | ||
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|- | |- | ||
! L3 Cache (MiB) | ! L3 Cache (MiB) | ||
− | | | + | | - |
| 0–4 MiB | | 0–4 MiB | ||
| 0–16 MiB | | 0–16 MiB | ||
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| 64 + 64 KiB | | 64 + 64 KiB | ||
| colspan="4" | 32/64 + 32/64 KiB | | colspan="4" | 32/64 + 32/64 KiB | ||
− | | | + | | 64 + 64 KiB |
| - | | - | ||
|- | |- | ||
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| 256–512 KiB | | 256–512 KiB | ||
| colspan="4" | 128–512 KiB | | colspan="4" | 128–512 KiB | ||
− | | | + | | 1 MiB <ref>{{cite book |title=Arm launches next gen big core Cortex-A725 |website=WikiChip Fuse |url=https://fuse.wikichip.org/news/7829/arm-launches-next-gen-big-core-cortex-a725/ |date=2024-05-29}}</ref><!-- From 32K/512K/8M L1/2/3 on the Cortex-A720 to 64K/1M/16M L1/2/3 on the new Cortex-A725 ? --> |
| | | | ||
|- | |- | ||
− | ! | + | ! L3 Cache (MiB) |
| 0–4 MiB | | 0–4 MiB | ||
| 0–8 MiB | | 0–8 MiB | ||
| colspan="2" | 0–16 MiB | | colspan="2" | 0–16 MiB | ||
+ | | 0–32 MiB <ref>{{cite book |title=Arm introduces a new big core Cortex-A720 |website=WikiChip Fuse |url=https://fuse.wikichip.org/news/7529/arm-introduces-a-new-big-core-the-cortex-a720/ |date=2023-05-28}}</ref> | ||
| 0–32 MiB | | 0–32 MiB | ||
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</pre> | </pre> | ||
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+ | === References === | ||
== See also == | == See also == |
Latest revision as of 06:58, 23 March 2025
Cortex is a family of specialized ARM microarchitectures designed by Arm for various edge market such as embedded and mobile. The Cortex family succeed Arm's classic cores with more specialized cores with highly targeted requirements
Contents
Overview[edit]
Cortex is a family of ARM cores that address a broad set of markets. First announced in 2004, Cortex cores have replaced Arm's classic cores with more market-specific variations. Cortex can be broadly categorized into three types of workloads: Applications, Real-time, Microcontroller (A.R.M).
- Cortex-A - Application processors. Designed for fully capable computers, running typical operating systems (Android, Windows, Linux, iOS). Those processors are found in anything from smartphones to tablets and laptops.
- Cortex-X - Application processors. Slightly enhanced version of the Cortex-A designs in order to to further optimize the Cortex-A design (in terms of PPA) for certain markets or workloads/
- Cortex-R - Real-time processors. Designed for real-time operating systems with very deterministic behavior. Those cores are typically less powerful than the A series and are used for things such as controllers, factory equipment, medical devices, and other machines.
- Cortex-M - Microcontrollers. Designed for ultra-low power, typically small factor and low-performance systems. Those are found in cost-sensitive devices and electronics, automated systems, and many other embedded devices.
Cores[edit]
- See also: arm/versions, neoverse, and zen
Cortex-A[edit]
Year | Low-power Performance | |||
---|---|---|---|---|
2005 | Cortex-A8 (Tiger) | |||
2006 | ||||
2007 | Cortex-A9 (Falcon) | |||
2008 | ||||
Ultra-low power | Mainstream-performance | High-efficiency | High-performance | |
2009 | Cortex-A5 (Sparrow) | |||
2010 | Cortex-A15 (Eagle) | |||
2011 | Cortex-A7 (Kingfisher) | |||
2012 | Cortex-A53 (Apollo) | Cortex-A57 (Atlas) | ||
2013 | Cortex-A12 (Owl) | |||
2014 | Cortex-A17 (Owl) | |||
2015 | Cortex-A35 (Mercury) | Cortex-A72 (Maia) | ||
2016 | Cortex-A32 (Minerva) | Cortex-A73 (Artemis) | ||
2017 | Cortex-A55 (Ananke) | Cortex-A75 (Prometheus) | ||
2018 | Cortex-A65 (Helios) Cortex-A65AE (Helios-SL) |
Cortex-A76 (Enyo) Cortex-A76AE (Enyo-SL) | ||
2019 | Cortex-A34 (Metis) | Cortex-A77 (Deimos) | ||
2020 | Cortex-A78 (Hercules) Cortex-A78AE (Hercules-AE) Cortex-A78C (Hera Prime) | |||
2021 | Cortex-A510 (Klein) | Cortex-A710 (Matterhorn) | ||
2022 | Cortex-A715 (Makalu) | |||
2023 | Cortex-A520 (Hayes) | Cortex-A720 (Hunter) | ||
2024 | Cortex-A520AE (Hayes-AE) | Cortex-A720AE (Hunter-AE) Cortex-A725 (Chaberton) | ||
2025 | Cortex-A320 (IoT & AI ) | Cortex-A530 (Nevis) | Cortex-A730 (Gelas) |
Specifications[edit]
Cortex-A[edit]
Year | µArch | ISA | Decoder | Out-of-order execution buffer |
ALU/FPU/LSU | L1 Cache (KiB) I (Instruction) + D (Data) |
Performance (per clock) |
---|---|---|---|---|---|---|---|
Little Core target | |||||||
2014 | Cortex-A53 | ARMv8.0-A | 2-wide | unsupported | 2/1/1 | 8/64 + 8/64 | 82 |
2017 | Cortex-A55 | ARMv8.2-A | 2-wide | unsupported | 2/2/2 | 16/64 + 16/64 | 89 |
2021 | Cortex-A510 | ARMv9.0-A | 3-wide | unsupported | 3/2*/2 | 32/64 + 32/64 | - |
2023 | Cortex-A520 | ARMv9.2-A | 3-wide | unsupported | 2/2*/2 | 32/64 + 32/64 | - |
2025 | Cortex-A530 | ARMv9.2-A | 3-wide | unsupported | // | + | - |
Big/Middle Core target | |||||||
2014 | Cortex-A57 | ARMv8.0-A | 3-wide | 128 | 2/2/2 | 48 + 32 | 127 |
2015 | Cortex-A72 | ARMv8.0-A | 3-wide | 128 | 2/2/2 | 48 + 32 | 147 |
2016 | Cortex-A73 | ARMv8.0-A | 2-wide | 128 | 2/2/2 | 64 + 32 | 157 |
2017 | Cortex-A75 | ARMv8.2-A | 3-wide | 128 | 2/3/2 | 64 + 64 | 177 |
2018 | Cortex-A76 | ARMv8.2-A | 4-wide | 128 | 3/2/2 | 64 + 64 | 265 |
2019 | Cortex-A77 | ARMv8.2-A | 4-wide | 160 | 4/2/2 | 64 + 64 | 306 |
2020 | Cortex-A78 | ARMv8.2-A | 4-wide | 160 | 4/2/3 | 32/64 + 32/64 | 325 |
2021 | Cortex-A710 | ARMv9.0-A | 4-wide | - | // | 32/64 + 32/64 | - |
2022 | Cortex-A715 | ARMv9.0-A | 5-wide | 192 | // | 32/64 + 32/64 | - |
2023 | Cortex-A720 | ARMv9.2-A | 5-wide | - | // | 32/64 + 32/64 | - |
2024 | Cortex-A725 | ARMv9.2-A | 5-wide | - | // | 32/64 + 32/64 | - |
2025 | Cortex-A730 | ARMv9.2-A | 5-wide | - | // | + | - |
Comparison[edit]
- "LITTLE" core
µArch | Cortex-A53 | Cortex-A55 | Cortex-A510 | Cortex-A520 | Cortex-A530 |
---|---|---|---|---|---|
Codename | Apollo | Ananke | Klein | Hayes | Nevis |
Peak clock speed | 2.3 GHz | 2.1 GHz | 2.0 GHz | 2.0 GHz | |
Architecture | ARMv8.0-A | ARMv8.2-A | ARMv9.0-A | ARMv9.2-A | ARMv9.2-A |
AArch | 32-bit and 64-bit | 64-bit | |||
L1 (I + D) (KiB) | 8/64 + 8/64 KiB | 16/64 + 16/64 KiB | 32/64 + 32/64 KiB | ||
L2 Cache (KiB) | 0–256 KiB | 0–512 KiB | |||
L3 Cache (MiB) | - | 0–4 MiB | 0–16 MiB | 0–32 MiB | |
Decode Width | 2 | 3 | 3 (2 ALU) | - | |
Dispatch | 8 |
- "big" core
µArch | Cortex-A77 | Cortex-A78 | Cortex-A710 | Cortex-A715 | Cortex-A720 | Cortex-A725 | Cortex-A730 |
---|---|---|---|---|---|---|---|
Codename | Deimos | Hercules | Matterhorn | Makalu | Hunter | Chaberton | Gelas |
Peak clock speed | ~3.0 GHz | ||||||
Architecture | ARMv8.2-A | ARMv9.0-A | ARMv9.2-A | - | |||
AArch | 32-bit and 64-bit | 64-bit | - | - | |||
Max In-flight | 160 | 160 | ? | 192+ [1] | ? | - | - |
L0 (Mops entries) | 1536 | 0 | - | - | |||
L1 (I + D) (KiB) | 64 + 64 KiB | 32/64 + 32/64 KiB | 64 + 64 KiB | - | |||
L2 Cache (KiB) | 256–512 KiB | 128–512 KiB | 1 MiB [2] | ||||
L3 Cache (MiB) | 0–4 MiB | 0–8 MiB | 0–16 MiB | 0–32 MiB [3] | 0–32 MiB | ||
Decode width | 4 | 5 | - | ||||
Dispatch | - | 6/cycle | 5/cycle | ? | - | - |
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