• amd/k6-2/k6-2-300anz-66
  ...as a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (341 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-333amz
  ...as a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-333amz-66
  ...as a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (341 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-333anz
  ...as a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-333anz-66
  ...as a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (341 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-300bnz
  ...as a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (335 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-300bnz-66
  ...as a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (336 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-333bnz
  ...as a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (335 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-333bnz-66
  ...as a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (336 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-380ack
  ...as a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (347 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2e-233afr
  ...FR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (345 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-233amz
  ...MZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (345 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-266afr
  ...FR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (345 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-266amz
  ...MZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (345 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-300afr
  ...FR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (345 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-300afr-66
  ...66''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (346 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-300amz
  ...MZ''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (345 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-300amz-66
  ...66''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (346 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-333afr
  ...FR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (344 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-333afr-66
  ...FR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (344 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-333amz
  ...FR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (344 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-333amz-66
  ...FR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (344 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-350afr
  ...FR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (344 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-350amz
  ...FR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.
  3 KB (344 words) - 16:09, 13 December 2017
• amd/k6-iii
  If a microprocessor is missing from the list, an appropriate article for it needs to be ...[[Category:microprocessor models by amd]][[instance of::microprocessor]][[microprocessor family::K6-III]][[market segment::Desktop]][[core name::Sharptooth]]
  9 KB (1,264 words) - 02:29, 19 January 2017
• amd/duron
  ...on (still nameless at the time) was marked on [[AMD]]'s roadmap during the Microprocessor Forum in [[1998]]. Almost a year after the introduction of {{amd|Athlon}}, If a microprocessor is missing from the list, an appropriate article for it needs to be
  19 KB (2,874 words) - 17:30, 3 December 2016
• p-rating
  ...ed various [[x86]] manufacturers to gauge the performance level of their [[microprocessor]]s against equivalent {{intel|Pentium (1992)|Pentium}}-level performance. P ...s: Four companies announce new, simplified method for consumers to measure microprocessor performance in PCs]]
  3 KB (456 words) - 06:30, 8 July 2020
• processor performance rating (p-rating) specification
  ...ing number as currently defined is chosen to conform to a standard Pentium microprocessor frequency. To obtain the P-rating, compare the vendor processor benchmark s
  11 KB (1,244 words) - 06:26, 8 July 2020
• amd/duron/d550aut1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the f
  4 KB (423 words) - 16:07, 13 December 2017
• amd/duron/d600aut1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the f
  4 KB (438 words) - 16:07, 13 December 2017
• amd/duron/d650aut1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the f
  4 KB (423 words) - 16:07, 13 December 2017
• amd/duron/d700aut1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the f
  4 KB (423 words) - 16:07, 13 December 2017
• amd/duron/d750aut1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the f
  4 KB (423 words) - 16:07, 13 December 2017
• amd/duron/d800aut1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the f
  4 KB (438 words) - 16:07, 13 December 2017
• amd/duron/d850aut1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This model was part of the f
  4 KB (423 words) - 16:07, 13 December 2017
• amd/duron/d950aut1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This model was part of the f
  4 KB (422 words) - 16:07, 13 December 2017
• amd/duron/d900aut1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This model was part of the f
  4 KB (437 words) - 16:07, 13 December 2017
• amd/duron/d700ast1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the f
  4 KB (427 words) - 16:07, 13 December 2017
• amd/duron/d600ast1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This model was part of the f
  4 KB (419 words) - 16:07, 13 December 2017
• amd/duron/d650ast1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the f
  4 KB (419 words) - 16:07, 13 December 2017
• amd/duron/d750ast1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the f
  4 KB (419 words) - 16:07, 13 December 2017
• amd/duron/d700avs1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the f
  4 KB (419 words) - 16:07, 13 December 2017
• amd/duron/d800avs1b
  ...0''' based on the {{amd|Spitfire|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This model was part of the f
  4 KB (419 words) - 16:07, 13 December 2017
• amd/duron/dm600avs1b
  ...sed on the {{amd|Spitfire|l=core}} core was a {{arch|32}} mobile [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. This model was part of
  4 KB (372 words) - 16:07, 13 December 2017
• amd/duron/dm650avs1b
  ...sed on the {{amd|Spitfire|l=core}} core was a {{arch|32}} mobile [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. This model was part of
  4 KB (372 words) - 16:07, 13 December 2017
• amd/duron/dm700avs1b
  ...sed on the {{amd|Spitfire|l=core}} core was a {{arch|32}} mobile [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. This model was part of
  4 KB (372 words) - 16:07, 13 December 2017
• princeton/piton
  '''Piton''' is a {{arch|64}} [[many-core microprocessor]] developed by [[Princeton]]'s Parallel Computing Group and announced in Au
  6 KB (731 words) - 15:41, 5 July 2018
• intel/core i3/i3-7100u
  ...7100U''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in mid-2016. This chip, which is based on the {{int
  4 KB (626 words) - 16:18, 13 December 2017
• intel/core m/m3-7y30
  ...arch|64}} [[dual-core]] low-end performance ultra-low power [[x86]] mobile microprocessor introduced by [[Intel]] in mid-[[2016]]. This chip, which is based on the {
  4 KB (654 words) - 17:58, 28 August 2018
• intel/core i7/i7-7y75
  ...7Y75''' is a {{arch|64}} [[dual-core]] high-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in mid-[[2016]]. This processor, which is based on
  4 KB (660 words) - 18:04, 28 August 2018
• intel/core i7/i7-7500u
  ...500U''' is a {{arch|64}} [[dual-core]] high-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in mid-[[2016]]. This processor, which is based on
  4 KB (650 words) - 17:50, 13 January 2021
• intel/core i5/i5-7y54
  ...Y54''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in mid-[[2016]]. This chip, which is based on the {
  4 KB (652 words) - 18:04, 28 August 2018
• intel/core i5/i5-7200u
  ...00U''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in mid-[[2016]]. This chip, which is based on the {
  5 KB (799 words) - 17:27, 17 February 2023
• amd/microarchitectures/k6
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microarchitecture::K6]]
  4 KB (578 words) - 18:57, 22 May 2019
• amd/microarchitectures/k7
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microarchitecture::K7]] [[max cpu count::1]]
  6 KB (923 words) - 16:48, 3 March 2022
• amd/microarchitectures/k8
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microarchitecture::K8]]
  2 KB (261 words) - 01:06, 19 June 2023
• amd/microarchitectures/k10
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microarchitecture::K10]]
  2 KB (261 words) - 16:24, 4 January 2022
• amd/microarchitectures/piledriver
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microarchitecture::Piledriver]]
  2 KB (223 words) - 19:54, 14 July 2021
• amd/microarchitectures/zen
  ...to represent the balance needed between the various competing aspects of a microprocessor - transistor allocation/die size, clock/frequency restriction, power limita ...aits. Most of that functionality is already found on every modern high-end microprocessor (including AMD's own previous microarchitectures). Because AMD has not disc
  79 KB (12,095 words) - 15:27, 9 June 2023
• amd/microarchitectures/zen 2
  ...(2020). <i>2.1 Zen 2: The AMD 7nm Energy-Efficient High-Performance x86-64 Microprocessor Core</i>. 2020 IEEE International Solid-State Circuits Conference. pp. 42-4 ...processor-core Zen 2: The AMD 7nm Energy-Efficient High-Performance x86-64 Microprocessor Core]</i>. IEEE ISSCC 2020, February 17, 2020.</ref>
  57 KB (8,701 words) - 22:11, 9 October 2022
• intel/pentium (2009)/j4205
  '''Pentium J4205''' is a [[quad-core]] {{arch|64}} [[x86]] desktop microprocessor introduced by [[Intel]] in 2016. The processor is based on {{intel|Goldmont
  6 KB (633 words) - 16:25, 13 December 2017
• intel/celeron/j3455
  '''Celeron J3455''' is a [[quad-core]] {{arch|64}} [[x86]] desktop microprocessor introduced by [[Intel]] in 2016. The processor is based on {{intel|Goldmont
  5 KB (584 words) - 18:02, 9 February 2019
• intel/celeron/j3355
  '''Celeron J3355''' is a [[dual-core]] {{arch|64}} [[x86]] desktop microprocessor introduced by [[Intel]] in 2016. The processor is based on {{intel|Goldmont
  6 KB (639 words) - 12:32, 9 May 2018
• intel/pentium (2009)/n4200
  '''Pentium N4200''' is a [[quad-core]] {{arch|64}} [[x86]] mobile microprocessor introduced by [[Intel]] in 2016. The processor is based on {{intel|Goldmont
  6 KB (642 words) - 16:25, 13 December 2017
• intel/celeron/n3350
  '''Celeron N3350''' is a [[dual-core]] {{arch|64}} [[x86]] mobile microprocessor introduced by [[Intel]] in 2016. The processor is based on {{intel|Goldmont
  7 KB (847 words) - 20:58, 21 October 2023
• intel/celeron/n3450
  '''Celeron N3450''' is a [[quad-core]] {{arch|64}} [[x86]] mobile microprocessor introduced by [[Intel]] in 2016. The processor is based on {{intel|Goldmont
  7 KB (837 words) - 23:15, 25 August 2019
• pezy/pezy-1
  '''PEZY-1''' was a first generation [[many-core microprocessor]] developed by [[PEZY]] in 2012. PEZY-1 contains 2 {{armh|ARM926}} cores ({
  2 KB (343 words) - 03:48, 20 October 2018
• pezy/pezy-scx/pezy-sc
  '''PEZY-SC''' ('''PEZY Super Computer''') is a second generation [[many-core microprocessor]] developed by [[PEZY]] and introduced in 2014. This chip, which operates a
  4 KB (612 words) - 11:14, 22 September 2018
• pezy/pezy-scx/pezy-sc2
  ...EZY-SC2''' ('''PEZY Super Computer 2''') is a third generation [[many-core microprocessor]] developed by [[PEZY]] and introduced in early 2017. This chip, which oper
  5 KB (683 words) - 11:15, 22 September 2018
• pezy/pezy-scx/pezy-sc3
  ...ZY-SC3''' ('''PEZY Super Computer 3''') is a fourth generation [[many-core microprocessor]] developed by [[PEZY]] set to be introduced in late 2019. This chip, which
  3 KB (349 words) - 12:41, 28 September 2019
• amd/k6-iii/amd-k6-iii-333afr
  '''AMD-K6-III/333AFR''' is a {{arch|32}} [[x86]] desktop microprocessor designed by [[AMD]] and introduced in early [[1999]]. This MPU which was ma
  3 KB (362 words) - 16:09, 13 December 2017
• amd/k6-iii/amd-k6-iii-400ahx
  '''AMD-K6-III/400AHX''' is a {{arch|32}} [[x86]] desktop microprocessor designed by [[AMD]] and introduced in early [[1999]]. This MPU which was ma
  3 KB (374 words) - 16:09, 13 December 2017
• amd/k6-iii/amd-k6-iii-400afr
  '''AMD-K6-III/400AFR''' is a {{arch|32}} [[x86]] desktop microprocessor designed by [[AMD]] and introduced in early [[1999]]. This MPU which was ma
  3 KB (371 words) - 16:09, 13 December 2017
• amd/k6-iii/amd-k6-iii-450ahx
  '''AMD-K6-III/450AHX''' is a {{arch|32}} [[x86]] desktop microprocessor designed by [[AMD]] and introduced in early [[1999]]. This MPU which was ma
  3 KB (349 words) - 16:09, 13 December 2017
• amd/k6-iii/amd-k6-iii-450afx
  '''AMD-K6-III/450AFX''' is a {{arch|32}} [[x86]] desktop microprocessor designed by [[AMD]] and introduced in early [[1999]]. This MPU which was ma
  3 KB (349 words) - 16:09, 13 December 2017
• amd/k6-iii-p/amd-k6-iii-333afk
  '''AMD-K6-III/333AFK''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1999]]. This MPU which was ma
  3 KB (377 words) - 16:09, 13 December 2017
• amd/k6-iii-p/amd-k6-iii-350afk
  '''AMD-K6-III/350AFK''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1999]]. This MPU which was ma
  3 KB (355 words) - 16:09, 13 December 2017
• amd/k6-iii-p/amd-k6-iii-366afk
  '''AMD-K6-III/366AFK''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1999]]. This MPU which was ma
  3 KB (355 words) - 16:09, 13 December 2017
• amd/k6-iii-p/amd-k6-iii-380afk
  '''AMD-K6-III/380AFK''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[1999]]. This MPU which was ma
  3 KB (355 words) - 16:09, 13 December 2017
• amd/k6-iii-p/amd-k6-iii-400ack
  '''AMD-K6-III/400ACK''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in late [[1999]]. This MPU which was man
  3 KB (355 words) - 16:09, 13 December 2017
• amd/k6-iii-p/amd-k6-iii-433ack
  '''AMD-K6-III/433ACK''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in late [[1999]]. This MPU which was man
  3 KB (355 words) - 16:09, 13 December 2017
• amd/k6-iii-p/amd-k6-iii-450ack
  '''AMD-K6-III/450ACK''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in late [[1999]]. This MPU which was man
  4 KB (551 words) - 19:10, 27 October 2018
• amd/k6-iii+/amd-k6-iii+-450acz
  '''AMD-K6-III+/400ACZ''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[2000]]. This MPU which was ma
  4 KB (569 words) - 15:16, 26 October 2018
• amd/k6-iii+/amd-k6-iii+-475acz
  '''AMD-K6-III+/475ACZ''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[2000]]. This MPU which was ma
  3 KB (368 words) - 16:09, 13 December 2017
• amd/k6-iii+/amd-k6-iii+-500acz
  '''AMD-K6-III+/500ACZ''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[2000]]. This MPU which was ma
  3 KB (368 words) - 16:09, 13 December 2017
• amd/k6-iii+/amd-k6-iiie+-400atz
  '''AMD-K6-IIIE+/400ATZ''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000]]. This MPU which was man
  3 KB (361 words) - 09:39, 27 July 2020
• amd/k6-iii+/amd-k6-iiie+-400itz
  '''AMD-K6-IIIE+/400ITZ''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000]]. This MPU which was man
  3 KB (334 words) - 13:42, 18 March 2023
• amd/k6-iii+/amd-k6-iiie+-400icr
  '''AMD-K6-IIIE+/400ICR''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000]]. This MPU which was man
  3 KB (334 words) - 13:42, 18 March 2023
• amd/k6-2+/k6-2e+-500acr
  '''K6-2E+/500ACR''' was a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000]]. Based on the {{amd|mic
  2 KB (299 words) - 06:06, 24 March 2023
• amd/k6-iii+/amd-k6-iiie+-400acr
  '''AMD-K6-IIIE+/400ACR''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000]]. This MPU which was man
  4 KB (557 words) - 03:30, 26 October 2018
• amd/k6-iii+/amd-k6-iiie+-450apz
  '''AMD-K6-IIIE+/450APZ''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000]]. This MPU which was man
  3 KB (361 words) - 16:09, 13 December 2017
• amd/k6-iii+/amd-k6-iiie+-450acr
  '''AMD-K6-IIIE+/450ACR''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000]]. This MPU which was man
  3 KB (361 words) - 16:09, 13 December 2017
• amd/k6-iii+/amd-k6-iiie+-500anz
  '''AMD-K6-IIIE+/500ANZ''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000]]. This MPU which was man
  3 KB (361 words) - 16:09, 13 December 2017
• amd/k6-iii+/amd-k6-iiie+-500acr
  '''AMD-K6-IIIE+/500ACR''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000]]. This MPU which was man
  3 KB (361 words) - 16:09, 13 December 2017
• amd/k6-iii+/amd-k6-iiie+-550acr
  '''AMD-K6-IIIE+/550ACR''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000]]. This MPU which was man
  3 KB (361 words) - 16:09, 13 December 2017
• intel/core i7/i7-7700
  ...700''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] desktop microprocessor introduced by [[Intel]] in [[2017]]. This processor, which is based on the
  5 KB (674 words) - 19:57, 22 October 2019
• intel/core i7/i7-7700t
  ...00T''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] desktop microprocessor introduced by [[Intel]] in [[2017]]. This processor, which is based on the
  5 KB (694 words) - 23:04, 15 April 2019
• intel/core i7/i7-7700k
  ...00K''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] desktop microprocessor introduced by [[Intel]] in [[2017]]. This processor, which is based on the
  5 KB (699 words) - 11:45, 15 April 2019
• intel/core i5/i5-7600k
  ...0K''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (665 words) - 12:47, 4 June 2018
• intel/core i5/i5-7600
  ...00''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (658 words) - 16:20, 13 December 2017
• intel/core i5/i5-7600t
  ...0T''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  5 KB (677 words) - 16:20, 13 December 2017
• intel/core i5/i5-7500
  ...re i5-7500''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] microprocessor introduced by [[Intel]] in early [[2017]] for the desktop and embedded mark
  5 KB (665 words) - 21:59, 13 September 2018
• intel/core i5/i5-7500t
  ...e i5-7500T''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] microprocessor introduced by [[Intel]] in early [[2017]] for the desktop and embedded mark
  5 KB (684 words) - 16:20, 13 December 2017
• intel/core i5/i5-7400
  ...00''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (659 words) - 16:20, 13 December 2017
• intel/core i5/i5-7400t
  ...0T''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  5 KB (677 words) - 16:20, 13 December 2017
• amd/duron/dhd900amt1b
  ...900''' based on the {{amd|Morgan|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. This model was part of
  4 KB (434 words) - 16:07, 13 December 2017
• amd/duron/dhd950amt1b
  ...950''' based on the {{amd|Morgan|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2001. This model was part of t
  4 KB (434 words) - 16:07, 13 December 2017
• amd/duron/dhd1000amt1b
  ...000''' based on the {{amd|Morgan|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2001. This model was part of t
  4 KB (434 words) - 16:07, 13 December 2017
• amd/duron/dhd1100amt1b
  ...000''' based on the {{amd|Morgan|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in late 2001. This model was part of
  4 KB (434 words) - 16:07, 13 December 2017
• amd/duron/dhd1200amt1b
  ...200''' based on the {{amd|Morgan|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in late 2001. This model was part of
  4 KB (456 words) - 16:07, 13 December 2017
• amd/duron/dhd1300amt1b
  ...300''' based on the {{amd|Morgan|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2002. This model was part of
  4 KB (445 words) - 16:07, 13 December 2017
• amd/duron/dhd1400dlv1c
  ...''' based on the {{amd|Applebred|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2003. This model was part of t
  4 KB (414 words) - 16:07, 13 December 2017
• amd/duron/dhd1600dlv1c
  ...''' based on the {{amd|Applebred|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2003. This model was part of t
  4 KB (429 words) - 16:07, 13 December 2017
• amd/duron/dhd1800dlv1c
  ...''' based on the {{amd|Applebred|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2003. This model was part of t
  4 KB (414 words) - 16:07, 13 December 2017
• amd/duron/dhm1300alq1b
  ...sed on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in late early 2002. This model was pa
  4 KB (403 words) - 16:07, 13 December 2017
• amd/duron/dhm1200aqq1b
  ...sed on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in late early 2002. This model was pa
  4 KB (403 words) - 16:07, 13 December 2017
• amd/duron/dhm1100ahq1b
  ...sed on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in late early 2002. This model was pa
  4 KB (403 words) - 16:07, 13 December 2017
• amd/duron/dhm1000avs1b
  ...sed on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in late 2001. This model was part of
  4 KB (409 words) - 16:07, 13 December 2017
• amd/duron/dhm0950aqs1b
  ...sed on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in late 2001. This model was part of
  4 KB (409 words) - 16:07, 13 December 2017
• amd/duron/dhm0900aqs1b
  ...sed on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2001. This model was part of t
  4 KB (409 words) - 16:07, 13 December 2017
• amd/duron/dhm0850als1b
  ...sed on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. This model was part of
  4 KB (409 words) - 16:07, 13 December 2017
• amd/duron/dhm0850avs1b
  ...sed on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. This model was part of
  4 KB (409 words) - 16:07, 13 December 2017
• amd/duron/dhm0800als1b
  ...sed on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. This model was part of
  4 KB (409 words) - 16:07, 13 December 2017
• amd/duron/dhg0800avs1b
  ...sed on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This model was part of the s
  4 KB (406 words) - 16:07, 13 December 2017
• amd/duron/dhm0800avs1bm
  ...sed on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This model was part of the s
  4 KB (443 words) - 16:07, 13 December 2017
• amd/duron/dhm0850avs1bm
  ...sed on the {{amd|Morgan|l=core}} (Camaro) core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2001. This model was part of the s
  4 KB (443 words) - 16:07, 13 December 2017
• intel/xeon e5/e5-4669 v4
  The '''Xeon E5-4669 v4''' is a {{arch|64}} [[docosa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for high-perfo This microprocessor has no [[integrated graphics processing unit]].
  4 KB (465 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-4667 v4
  The '''Xeon E5-4667 v4''' is a {{arch|64}} [[octadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for high-perfo This microprocessor has no [[integrated graphics processing unit]].
  4 KB (482 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-4660 v4
  The '''Xeon E5-4660 v4''' is a {{arch|64}} [[hexadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for advanced 4 This microprocessor has no [[integrated graphics processing unit]].
  5 KB (487 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-4655 v4
  The '''Xeon E5-4655 v4''' is a {{arch|64}} [[octa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for frequency- This microprocessor has no [[integrated graphics processing unit]].
  4 KB (472 words) - 17:26, 31 January 2024
• intel/xeon e5/e5-4650 v4
  The '''Xeon E5-4650 v4''' is a {{arch|64}} [[tetradeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for advanced 4 This microprocessor has no [[integrated graphics processing unit]].
  4 KB (481 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-4640 v4
  The '''Xeon E5-4640 v4''' is a {{arch|64}} [[dodeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for standard 4 This microprocessor has no [[integrated graphics processing unit]].
  5 KB (643 words) - 13:58, 13 November 2018
• intel/xeon e5/e5-4627 v4
  The '''Xeon E5-4627 v4''' is a {{arch|64}} [[deca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for frequency- This microprocessor has no [[integrated graphics processing unit]].
  5 KB (493 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-4620 v4
  The '''Xeon E5-4620 v4''' is a {{arch|64}} [[deca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for standard 4 This microprocessor has no [[integrated graphics processing unit]].
  5 KB (487 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-4610 v4
  The '''Xeon E5-4610 v4''' is a {{arch|64}} [[deca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for basic 4S e This microprocessor has no [[integrated graphics processing unit]].
  4 KB (473 words) - 16:28, 13 December 2017
• intel/xeon e5
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by intel]][[microprocessor family::Xeon E5]][[microarchitecture::Haswell]][[max cpu count::4]]
  11 KB (1,395 words) - 08:36, 4 November 2020
• intel/xeon e5/e5-2699a v4
  The '''Xeon E5-2699A v4''' is a {{arch|64}} [[docosa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-op This microprocessor has no [[integrated graphics processing unit]].
  7 KB (1,005 words) - 17:28, 14 November 2023
• intel/xeon e5/e5-2698 v4
  The '''Xeon E5-2698 v4''' is a {{arch|64}} [[icosa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-op This microprocessor has no [[integrated graphics processing unit]].
  6 KB (644 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-2697 v4
  The '''Xeon E5-2697 v4''' is a {{arch|64}} [[octadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-op This microprocessor has no [[integrated graphics processing unit]].
  5 KB (536 words) - 14:17, 28 July 2023
• intel/xeon e5/e5-2697a v4
  The '''Xeon E5-2697A v4''' is a {{arch|64}} [[hexadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-op This microprocessor has no [[integrated graphics processing unit]].
  4 KB (506 words) - 21:46, 2 February 2024
• intel/xeon e5/e5-2690 v4
  The '''Xeon E5-2690 v4''' is a {{arch|64}} [[tetradeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for advanced 2 This microprocessor has no [[integrated graphics processing unit]].
  5 KB (567 words) - 00:55, 29 April 2018
• intel/xeon e5/e5-2687w v4
  The '''Xeon E5-2687W v4''' is a {{arch|64}} [[dodeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 2S worksta This microprocessor has no [[integrated graphics processing unit]].
  4 KB (494 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-2695 v4
  The '''Xeon E5-2695 v4''' is a {{arch|64}} [[octadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-op This microprocessor has no [[integrated graphics processing unit]].
  5 KB (541 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-2699 v4
  The '''Xeon E5-2699 v4''' is a {{arch|64}} [[docosa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-op This microprocessor has no [[integrated graphics processing unit]].
  6 KB (650 words) - 14:28, 28 July 2023
• intel/xeon e5/e5-2683 v4
  The '''Xeon E5-2683 v4''' is a {{arch|64}} [[hexadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for segment-op This microprocessor has no [[integrated graphics processing unit]].
  5 KB (536 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-2680 v4
  The '''Xeon E5-2680 v4''' is a {{arch|64}} [[tetradeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for advanced 2 This microprocessor has no [[integrated graphics processing unit]].
  5 KB (519 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-2660 v4
  The '''Xeon E5-2660 v4''' is a {{arch|64}} [[tetradeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for advanced 2 This microprocessor has no [[integrated graphics processing unit]].
  5 KB (523 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2650l v4
  The '''Xeon E5-2650L v4''' is a {{arch|64}} [[tetradeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for low-power This microprocessor has no [[integrated graphics processing unit]].
  5 KB (523 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2650 v4
  The '''Xeon E5-2650 v4''' is a {{arch|64}} [[dodeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for advanced 2 This microprocessor has no [[integrated graphics processing unit]].
  5 KB (570 words) - 22:36, 26 March 2023
• intel/xeon e5/e5-2667 v4
  The '''Xeon E5-2667 v4''' is a {{arch|64}} [[octa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for frequency- This microprocessor has no [[integrated graphics processing unit]].
  5 KB (511 words) - 12:13, 1 August 2019
• intel/xeon e5/e5-2643 v4
  The '''Xeon E5-2643 v4''' is a {{arch|64}} [[hexa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for frequency- This microprocessor has no [[integrated graphics processing unit]].
  5 KB (499 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2640 v4
  The '''Xeon E5-2640 v4''' is a {{arch|64}} [[deca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for standard 2 This microprocessor has no [[integrated graphics processing unit]].
  5 KB (517 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2637 v4
  The '''Xeon E5-2637 v4''' is a {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for frequency- This microprocessor has no [[integrated graphics processing unit]].
  5 KB (493 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2630 v4
  The '''Xeon E5-2630 v4''' is a {{arch|64}} [[deca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for standard 2 This microprocessor has no [[integrated graphics processing unit]].
  5 KB (523 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2630l v4
  The '''Xeon E5-2630L v4''' is a {{arch|64}} [[deca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for low-power This microprocessor has no [[integrated graphics processing unit]].
  5 KB (521 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2623 v4
  The '''Xeon E5-2623 v4''' is a {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for frequency- This microprocessor has no [[integrated graphics processing unit]].
  5 KB (493 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2620 v4
  The '''Xeon E5-2620 v4''' is a {{arch|64}} [[octa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for standard 2 This microprocessor has no [[integrated graphics processing unit]].
  5 KB (620 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2609 v4
  The '''Xeon E5-2609 v4''' is a {{arch|64}} [[octa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for basic 2S e This microprocessor has no [[integrated graphics processing unit]].
  5 KB (492 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2603 v4
  The '''Xeon E5-2603 v4''' is a {{arch|64}} [[hexa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for basic 2S e This microprocessor has no [[integrated graphics processing unit]].
  4 KB (476 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-1680 v4
  The '''Xeon E5-1680 v4''' is a {{arch|64}} [[octa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 1S worksta This microprocessor has no [[integrated graphics processing unit]].
  5 KB (643 words) - 01:04, 24 December 2017
• intel/xeon e5/e5-1660 v4
  The '''Xeon E5-1660 v4''' is a {{arch|64}} [[octa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 1S worksta This microprocessor has no [[integrated graphics processing unit]].
  5 KB (643 words) - 01:04, 24 December 2017
• intel/xeon e5/e5-1650 v4
  The '''Xeon E5-1650 v4''' is a {{arch|64}} [[hexa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 1S worksta This microprocessor has no [[integrated graphics processing unit]].
  5 KB (640 words) - 01:04, 24 December 2017
• intel/xeon e5/e5-1630 v4
  The '''Xeon E5-1630 v4''' is a {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 1S worksta This microprocessor has no [[integrated graphics processing unit]].
  5 KB (637 words) - 01:04, 24 December 2017
• intel/xeon e5/e5-1620 v4
  The '''Xeon E5-1620 v4''' is a {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 1S worksta This microprocessor has no [[integrated graphics processing unit]].
  5 KB (637 words) - 01:04, 24 December 2017
• quad-core
  A '''quad-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements four independent phys If a microprocessor is missing from the list, an appropriate article for it needs to be
  2 KB (276 words) - 04:58, 6 January 2017
• intel/xeon e5/e5-4628l v4
  The '''Xeon E5-4628L v4''' is a {{arch|64}} [[tetradeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This embedded MPU is designed for low-powe This microprocessor has no [[integrated graphics processing unit]].
  4 KB (484 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-2699r v4
  The '''Xeon E5-2699R v4''' is a {{arch|64}} [[docosa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This embedded server MPU is designed for l This microprocessor has no [[integrated graphics processing unit]].
  4 KB (486 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-2658 v4
  The '''Xeon E5-2658 v4''' is a {{arch|64}} [[tetradeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This embedded server MPU is designed for 2 This microprocessor has no [[integrated graphics processing unit]].
  5 KB (520 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2648l v4
  The '''Xeon E5-2648L v4''' is a {{arch|64}} [[tetradeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This embedded server MPU is designed for 2 This microprocessor has no [[integrated graphics processing unit]].
  5 KB (524 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2628l v4
  The '''Xeon E5-2628L v4''' is a {{arch|64}} [[dodeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This embedded server MPU is designed for l This microprocessor has no [[integrated graphics processing unit]].
  5 KB (525 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2618l v4
  The '''Xeon E5-2618L v4''' is a {{arch|64}} [[deca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for low-power This microprocessor has no [[integrated graphics processing unit]].
  5 KB (520 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2608l v4
  The '''Xeon E5-2608L v4''' is a {{arch|64}} [[octa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This embedded server MPU is designed for l This microprocessor has no [[integrated graphics processing unit]].
  5 KB (511 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-1607 v4
  The '''Xeon E5-1607 v4''' is a {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 1S worksta This microprocessor has no [[integrated graphics processing unit]].
  4 KB (485 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-1603 v4
  The '''Xeon E5-1603 v4''' is a {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 1S worksta This microprocessor has no [[integrated graphics processing unit]].
  4 KB (477 words) - 16:27, 13 December 2017
• intel/xeon e5/e5-2689 v4
  The '''Xeon E5-2689 v4''' is a {{arch|64}} [[deca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for standard 2 This microprocessor has no [[integrated graphics processing unit]].
  5 KB (514 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-2670 v4
  The '''Xeon E5-2670 v4''' is a {{arch|64}} [[tetradeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 2S environ This microprocessor has no [[integrated graphics processing unit]].
  4 KB (480 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-2689a v4
  The '''Xeon E5-2689A v4''' is a {{arch|64}} [[octa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 2S environ This microprocessor is OEM only.
  5 KB (505 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-2682 v4
  The '''Xeon E5-2682 v4''' is a {{arch|64}} [[hexadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 2S environ This microprocessor is OEM only.
  5 KB (534 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-2679 v4
  The '''Xeon E5-2679 v4''' is a {{arch|64}} [[icosa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 2S environ This microprocessor has no [[integrated graphics processing unit]].
  5 KB (535 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-2696 v4
  The '''Xeon E5-2696 v4''' is a {{arch|64}} [[docosa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 2S environ This microprocessor has no [[integrated graphics processing unit]].
  5 KB (541 words) - 16:28, 13 December 2017
• intel/xeon e5/e5-2673 v4
  The '''Xeon E5-2673 v4''' is a {{arch|64}} [[icosa-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 2S environ This microprocessor has no [[integrated graphics processing unit]].
  5 KB (534 words) - 17:04, 15 October 2019
• intel/xeon e5/e5-2686 v4
  The '''Xeon E5-2686 v4''' is a {{arch|64}} [[octadeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 2S environ This microprocessor has no [[integrated graphics processing unit]].
  5 KB (529 words) - 16:28, 13 December 2017
• intel/xeon e3/e3-1205 v6
  ...1205 v6''' is a {{arch|64}} [[quad-core]] [[x86]] workstation/entry server microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (605 words) - 16:26, 13 December 2017
• intel/xeon e3/e3-1280 v6
  ...1280 v6''' is a {{arch|64}} [[quad-core]] [[x86]] workstation/entry server microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  3 KB (489 words) - 16:27, 13 December 2017
• intel/xeon e3/e3-1275 v6
  ...1275 v6''' is a {{arch|64}} [[quad-core]] [[x86]] workstation/entry server microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (625 words) - 16:27, 13 December 2017
• intel/xeon e3/e3-1270 v6
  ...1270 v6''' is a {{arch|64}} [[quad-core]] [[x86]] workstation/entry server microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  3 KB (489 words) - 16:27, 13 December 2017
• intel/xeon e3/e3-1245 v6
  ...1245 v6''' is a {{arch|64}} [[quad-core]] [[x86]] workstation/entry server microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (616 words) - 16:26, 13 December 2017
• intel/xeon e3/e3-1240 v6
  ...1240 v6''' is a {{arch|64}} [[quad-core]] [[x86]] workstation/entry server microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  3 KB (489 words) - 16:26, 13 December 2017
• intel/xeon e3/e3-1230 v6
  ...1230 v6''' is a {{arch|64}} [[quad-core]] [[x86]] workstation/entry server microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  3 KB (492 words) - 16:26, 13 December 2017
• intel/xeon e3/e3-1225 v6
  ...1225 v6''' is a {{arch|64}} [[quad-core]] [[x86]] workstation/entry server microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (667 words) - 16:26, 13 December 2017
• intel/xeon e3/e3-1220 v6
  ...1220 v6''' is a {{arch|64}} [[quad-core]] [[x86]] workstation/entry server microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  3 KB (540 words) - 10:01, 1 November 2018
• intel/core i3/i3-7300
  ...7300''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  5 KB (663 words) - 13:08, 28 March 2021
• intel/core i3/i3-7310t
  ...310T''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (621 words) - 16:18, 13 December 2017
• intel/pentium gold/g4620
  ...entium Gold G4620''' is a {{arch|64}} [[dual-core]] budget [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. The G4620, which is based on the
  4 KB (651 words) - 15:08, 24 December 2017
• amd/athlon mp
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by amd]] [[microprocessor family::Athlon MP]] [[core name::Palomino]]
  11 KB (1,571 words) - 18:57, 17 November 2016
• intel/core i3/i3-6006u
  ...U''' is a {{arch|64}} [[dual-core]] entry-level performance [[x86]] mobile microprocessor introduced by [[Intel]] in late [[2016]]. Fabricated on a [[14 nm process]]
  5 KB (687 words) - 02:21, 16 January 2019
• intel/core i3/i3-7350k
  ...350K''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (644 words) - 14:59, 24 December 2017
• intel/core i3/i3-7320
  ...7320''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  5 KB (661 words) - 16:18, 13 December 2017
• intel/core i3/i3-7100
  ...7100''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  5 KB (662 words) - 06:02, 27 October 2018
• intel/pentium gold/g4600
  ...entium Gold G4600''' is a {{arch|64}} [[dual-core]] budget [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. The G4600, which is based on the
  4 KB (655 words) - 16:26, 13 December 2017
• intel/pentium gold/g4560
  ...entium Gold G4560''' is a {{arch|64}} [[dual-core]] budget [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. The G4560, which is based on the
  4 KB (655 words) - 15:07, 24 December 2017
• intel/celeron/g3930
  '''Celeron G3930''' is a {{arch|64}} [[dual-core]] budget [[x86]] desktop microprocessor introduced by [[Intel]] in early 2017. The G3930, which is based on the {{i
  4 KB (638 words) - 13:29, 7 April 2018
• intel/core i3/i3-7100t
  ...100T''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  5 KB (685 words) - 16:18, 13 December 2017
• intel/cores/gemini lake
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by intel]] [[core name::Gemini Lake]] [[market segment::Desktop]]
  4 KB (513 words) - 01:11, 6 July 2022
• amd/athlon mp/ahx1000ams3c
  ...the server and workstation market. The MP 1000 was AMD's first dual-socket microprocessor (along with the {{\\|AHX1200AMS3C|1200}}). This model operated at 1 GHz wit
  4 KB (542 words) - 15:20, 13 December 2017
• amd/athlon mp/ahx1200ams3c
  ...the server and workstation market. The MP 1200 was AMD's first dual-socket microprocessor (along with the {{\\|AHX1000AMS3C|1000}}). This model operated at 1,200 MHz
  4 KB (542 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-1dc
  '''AM9080A-1DC''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (228 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-1dcb
  '''AM9080A-1DCB''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (233 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-1di
  '''AM9080A-1DI''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (239 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-1dib
  '''AM9080A-1DIB''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (239 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-1cc
  '''AM9080A-1CC''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (226 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-1pc
  '''AM9080A-1PC''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (226 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-1pcb
  '''AM9080A-1PCB''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (231 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-2dc
  '''AM9080A-2DC''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (228 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-2dcb
  '''AM9080A-2DCB''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (233 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-2di
  '''AM9080A-2DI''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (235 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-2dib
  '''AM9080A-2DIB''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (239 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-2dm
  '''AM9080A-2DM''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (239 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-2dmb
  '''AM9080A-2DMB''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (243 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-2cc
  '''AM9080A-2CC''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (226 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-2pc
  '''AM9080A-2PC''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (226 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-2pcb
  '''AM9080A-2PCB''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (231 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-4cc
  '''AM9080A-4CC''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (226 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-4dc
  '''AM9080A-4DC''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (228 words) - 15:20, 13 December 2017
• amd/am9080/am9080a-4pc
  '''AM9080A-4PC''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (226 words) - 15:20, 13 December 2017
• amd/am9080/am9080acc
  '''AM9080ACC''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (221 words) - 15:20, 13 December 2017
• amd/am9080/am9080accb
  '''AM9080ACCB''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (226 words) - 15:20, 13 December 2017
• amd/am9080/am9080adc
  '''AM9080ADC''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (241 words) - 15:20, 13 December 2017
• amd/am9080/am9080adcb
  '''AM9080ADCB''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (228 words) - 15:20, 13 December 2017
• amd/am9080/am9080adi
  '''AM9080ADI''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (230 words) - 15:20, 13 December 2017
• amd/am9080/am9080adib
  '''AM9080ADIB''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (234 words) - 15:20, 13 December 2017
• amd/am9080/am9080adm
  '''AM9080ADM''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (234 words) - 15:20, 13 December 2017
• amd/am9080/am9080apcb
  '''AM9080APCB''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (229 words) - 15:20, 13 December 2017
• amd/am9080/am9080apc
  '''AM9080APC''' was an {{arch|8}} microprocessor manufactured by [[AMD]] as a drop-in replacement for [[Intel]]'s {{intel|MC
  2 KB (221 words) - 15:20, 13 December 2017
• qualcomm/msm6xxx
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by qualcomm]] [[microprocessor family::MSM6xxx]] [[part of::Value Platform]]
  7 KB (946 words) - 01:29, 22 November 2016
• intel/core i7/i7-820qm
  '''Core i7-820QM''' is a {{arch|64}} [[x86]] [[quad-core]] mobile performance microprocessor introduced by Intel late [[2009]]. The processor has a base frequency of 1.
  4 KB (493 words) - 16:15, 11 February 2018
• intel/core i7/i7-840qm
  '''Core i7-820QM''' is a {{arch|64}} [[x86]] [[quad-core]] mobile performance microprocessor introduced by Intel late [[2010]]. The processor has a base frequency of 1.
  4 KB (498 words) - 16:23, 13 December 2017
• intel/core i7/i7-720qm
  '''Core i7-820QM''' is a {{arch|64}} [[x86]] [[quad-core]] mobile performance microprocessor introduced by Intel late [[2009]]. The processor has a base frequency of 1.
  4 KB (498 words) - 16:23, 13 December 2017
• intel/core i7/i7-740qm
  '''Core i7-740QM''' is a {{arch|64}} [[x86]] [[quad-core]] mobile performance microprocessor introduced by Intel late [[2010]]. The processor has a base frequency of 1.
  4 KB (498 words) - 08:12, 20 June 2023
• intel/core i7/i7-610e
  '''Core i7-610E''' is a {{arch|64}} [[dual-core]] [[x86-64]] mobile microprocessor designed by [[Intel]] and introduced in early [[2010]]. This chip is a firs
  5 KB (563 words) - 16:22, 13 December 2017
• intel/core i7/i7-620lm
  '''Core i7-620LM''' is a {{arch|64}} [[dual-core]] [[x86-64]] mobile microprocessor designed by [[Intel]] and introduced in early [[2010]]. This chip is a firs
  4 KB (558 words) - 16:22, 13 December 2017
• intel/core i7/i7-620m
  '''Core i7-620M''' is a {{arch|64}} [[dual-core]] [[x86-64]] mobile microprocessor designed by [[Intel]] and introduced in early [[2010]]. This chip is a firs
  5 KB (580 words) - 12:03, 26 March 2020
• intel/core i7/i7-620um
  '''Core i7-620UM''' is a {{arch|64}} [[dual-core]] [[x86-64]] mobile microprocessor designed by [[Intel]] and introduced in early [[2010]]. This chip is a firs
  5 KB (571 words) - 16:22, 13 December 2017
• intel/core i7/i7-640lm
  '''Core i7-640LM''' is a {{arch|64}} [[dual-core]] [[x86-64]] mobile microprocessor designed by [[Intel]] and introduced in early [[2010]]. This chip is a firs
  5 KB (560 words) - 16:22, 13 December 2017
• intel/core i7/i7-640m
  '''Core i7-640M''' is a {{arch|64}} [[dual-core]] [[x86-64]] mobile microprocessor designed by [[Intel]] and introduced in early [[2010]]. This chip is a firs
  5 KB (573 words) - 16:22, 13 December 2017
• intel/core i7/i7-640um
  '''Core i7-640UM''' is a {{arch|64}} [[dual-core]] [[x86-64]] mobile microprocessor designed by [[Intel]] and introduced in early [[2010]]. This chip is a firs
  5 KB (571 words) - 16:22, 13 December 2017
• intel/core i7/i7-660um
  '''Core i7-660UM''' is a {{arch|64}} [[dual-core]] [[x86-64]] mobile microprocessor designed by [[Intel]] and introduced in early [[2010]]. This chip is a firs
  5 KB (567 words) - 16:22, 13 December 2017
• intel/core i7/i7-680um
  '''Core i7-680UM''' is a {{arch|64}} [[dual-core]] [[x86-64]] mobile microprocessor designed by [[Intel]] and introduced in early [[2010]]. This chip is a firs
  5 KB (569 words) - 16:23, 13 December 2017
• intel/core i7/i7-660lm
  '''Core i7-660LM''' is a {{arch|64}} [[dual-core]] [[x86-64]] mobile microprocessor designed by [[Intel]] and introduced in early [[2010]]. This chip is a firs
  5 KB (558 words) - 16:22, 13 December 2017
• intel/core i7/i7-660ue
  '''Core i7-660UE''' is a {{arch|64}} [[dual-core]] [[x86-64]] mobile microprocessor designed by [[Intel]] and introduced in early [[2010]]. This chip is a firs
  5 KB (572 words) - 16:22, 13 December 2017
• x86/extensions
  ...llections of new instructions are grouped into '''extensions'''. Different microprocessor models have different levels of support for certain extensions.
  6 KB (764 words) - 08:53, 7 June 2020
• intel/cores/clarksfield
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by intel]] [[core name::Clarksfield]]
  2 KB (328 words) - 07:48, 24 December 2019
• intel/hd graphics (ironlake)
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by intel]] [[integrated gpu::HD Graphics (Ironlake)]]
  3 KB (378 words) - 03:16, 1 December 2016
• intel/cores/arrandale
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by intel]] [[core name::Arrandale]] [[tdp::>>18]]
  4 KB (537 words) - 01:12, 28 August 2017
• intel/core i5/i5-580m
  '''Core i5-580M''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the
  5 KB (575 words) - 16:19, 13 December 2017
• intel/core i5/i5-560um
  '''Core i5-560UM''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the
  5 KB (558 words) - 16:19, 13 December 2017
• intel/core i5/i5-560m
  '''Core i5-560M''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the
  5 KB (575 words) - 07:19, 5 August 2019
• intel/core i5/i5-540um
  '''Core i5-540UM''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the
  4 KB (556 words) - 16:19, 13 December 2017
• intel/core i5/i5-540m
  '''Core i5-540M''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the
  5 KB (581 words) - 04:07, 31 March 2020
• intel/core i5/i5-520um
  '''Core i5-520UM''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the
  5 KB (561 words) - 16:19, 13 December 2017
• intel/core i5/i5-520m
  '''Core i5-520M''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the
  5 KB (584 words) - 10:47, 24 March 2019
• intel/core i5/i5-480m
  '''Core i5-480M''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the
  5 KB (568 words) - 03:00, 15 September 2019
• intel/core i5/i5-470um
  '''Core i5-470UM''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the
  4 KB (556 words) - 16:19, 13 December 2017
• intel/core i5/i5-460m
  '''Core i5-460M''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the
  5 KB (568 words) - 16:19, 13 December 2017
• intel/core i5/i5-450m
  '''Core i5-450M''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the
  5 KB (563 words) - 16:19, 13 December 2017
• intel/core i5/i5-430m
  '''Core i5-430M''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the
  5 KB (568 words) - 17:18, 26 November 2018
• intel/core i5/i5-430um
  '''Core i5-430UM''' is a {{arch|64}} [[x86]] [[dual-core]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the
  4 KB (556 words) - 16:19, 13 December 2017
• intel/core i3/i3-390m
  '''Core i3-390M''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (548 words) - 16:17, 13 December 2017
• intel/core i3/i3-380um
  '''Core i3-380UM''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (537 words) - 16:17, 13 December 2017
• intel/core i3/i3-380m
  '''Core i3-380M''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (538 words) - 11:34, 28 October 2020
• intel/core i3/i3-370m
  '''Core i3-370M''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (543 words) - 16:17, 13 December 2017
• intel/core i3/i3-350m
  '''Core i3-350M''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (555 words) - 16:17, 13 December 2017
• intel/core i3/i3-330um
  '''Core i3-330UM''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (536 words) - 16:17, 13 December 2017
• intel/core i3/i3-330m
  '''Core i3-330M''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (553 words) - 10:07, 16 September 2021
• intel/core i3/i3-330e
  '''Core i3-330E''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (546 words) - 16:17, 13 December 2017
• intel/pentium (2009)/p6000
  '''Pentium P6000''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (533 words) - 16:25, 13 December 2017
• intel/pentium (2009)/p6100
  '''Pentium P6100''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (533 words) - 23:15, 12 November 2020
• intel/pentium (2009)/p6200
  '''Pentium P6200''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (533 words) - 16:25, 13 December 2017
• intel/pentium (2009)/p6300
  '''Pentium P6300''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (533 words) - 16:25, 13 December 2017
• intel/pentium (2009)/u5400
  '''Pentium U5400''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (527 words) - 16:25, 13 December 2017
• intel/pentium (2009)/u5600
  '''Pentium U5600''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (527 words) - 16:25, 13 December 2017
• intel/celeron/p4500
  '''Celeron P4500''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (530 words) - 16:16, 13 December 2017
• intel/celeron/p4505
  '''Celeron P4505''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (532 words) - 16:16, 13 December 2017
• intel/celeron/p4600
  '''Celeron P4600''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (528 words) - 16:16, 13 December 2017
• intel/celeron/u3400
  '''Celeron U3400''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (527 words) - 16:16, 13 December 2017
• intel/celeron/u3405
  '''Celeron U3405''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (532 words) - 16:16, 13 December 2017
• intel/celeron/u3600
  '''Celeron U3600''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency
  4 KB (527 words) - 16:16, 13 December 2017
• intel/core i7/i7-620ue
  '''Core i7-620UE''' is a {{arch|64}} [[dual-core]] [[x86-64]] embedded microprocessor designed by [[Intel]] and introduced in early [[2010]]. This chip is a firs
  5 KB (570 words) - 16:22, 13 December 2017
• intel/core i5/i5-520e
  '''Core i5-520E''' is a {{arch|64}} [[x86]] [[dual-core]] embedded microprocessor introduced by [[Intel]] in [[2010]]. This processor, which is based on the
  4 KB (559 words) - 16:19, 13 December 2017
• intel/core i7/i7-620le
  '''Core i7-620LE''' is a {{arch|64}} [[dual-core]] [[x86-64]] embedded microprocessor designed by [[Intel]] and introduced in early [[2010]]. This chip is a firs
  5 KB (570 words) - 16:22, 13 December 2017
• arm holdings/microarchitectures/cortex-a53
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:all microprocessor models]] [[microarchitecture::Cortex-A53]]
  6 KB (758 words) - 13:01, 6 March 2022
• cavium/microarchitectures/cnmips
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by cavium]][[microarchitecture::cnMIPS]]
  7 KB (870 words) - 19:38, 23 June 2017
• 2017
  * July 17: [[IBM]] introduces the {{ibm|z14}} microprocessor * September 18: [[Oracle]] introduces the {{oracle|SPARC M8}} microprocessor.
  8 KB (999 words) - 11:04, 3 January 2019
• cavium/octeon
  If a microprocessor is missing from the list, an appropriate article for it needs to be ...tegory:microprocessor models by cavium]][[microprocessor family::OCTEON]][[microprocessor series::CN3000]]
  11 KB (1,489 words) - 09:25, 30 December 2020
• cavium/octeon/cn3005-300bg350-scp
  ...00 SCP''' is a {{arch|64}} [[single-core]] [[MIPS]] secure communication [[microprocessor]] (SCP) designed by [[Cavium]] and introduced in early [[2006]]. This proce
  4 KB (438 words) - 16:10, 13 December 2017
• cavium/octeon/cn3005-400bg350-scp
  ...00 SCP''' is a {{arch|64}} [[single-core]] [[MIPS]] secure communication [[microprocessor]] (SCP) designed by [[Cavium]] and introduced in early [[2006]]. This proce
  4 KB (438 words) - 16:10, 13 December 2017
• cavium/octeon/cn3005-500bg350-scp
  ...00 SCP''' is a {{arch|64}} [[single-core]] [[MIPS]] secure communication [[microprocessor]] (SCP) designed by [[Cavium]] and introduced in early [[2006]]. This proce
  4 KB (438 words) - 16:10, 13 December 2017
• cavium/octeon/cn3005-300bg350-cp
  ...CN3005-300 CP''' is a {{arch|64}} [[single-core]] [[MIPS]] communication [[microprocessor]] (CP) designed by [[Cavium]] and introduced in [[2006]]. This processor, w
  4 KB (422 words) - 16:10, 13 December 2017
• cavium/octeon/cn3005-400bg350-cp
  ...CN3005-400 CP''' is a {{arch|64}} [[single-core]] [[MIPS]] communication [[microprocessor]] (CP) designed by [[Cavium]] and introduced in [[2006]]. This processor, w
  4 KB (422 words) - 16:10, 13 December 2017
• cavium/octeon/cn3005-500bg350-cp
  ...CN3005-500 CP''' is a {{arch|64}} [[single-core]] [[MIPS]] communication [[microprocessor]] (CP) designed by [[Cavium]] and introduced in [[2006]]. This processor, w
  4 KB (422 words) - 16:10, 13 December 2017
• cavium/octeon/cn3010-300bg525-scp
  ...00 SCP''' is a {{arch|64}} [[single-core]] [[MIPS]] secure communication [[microprocessor]] (SCP) designed by [[Cavium]] and introduced in early [[2006]]. This proce
  4 KB (465 words) - 16:10, 13 December 2017
• cavium/octeon/cn3010-400bg525-scp
  ...00 SCP''' is a {{arch|64}} [[single-core]] [[MIPS]] secure communication [[microprocessor]] (SCP) designed by [[Cavium]] and introduced in early [[2006]]. This proce
  4 KB (465 words) - 16:10, 13 December 2017
• cavium/octeon/cn3010-500bg525-scp
  ...00 SCP''' is a {{arch|64}} [[single-core]] [[MIPS]] secure communication [[microprocessor]] (SCP) designed by [[Cavium]] and introduced in early [[2006]]. This proce
  4 KB (465 words) - 16:10, 13 December 2017
• cavium/octeon/cn3010-300bg525-cp
  ...CN3010-300 CP''' is a {{arch|64}} [[single-core]] [[MIPS]] communication [[microprocessor]] (CP) designed by [[Cavium]] and introduced in [[2006]]. This processor, w
  4 KB (449 words) - 16:10, 13 December 2017
• cavium/octeon/cn3010-400bg525-cp
  ...CN3010-400 CP''' is a {{arch|64}} [[single-core]] [[MIPS]] communication [[microprocessor]] (CP) designed by [[Cavium]] and introduced in [[2006]]. This processor, w
  4 KB (449 words) - 16:10, 13 December 2017
• cavium/octeon/cn3010-500bg525-cp
  ...CN3010-500 CP''' is a {{arch|64}} [[single-core]] [[MIPS]] communication [[microprocessor]] (CP) designed by [[Cavium]] and introduced in [[2006]]. This processor, w
  4 KB (449 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-300bg868-nsp
  ...110-300 NSP''' is a {{arch|64}} [[single-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (474 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-400bg868-nsp
  ...110-400 NSP''' is a {{arch|64}} [[single-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (471 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-500bg868-nsp
  ...110-500 NSP''' is a {{arch|64}} [[single-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (471 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-550bg868-nsp
  ...110-550 NSP''' is a {{arch|64}} [[single-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (474 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-300bg868-exp
  ...N3110-300 EXP''' is a {{arch|64}} [[single-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2006]]. This processor, which
  4 KB (453 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-400bg868-exp
  ...N3110-400 EXP''' is a {{arch|64}} [[single-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2006]]. This processor, which
  4 KB (450 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-500bg868-exp
  ...N3110-500 EXP''' is a {{arch|64}} [[single-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2006]]. This processor, which
  4 KB (450 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-550bg868-exp
  ...N3110-550 EXP''' is a {{arch|64}} [[single-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2006]]. This processor, which
  4 KB (453 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-300bg868-scp
  ...00 SCP''' is a {{arch|64}} [[single-core]] [[MIPS]] secure communication [[microprocessor]] (SCP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (463 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-400bg868-scp
  ...00 SCP''' is a {{arch|64}} [[single-core]] [[MIPS]] secure communication [[microprocessor]] (SCP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (460 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-500bg868-scp
  ...00 SCP''' is a {{arch|64}} [[single-core]] [[MIPS]] secure communication [[microprocessor]] (SCP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (460 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-550bg868-scp
  ...50 SCP''' is a {{arch|64}} [[single-core]] [[MIPS]] secure communication [[microprocessor]] (SCP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (463 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-300bg868-cp
  ...N3110-300 SCP''' is a {{arch|64}} [[single-core]] [[MIPS]] communication [[microprocessor]] (CP) designed by [[Cavium]] and introduced in [[2006]]. This processor, w
  4 KB (447 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-400bg868-cp
  ...N3110-400 SCP''' is a {{arch|64}} [[single-core]] [[MIPS]] communication [[microprocessor]] (CP) designed by [[Cavium]] and introduced in [[2006]]. This processor, w
  4 KB (444 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-500bg868-cp
  ...N3110-500 SCP''' is a {{arch|64}} [[single-core]] [[MIPS]] communication [[microprocessor]] (CP) designed by [[Cavium]] and introduced in [[2006]]. This processor, w
  4 KB (443 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-550bg868-cp
  ...N3110-550 SCP''' is a {{arch|64}} [[single-core]] [[MIPS]] communication [[microprocessor]] (CP) designed by [[Cavium]] and introduced in [[2006]]. This processor, w
  4 KB (447 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-300bg868-nsp
  ...N3120-300 NSP''' is a {{arch|64}} [[dual-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (474 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-400bg868-nsp
  ...N3120-400 NSP''' is a {{arch|64}} [[dual-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (471 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-500bg868-nsp
  ...N3120-500 NSP''' is a {{arch|64}} [[dual-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (471 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-550bg868-nsp
  ...N3120-550 NSP''' is a {{arch|64}} [[dual-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (474 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-300bg868-exp
  ...'CN3120-300 EXP''' is a {{arch|64}} [[dual-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2006]]. This processor, which
  4 KB (453 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-400bg868-exp
  ...'CN3120-400 EXP''' is a {{arch|64}} [[dual-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2006]]. This processor, which
  4 KB (450 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-500bg868-exp
  ...'CN3120-500 EXP''' is a {{arch|64}} [[dual-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2006]]. This processor, which
  4 KB (450 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-550bg868-exp
  ...'CN3120-550 EXP''' is a {{arch|64}} [[dual-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2006]]. This processor, which
  4 KB (453 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-300bg868-scp
  ...-300 SCP''' is a {{arch|64}} [[dual-core]] [[MIPS]] secure communication [[microprocessor]] (SCP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (463 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-400bg868-scp
  ...-400 SCP''' is a {{arch|64}} [[dual-core]] [[MIPS]] secure communication [[microprocessor]] (SCP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (460 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-500bg868-scp
  ...-500 SCP''' is a {{arch|64}} [[dual-core]] [[MIPS]] secure communication [[microprocessor]] (SCP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (460 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-550bg868-scp
  ...-550 SCP''' is a {{arch|64}} [[dual-core]] [[MIPS]] secure communication [[microprocessor]] (SCP) designed by [[Cavium]] and introduced in [[2006]]. This processor,
  4 KB (463 words) - 00:15, 14 March 2021
• cavium/octeon/cn3120-300bg868-cp
  ...'CN3120-300 SCP''' is a {{arch|64}} [[dual-core]] [[MIPS]] communication [[microprocessor]] (CP) designed by [[Cavium]] and introduced in [[2006]]. This processor, w
  4 KB (447 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-400bg868-cp
  ...'CN3120-400 SCP''' is a {{arch|64}} [[dual-core]] [[MIPS]] communication [[microprocessor]] (CP) designed by [[Cavium]] and introduced in [[2006]]. This processor, w
  4 KB (444 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-500bg868-cp
  ...'CN3120-500 SCP''' is a {{arch|64}} [[dual-core]] [[MIPS]] communication [[microprocessor]] (CP) designed by [[Cavium]] and introduced in [[2006]]. This processor, w
  4 KB (444 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-550bg868-cp
  ...'CN3120-550 SCP''' is a {{arch|64}} [[dual-core]] [[MIPS]] communication [[microprocessor]] (CP) designed by [[Cavium]] and introduced in [[2006]]. This processor, w
  4 KB (447 words) - 16:11, 13 December 2017
• cavium/octeon/cn3630-400bg1521-nsp
  ...N3630-400 NSP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (435 words) - 16:11, 13 December 2017
• cavium/octeon/cn3630-500bg1521-nsp
  ...N3630-500 NSP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (432 words) - 16:11, 13 December 2017
• cavium/octeon/cn3630-600bg1521-nsp
  ...N3630-600 NSP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (432 words) - 16:11, 13 December 2017
• cavium/octeon/cn3630-400bg1521-exp
  ...'CN3630-400 EXP''' is a {{arch|64}} [[quad-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (415 words) - 16:11, 13 December 2017
• cavium/octeon/cn3630-600bg1521-exp
  ...'CN3630-600 EXP''' is a {{arch|64}} [[quad-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (412 words) - 16:11, 13 December 2017
• cavium/octeon/cn3630-400bg1521-scp
  ...''' is a {{arch|64}} [[quad-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (426 words) - 16:11, 13 December 2017
• cavium/octeon/cn3630-500bg1521-exp
  ...'CN3630-500 EXP''' is a {{arch|64}} [[quad-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (412 words) - 16:11, 13 December 2017
• cavium/octeon/cn3630-500bg1521-scp
  ...''' is a {{arch|64}} [[quad-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (423 words) - 16:11, 13 December 2017
• cavium/octeon/cn3630-600bg1521-scp
  ...''' is a {{arch|64}} [[quad-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (423 words) - 16:11, 13 December 2017
• cavium/octeon/cn3830-400bg1521-nsp
  ...N3830-400 NSP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (432 words) - 16:11, 13 December 2017
• cavium/octeon/cn3830-500bg1521-nsp
  ...N3830-500 NSP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (432 words) - 16:11, 13 December 2017
• cavium/octeon/cn3830-600bg1521-nsp
  ...N3830-600 NSP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (432 words) - 16:11, 13 December 2017
• cavium/octeon/cn3830-400bg1521-exp
  ...'CN3830-400 EXP''' is a {{arch|64}} [[quad-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (412 words) - 16:11, 13 December 2017
• cavium/octeon/cn3830-500bg1521-exp
  ...'CN3830-500 EXP''' is a {{arch|64}} [[quad-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (412 words) - 16:11, 13 December 2017
• cavium/octeon/cn3830-600bg1521-exp
  ...'CN3830-600 EXP''' is a {{arch|64}} [[quad-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (412 words) - 16:11, 13 December 2017
• cavium/octeon/cn3830-400bg1521-scp
  ...''' is a {{arch|64}} [[quad-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (423 words) - 16:11, 13 December 2017
• cavium/octeon/cn3830-500bg1521-scp
  ...''' is a {{arch|64}} [[quad-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (423 words) - 16:11, 13 December 2017
• cavium/octeon/cn3830-600bg1521-scp
  ...''' is a {{arch|64}} [[quad-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (423 words) - 16:11, 13 December 2017
• cavium/octeon/cn3840-400bg1521-nsp
  ...N3840-400 NSP''' is a {{arch|64}} [[octa-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (432 words) - 16:11, 13 December 2017
• cavium/octeon/cn3840-500bg1521-nsp
  ...N3840-500 NSP''' is a {{arch|64}} [[octa-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (432 words) - 16:11, 13 December 2017
• cavium/octeon/cn3840-600bg1521-nsp
  ...N3840-600 NSP''' is a {{arch|64}} [[octa-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (432 words) - 16:11, 13 December 2017
• cavium/octeon/cn3840-400bg1521-exp
  ...'CN3840-400 EXP''' is a {{arch|64}} [[octa-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (412 words) - 16:11, 13 December 2017
• cavium/octeon/cn3840-500bg1521-exp
  ...'CN3840-500 EXP''' is a {{arch|64}} [[octa-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (412 words) - 16:11, 13 December 2017
• cavium/octeon/cn3840-600bg1521-exp
  ...'CN3840-600 EXP''' is a {{arch|64}} [[octa-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (412 words) - 16:11, 13 December 2017
• cavium/octeon/cn3840-400bg1521-scp
  ...''' is a {{arch|64}} [[octa-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (423 words) - 16:11, 13 December 2017
• cavium/octeon/cn3840-500bg1521-scp
  ...''' is a {{arch|64}} [[octa-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (423 words) - 16:11, 13 December 2017
• cavium/octeon/cn3840-600bg1521-scp
  ...''' is a {{arch|64}} [[octa-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (423 words) - 16:11, 13 December 2017
• cavium/octeon/cn3850-400bg1521-nsp
  ...850-400 NSP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (432 words) - 16:11, 13 December 2017
• cavium/octeon/cn3850-500bg1521-nsp
  ...850-500 NSP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (432 words) - 16:11, 13 December 2017
• cavium/octeon/cn3850-600bg1521-nsp
  ...850-600 NSP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (432 words) - 16:11, 13 December 2017
• cavium/octeon/cn3850-400bg1521-exp
  ...N3850-400 EXP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (412 words) - 16:11, 13 December 2017
• cavium/octeon/cn3850-500bg1521-exp
  ...N3850-500 EXP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (412 words) - 16:11, 13 December 2017
• cavium/octeon/cn3850-600bg1521-exp
  ...N3850-600 EXP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (412 words) - 16:11, 13 December 2017
• cavium/octeon/cn3850-400bg1521-scp
  ...' is a {{arch|64}} [[dodeca-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (423 words) - 16:11, 13 December 2017
• cavium/octeon/cn3850-500bg1521-scp
  ...' is a {{arch|64}} [[dodeca-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (423 words) - 16:11, 13 December 2017
• cavium/octeon/cn3850-600bg1521-scp
  ...' is a {{arch|64}} [[dodeca-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (423 words) - 16:11, 13 December 2017
• cavium/octeon/cn3860-400bg1521-nsp
  ...0-400 NSP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (432 words) - 16:11, 13 December 2017
• cavium/octeon/cn3860-500bg1521-nsp
  ...0-500 NSP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (432 words) - 16:11, 13 December 2017
• cavium/octeon/cn3860-600bg1521-nsp
  ...0-600 NSP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (432 words) - 16:12, 13 December 2017
• cavium/octeon/cn3860-400bg1521-exp
  ...860-400 EXP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (412 words) - 16:11, 13 December 2017
• cavium/octeon/cn3860-500bg1521-exp
  ...860-500 EXP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (412 words) - 16:11, 13 December 2017
• cavium/octeon/cn3860-600bg1521-exp
  ...860-600 EXP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] communication [[microprocessor]] designed by [[Cavium]] and introduced in [[2005]]. This processor, which
  4 KB (412 words) - 16:11, 13 December 2017
• cavium/octeon/cn3860-400bg1521-scp
  ...is a {{arch|64}} [[hexadeca-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (423 words) - 16:11, 13 December 2017
• cavium/octeon/cn3860-500bg1521-scp
  ...is a {{arch|64}} [[hexadeca-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (423 words) - 16:11, 13 December 2017
• cavium/octeon/cn3860-600bg1521-scp
  ...is a {{arch|64}} [[hexadeca-core]] [[MIPS]] secure network communication [[microprocessor]] (SNP) designed by [[Cavium]] and introduced in [[2005]]. This processor,
  4 KB (423 words) - 16:12, 13 December 2017
• cavium/octeon plus
  If a microprocessor is missing from the list, an appropriate article for it needs to be ...y:microprocessor models by cavium]][[microprocessor family::OCTEON Plus]][[microprocessor series::CN57xx]]
  6 KB (827 words) - 15:41, 29 December 2016
• cavium/octeon plus/cn5860-600bg1521-exp
  '''CN5860-600 EXP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:13, 13 December 2017
• cavium/octeon plus/cn5830-600bg1521-nsp
  '''CN5830-600 NSP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5830-800bg1521-nsp
  '''CN5830-800 NSP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5830-900bg1521-nsp
  '''CN5830-900 NSP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5830-1000bg1521-nsp
  '''CN5830-1000 NSP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5830-600bg1521-exp
  '''CN5830-600 EXP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5830-800bg1521-exp
  '''CN5830-800 EXP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5830-900bg1521-exp
  '''CN5830-900 EXP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5830-600bg1521-scp
  ...30-600 SCP''' is a {{arch|64}} [[quad-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5830-1000bg1521-exp
  '''CN5830-1000 EXP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5830-800bg1521-scp
  ...30-800 SCP''' is a {{arch|64}} [[quad-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5830-900bg1521-scp
  ...30-900 SCP''' is a {{arch|64}} [[quad-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5830-1000bg1521-scp
  ...30-100 SCP''' is a {{arch|64}} [[quad-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5840-600bg1521-nsp
  '''CN5840-600 NSP''' is a {{arch|64}} [[octa-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5840-800bg1521-nsp
  '''CN5840-800 NSP''' is a {{arch|64}} [[octa-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5840-900bg1521-nsp
  '''CN5840-900 NSP''' is a {{arch|64}} [[octa-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5840-600bg1521-exp
  '''CN5840-600 EXP''' is a {{arch|64}} [[octa-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5840-800bg1521-exp
  '''CN5840-800 EXP''' is a {{arch|64}} [[octa-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5840-900bg1521-exp
  '''CN5840-900 EXP''' is a {{arch|64}} [[octa-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5840-1000bg1521-exp
  '''CN5840-1000 EXP''' is a {{arch|64}} [[octa-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5840-600bg1521-scp
  ...40-600 SCP''' is a {{arch|64}} [[octa-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5840-900bg1521-scp
  ...40-900 SCP''' is a {{arch|64}} [[octa-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5840-1000bg1521-nsp
  '''CN5840-1000 NSP''' is a {{arch|64}} [[octa-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5840-1000bg1521-scp
  ...0-1000 SCP''' is a {{arch|64}} [[octa-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5850-600bg1521-nsp
  ...N5850-600 NSP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5850-800bg1521-nsp
  ...N5850-800 NSP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5840-800bg1521-scp
  ...40-800 SCP''' is a {{arch|64}} [[octa-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5850-900bg1521-nsp
  ...N5850-900 NSP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5850-1000bg1521-nsp
  ...5850-1000 NSP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5850-1000bg1521-exp
  '''CN5850-1000 EXP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5850-600bg1521-exp
  '''CN5850-600 EXP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5850-800bg1521-scp
  ...-800 SCP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5850-800bg1521-exp
  '''CN5850-800 EXP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5850-900bg1521-exp
  '''CN5850-900 EXP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5850-600bg1521-scp
  ...-600 SCP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5850-900bg1521-scp
  ...-900 SCP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:13, 13 December 2017
• cavium/octeon plus/cn5850-1000bg1521-scp
  ...1000 SCP''' is a {{arch|64}} [[dodeca-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:12, 13 December 2017
• cavium/octeon plus/cn5860-600bg1521-nsp
  ...860-600 NSP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:13, 13 December 2017
• cavium/octeon plus/cn5860-800bg1521-nsp
  ...860-800 NSP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:13, 13 December 2017
• cavium/octeon plus/cn5860-900bg1521-nsp
  ...860-900 NSP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:13, 13 December 2017
• cavium/octeon plus/cn5860-1000bg1521-nsp
  ...60-1000 NSP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] network service microprocessor (NSP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (419 words) - 16:13, 13 December 2017
• cavium/octeon plus/cn5860-800bg1521-exp
  '''CN5860-800 EXP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:13, 13 December 2017
• cavium/octeon plus/cn5860-900bg1521-exp
  '''CN5860-900 EXP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:13, 13 December 2017
• cavium/octeon plus/cn5860-1000bg1521-exp
  '''CN5860-1000 EXP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] network microprocessor designed by [[Cavium]] and introduced in [[2007]]. This processor, which in
  4 KB (396 words) - 16:13, 13 December 2017
• cavium/octeon plus/cn5860-600bg1521-scp
  ...00 SCP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:13, 13 December 2017
• cavium/octeon plus/cn5860-800bg1521-scp
  ...00 SCP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:13, 13 December 2017
• cavium/octeon plus/cn5860-900bg1521-scp
  ...00 SCP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:13, 13 December 2017
• cavium/octeon plus/cn5860-1000bg1521-scp
  ...00 SCP''' is a {{arch|64}} [[hexadeca-core]] [[MIPS]] secure communication microprocessor (SCP) designed by [[Cavium]] and introduced in [[2007]]. This processor, wh
  4 KB (410 words) - 16:13, 13 December 2017
• amd/packages/socket am4
  AM4 socket support for a particular microprocessor depends on the chipset compatibility. If a microprocessor is missing from the list, an appropriate article for it needs to be
  30 KB (6,098 words) - 01:58, 12 January 2024
• intel/core i3/i3-7101e
  ...ore i3-7101E''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] microprocessor introduced by [[Intel]] in early [[2017]] for the desktop and embedded mark
  4 KB (647 words) - 16:18, 13 December 2017
• intel/core i3/i3-7101te
  ...re i3-7101TE''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] microprocessor introduced by [[Intel]] in early [[2017]] for the desktop and embedded mark
  4 KB (646 words) - 07:22, 13 December 2018
• intel/core i3/i3-7300t
  ...300T''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  5 KB (687 words) - 16:18, 13 December 2017
• intel/core i3/i3-7102e
  ...02E''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] embedded microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (604 words) - 13:42, 8 April 2018
• intel/core i3/i3-7100e
  ...7100E''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (604 words) - 13:42, 8 April 2018
• intel/core i3/i3-7167u
  ...7167U''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (636 words) - 16:18, 13 December 2017
• intel/core i3/i3-7100h
  ...7100H''' is a {{arch|64}} [[dual-core]] low-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (595 words) - 13:42, 8 April 2018
• intel/pentium (2009)/g4600t
  '''Pentium G4600T''' is a {{arch|64}} [[dual-core]] budget [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. The G4600T, which is based on th
  4 KB (642 words) - 16:25, 13 December 2017
• intel/pentium (2009)/g4560t
  '''Pentium G4560T''' is a {{arch|64}} [[dual-core]] budget [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. The G4560T, which is based on th
  4 KB (642 words) - 16:25, 13 December 2017
• intel/pentium gold/4415u
  '''Pentium Gold 4415U''' is a {{arch|64}} [[dual-core]] budget [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. The 4415U, which is based on the
  4 KB (612 words) - 08:31, 29 September 2019
• intel/pentium gold/4410y
  '''Pentium Gold 4410Y''' is a {{arch|64}} [[dual-core]] budget [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. The 4410Y, which is based on the
  4 KB (626 words) - 18:04, 28 August 2018
• intel/core i5/i5-7y57
  ...Y57''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (649 words) - 18:04, 28 August 2018
• intel/core i5/i5-7287u
  ...87U''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (640 words) - 16:20, 13 December 2017
• intel/core i5/i5-7267u
  ...67U''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (641 words) - 14:22, 16 March 2018
• intel/core i5/i5-7260u
  ...60U''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (640 words) - 16:20, 13 December 2017
• intel/core i5/i5-7360u
  ...60U''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (640 words) - 07:01, 20 March 2019
• intel/core i5/i5-7300u
  ...00U''' is a {{arch|64}} [[dual-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (642 words) - 13:35, 4 July 2022
• intel/core i5/i5-7300hq
  ...0HQ''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (636 words) - 00:28, 11 July 2019
• intel/core i5/i5-7440hq
  ...0HQ''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (619 words) - 13:42, 8 April 2018
• intel/core i5/i5-7442eq
  ...Q''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] embedded microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (629 words) - 13:42, 8 April 2018
• intel/core i5/i5-7440eq
  ...Q''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] embedded microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the
  4 KB (640 words) - 13:42, 8 April 2018
• intel/core i7/i7-7560u
  ...560U''' is a {{arch|64}} [[dual-core]] high-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This processor, which is based o
  4 KB (647 words) - 16:23, 13 December 2017
• intel/core i7/i7-7567u
  ...567U''' is a {{arch|64}} [[dual-core]] high-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This processor, which is based o
  4 KB (647 words) - 16:23, 13 December 2017
• intel/core i7/i7-7600u
  ...600U''' is a {{arch|64}} [[dual-core]] high-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This processor, which is based o
  4 KB (654 words) - 17:06, 22 December 2017
• intel/core i7/i7-7660u
  ...660U''' is a {{arch|64}} [[dual-core]] high-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This processor, which is based o
  4 KB (647 words) - 23:30, 3 October 2018
• intel/core i7/i7-7820hq
  ...20HQ''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This processor, which is based o
  4 KB (626 words) - 13:42, 8 April 2018
• intel/core i7/i7-7700hq
  ...00HQ''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This processor, which is based o
  4 KB (662 words) - 09:53, 14 May 2021
• intel/core i7/i7-7820hk
  ...20HK''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This processor, which is based o
  4 KB (626 words) - 13:42, 8 April 2018
• intel/core i7/i7-7920hq
  ...20HQ''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This processor, which is based o
  4 KB (626 words) - 13:42, 8 April 2018
• intel/core i7/i7-7820eq
  ...20EQ''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2017]]. This processor, which is based o
  4 KB (636 words) - 13:42, 8 April 2018
• intel/xeon e3/e3-1505l v6
  ...arch|64}} [[quad-core]] entry-level workstations and dense servers [[x86]] microprocessor introduced by [[Intel]] in [[2017]]. This processor, which is based on the
  4 KB (634 words) - 13:42, 8 April 2018
• intel/xeon e3/e3-1535m v6
  ...arch|64}} [[quad-core]] entry-level workstations and dense servers [[x86]] microprocessor introduced by [[Intel]] in [[2017]]. This processor, which is based on the
  4 KB (636 words) - 13:42, 8 April 2018
• intel/xeon e3/e3-1505m v6
  ...arch|64}} [[quad-core]] entry-level workstations and dense servers [[x86]] microprocessor introduced by [[Intel]] in [[2017]]. This processor, which is based on the
  4 KB (645 words) - 13:42, 8 April 2018
• intel/cores/kaby lake y
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake Y]]
  4 KB (594 words) - 06:30, 6 April 2019
• intel/cores/kaby lake s
  ...el|Skylake S|l=core}}) {{intel|Sunrise Point}} via a firmware upgrade. The microprocessor is connected to the chipset via 4 of the chip's 20 PCIe lanes using Intel's If a microprocessor is missing from the list, an appropriate article for it needs to be
  5 KB (687 words) - 03:02, 11 October 2017
• intel/cores/kaby lake u
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake U]]
  6 KB (820 words) - 14:10, 29 February 2020
• intel/cores/kaby lake h
  ...el|Skylake H|l=core}}) {{intel|Sunrise Point}} via a firmware upgrade. The microprocessor is connected to the chipset via 4 of the chip's 20 PCIe lanes using Intel's If a microprocessor is missing from the list, an appropriate article for it needs to be
  5 KB (699 words) - 13:43, 8 April 2018
• intel/hd graphics 610
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[integrated gpu::HD Graphics 610]]
  5 KB (618 words) - 09:27, 27 May 2018
• intel/hd graphics 615
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[integrated gpu::HD Graphics 615]]
  5 KB (581 words) - 23:45, 22 September 2019
• intel/hd graphics 630
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[integrated gpu::HD Graphics 630]]
  5 KB (615 words) - 01:11, 7 January 2018
• intel/hd graphics p630
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[integrated gpu::HD Graphics P630]]
  4 KB (520 words) - 11:52, 6 May 2017
• intel/iris plus graphics 640
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[integrated gpu::Iris Plus Graphics 640]]
  5 KB (586 words) - 11:52, 6 May 2017
• intel/iris plus graphics 650
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[integrated gpu::Iris Plus Graphics 650]]
  5 KB (558 words) - 11:52, 6 May 2017
• intel/cores/kaby lake x
  ...'KBL-X''') is the name of the core for [[Intel]]'s high-end desktop (HEDT) microprocessor line based on the {{intel|Kaby Lake|l=arch}} microarchitecture serving as a Kaby Lake X based processors are a 2-chip solution - the [[microprocessor]] and the [[chipset]]. Kaby Lake X are {{intel|Socket R4}} and use the {{in
  3 KB (443 words) - 10:07, 24 October 2018
• ibm/microarchitectures/power9
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by ibm]] [[instance of::microprocessor]] [[microarchitecture::POWER9]]
  14 KB (1,905 words) - 23:38, 22 May 2020
• qualcomm/microarchitectures/falkor
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by qualcomm]] [[microarchitecture::Falkor]]
  6 KB (822 words) - 13:01, 19 May 2021
• intel/core i5/i5-7640x
  ...0X''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] desktop microprocessor introduced by [[Intel]] in mid-[[2017]]. This chip, which is based on the {
  3 KB (517 words) - 10:12, 24 October 2018
• intel/core i7/i7-7740x
  ...40X''' is a {{arch|64}} [[quad-core]] high-end performance [[x86]] desktop microprocessor introduced by [[Intel]] in [[2017]]. This processor, which is based on the
  3 KB (516 words) - 10:12, 24 October 2018
• phytium/microarchitectures/xiaomi
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by phytium]] [[microarchitecture::Xiaomi]]
  7 KB (940 words) - 00:12, 8 March 2021
• acorn/microarchitectures/arm1
  The '''ARM1''' (Acorn [[RISC]] Machine 1) is Acorn Computers' first microprocessor design. The ARM1 was the initial result of the ''Advanced Research and Deve The ARM1 is an extremely simple 32-bit single-chip [[RISC]] microprocessor implementation with a number of [[CISC]] features.
  12 KB (1,886 words) - 12:56, 14 January 2021
• amd/ryzen 7
  If a microprocessor is missing from the list, an appropriate article for it needs to be ...[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microprocessor family::Ryzen 7]] [[microarchitecture::Zen]][[market segment::Desktop]]
  15 KB (2,095 words) - 12:18, 2 October 2022
• amd/ryzen 7/1700
  ...700''' is a {{arch|64}} [[octa-core]] high-end performance [[x86]] desktop microprocessor introduced by [[AMD]] in early [[2017]]. This processor is based on AMD's {
  4 KB (677 words) - 17:58, 10 May 2023
• amd/ryzen 7/1700x
  ...00X''' is a {{arch|64}} [[octa-core]] high-end performance [[x86]] desktop microprocessor introduced by [[AMD]] in early [[2017]]. This processor is based on AMD's {
  4 KB (579 words) - 23:32, 25 March 2023
• samsung/exynos
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by samsung]] [[series::Exynos 3]]
  10 KB (1,247 words) - 00:25, 8 November 2023
• amd/ryzen 5
  If a microprocessor is missing from the list, an appropriate article for it needs to be ...[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microprocessor family::Ryzen 5]] [[microarchitecture::Zen]] [[market segment::Desktop]]
  14 KB (1,864 words) - 07:09, 7 October 2020
• amd/ryzen 3
  If a microprocessor is missing from the list, an appropriate article for it needs to be ...[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microprocessor family::Ryzen 3]] [[microarchitecture::Zen]] [[market segment::Desktop]]
  11 KB (1,506 words) - 22:12, 6 January 2020
• amd/ryzen 5/1600x
  ...0X''' is a {{arch|64}} [[hexa-core]] mid-range performance [[x86]] desktop microprocessor introduced by [[AMD]] in March of [[2017]]. This processor is based on AMD'
  4 KB (547 words) - 23:32, 25 March 2023
• amd/ryzen 5/1500x
  ...0X''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] desktop microprocessor introduced by [[AMD]] in March of [[2017]]. This processor is based on AMD'
  3 KB (540 words) - 23:32, 25 March 2023
• amd/epyc/7f32
  '''EPYC 7F32''' is a {{arch|64}} [[octa-core]] [[x86]] server microprocessor designed and introduced by [[AMD]] in mid-[[2020]]. This [[multi-chip packa
  3 KB (563 words) - 11:06, 15 April 2020
• amd/microarchitectures/zen 3
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[microarchitecture::Zen 3]] [[max cpu count::1]]
  15 KB (1,978 words) - 22:13, 6 April 2023
• amd/cores/summit ridge
  ...R''') is codename for [[AMD]]'s mainstream through high-end desktop (HEDT) microprocessor line based on the {{amd|Zen|l=arch}} microarchitecture. Summit Ridge proces If a microprocessor is missing from the list, an appropriate article for it needs to be
  3 KB (420 words) - 13:36, 17 March 2023
• amd/cores/pinnacle ridge
  ...ge''' is codename for [[AMD]]'s mainstream through high-end desktop (HEDT) microprocessor line based on the {{amd|Zen+|l=arch}} microarchitecture serving as a succes If a microprocessor is missing from the list, an appropriate article for it needs to be
  3 KB (457 words) - 13:38, 17 March 2023
• amd/cores/naples
  If a microprocessor is missing from the list, an appropriate article for it needs to be {{#ask: [[Category:microprocessor models by amd]] [[core name::Naples]]
  3 KB (450 words) - 13:49, 18 November 2018
• loongson/godson 2
  ...{\|2B}} which was introduced in 2003, became [[China]]'s first {{arch|64}} microprocessor. This model was fabricated using 6-metal [[0.18 µm process]] using [[CMOS] If a microprocessor is missing from the list, an appropriate article for it needs to be
  6 KB (710 words) - 17:11, 11 April 2017
• amd/ryzen 5/1600
  ...00''' is a {{arch|64}} [[hexa-core]] mid-range performance [[x86]] desktop microprocessor introduced by [[AMD]] in early [[2017]]. This processor is based on AMD's {
  4 KB (692 words) - 23:32, 25 March 2023
• amd/ryzen 5/1400
  ...00''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] desktop microprocessor introduced by [[AMD]] in march of [[2017]]. This processor is based on AMD'
  3 KB (528 words) - 23:32, 25 March 2023
• loongson/godson 2/2g
  * Zhao, Ji-Ye, et al. "Physical Design Methodology for Godson-2G Microprocessor." Journal of Computer Science and Technology 25.2 (2010): 225-231.
  4 KB (455 words) - 16:31, 13 December 2017

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