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CN3005-300 CP - Cavium
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Cavium CN3005-300 CP
cn3005-15.png
General Info
DesignerCavium
ManufacturerTSMC
Model NumberCN3005-300 CP
Part NumberCN3005-300BG350-CP
MarketEmbedded
IntroductionJanuary 30, 2006 (announced)
May 1, 2006 (launched)
Release Price$19
General Specs
FamilyOCTEON
SeriesCN3000
Frequency300 MHz
Microarchitecture
ISAMIPS64 (MIPS)
MicroarchitecturecnMIPS
Core NamecnMIPS
Process130 nm
TechnologyCMOS
Word Size64 bit
Cores1
Threads1
Max Memory2 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power dissipation2 W

The CN3005-300 CP is a 64-bit single-core MIPS communication microprocessor (CP) designed by Cavium and introduced in 2006. This processor, which incorporates a single cnMIPS core, operates at 300 MHz and dissipates 2 Watts. This processors includes a number of hardware communication accelerators including units for high-performance packet I/O processing, QoS, and TCP acceleration. This MPU supports up to 2 GiB of DDR2-533 memory.

Cache[edit]

Main article: cnMIPS § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$24 KiB
0.0234 MiB
24,576 B
2.288818e-5 GiB
L1I$16 KiB
0.0156 MiB
16,384 B
1.525879e-5 GiB
1x16 KiB2-way set associative 
L1D$8 KiB
0.00781 MiB
8,192 B
7.629395e-6 GiB
1x8 KiB64-way set associativeWrite-through

L2$64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
  1x64 KiB2-way set associative 

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR2-533
Supports ECCNo
Max Mem2 GiB
Controllers1
Channels1
Width16 bit
Max Bandwidth1,017 MiB/s
0.993 GiB/s
1.728 GB/s
9.69924e-4 TiB/s
0.00107 TB/s
Bandwidth
Single 1,017 MiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCI
Width32 bit
Clock66.66 MHz
Rate254.31 MiB/s
Featureshost or slave
USB
Revision2.0
Ports1
Rate60 MB/s
Featureshost / PHY
UART
Ports2

GP I/OYes


Networking[edit]

[Edit/Modify Network Info]

ethernet plug icon.svg
Networking
MII
GMIIYes (Ports: 1)
RGMIIYes (Ports: 1)

Hardware Accelerators[edit]

[Edit/Modify Accelerators Info]

hardware accel icon.svg
Hardware Accelerators
Networking
TCPYes
QoSYes

Block diagram[edit]

cn3005 block diagram.png

Datasheet[edit]

base frequency300 MHz (0.3 GHz, 300,000 kHz) +
core count1 +
core namecnMIPS +
designerCavium +
familyOCTEON +
first announcedJanuary 30, 2006 +
first launchedMay 1, 2006 +
full page namecavium/octeon/cn3005-300bg350-cp +
has ecc memory supportfalse +
has hardware accelerators for network quality of service processingtrue +
has hardware accelerators for tcp packet processingtrue +
instance ofmicroprocessor +
isaMIPS64 +
isa familyMIPS +
l1$ size0.0234 MiB (24 KiB, 24,576 B, 2.288818e-5 GiB) +
l1d$ description64-way set associative +
l1d$ size0.00781 MiB (8 KiB, 8,192 B, 7.629395e-6 GiB) +
l1i$ description2-way set associative +
l1i$ size0.0156 MiB (16 KiB, 16,384 B, 1.525879e-5 GiB) +
l2$ description2-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
ldateMay 1, 2006 +
main imageFile:cn3005-15.png +
manufacturerTSMC +
market segmentEmbedded +
max cpu count1 +
max memory2,048 MiB (2,097,152 KiB, 2,147,483,648 B, 2 GiB, 0.00195 TiB) +
max memory bandwidth0.993 GiB/s (1.728 GB/s, 1,017 MiB/s, 9.69924e-4 TiB/s, 0.00107 TB/s) +
max memory channels1 +
microarchitecturecnMIPS +
model numberCN3005-300 CP +
nameCavium CN3005-300 CP +
part numberCN3005-300BG350-CP +
power dissipation2 W (2,000 mW, 0.00268 hp, 0.002 kW) +
process130 nm (0.13 μm, 1.3e-4 mm) +
release price$ 19.00 (€ 17.10, £ 15.39, ¥ 1,963.27) +
seriesCN3000 +
smp max ways1 +
supported memory typeDDR2-533 +
technologyCMOS +
thread count1 +
word size64 bit (8 octets, 16 nibbles) +