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Celeron U3405 - Intel
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Intel Celeron U3405
General Info
DesignerIntel
ManufacturerIntel
Model NumberU3405
Part NumberCN80617006201AA
S-SpecSLBWX
MarketMobile, Embedded
IntroductionAugust, 15 2010 (announced)
August, 15 2010 (launched)
General Specs
FamilyCeleron
SeriesP3000
LockedYes
Frequency1,066.66 MHz
Bus typeDMI 1.0
Bus rate1 × 2.5 GT/s
Clock multiplier8
CPUID0x20655
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureWestmere
PlatformCalpella
ChipsetIbex Peak
Core NameArrandale
Core Family6
Core Model37
Core SteppingK0
Process32 nm
Transistors382,000,000
TechnologyCMOS
Die81 mm²
Word Size64 bit
Cores2
Threads2
Max CPUs1 (Uniprocessor)
Max Memory8 GiB
Electrical
TDP18 W
Tjunction0 °C – 90 °C
Tstorage-25 °C – 125 °C
Packaging
PackageBGA-1288 (BGA)BGA-1288.svg
Dimension34 mm x 28 mm x 2.1 mm
Pitch0.7 mm
Pin Count1288

Celeron U3405 is a 64-bit dual-core x86 mobile microprocessor introduced by Intel in 2010. This processor operates at a frequency of 1.06 GHz and a TDP of 18 W. This MPU is manufactured on a 32 nm process based on the Westmere microarchitecture (Arrandale core). This processor incorporated the HD Graphics (Ironlake) IGP on the same package operating at a base frequency of 166.00 MHz and a burst frequency of 500.00 MHz.

Cache[edit]

Main article: Westmere § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
0.125 MiB
131,072 B
1.220703e-4 GiB
L1I$64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
2x32 KiB4-way set associativewrite-back
L1D$64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
2x32 KiB8-way set associativewrite-back

L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB8-way set associativewrite-back

L3$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  2x1 MiB8-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1066
Supports ECCYes
Max Mem8 GiB
Controllers1
Channels2
Max Bandwidth15.88 GiB/s
Bandwidth
Single 7.942 GiB/s
Double 15.88 GiB/s
Physical Address (PAE)36 bit

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision2.0
Max Lanes16
Configs1x16, 2x8

Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUHD Graphics (Ironlake)
DesignerIntelDevice ID0x0046
Execution Units12Max Displays2
Frequency166 MHz
0.166 GHz
166,000 KHz
Burst Frequency500 MHz
0.5 GHz
500,000 KHz
Output

Standards
DirectX10.1
OpenGL2.1

Additional Features
Intel Flexible Display Interface (FDI)
Intel Clear Video

Features[edit]

Facts about "Celeron U3405 - Intel"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Celeron U3405 - Intel#package +
base frequency1,066.66 MHz (1.067 GHz, 1,066,660 kHz) +
bus links1 +
bus rate2,500 MT/s (2.5 GT/s, 2,500,000 kT/s) +
bus typeDMI 1.0 +
chipsetIbex Peak +
clock multiplier8 +
core count2 +
core family6 +
core model37 +
core nameArrandale +
core steppingK0 +
cpuid0x20655 +
designerIntel +
device id0x0046 +
die area81 mm² (0.126 in², 0.81 cm², 81,000,000 µm²) +
familyCeleron +
first announcedAugust 15, 2010 +
first launchedAugust 15, 2010 +
full page nameintel/celeron/u3405 +
has ecc memory supporttrue +
has featureEnhanced SpeedStep Technology + and Flex Memory Access +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has locked clock multipliertrue +
instance ofmicroprocessor +
integrated gpuHD Graphics (Ironlake) +
integrated gpu base frequency166 MHz (0.166 GHz, 166,000 KHz) +
integrated gpu designerIntel +
integrated gpu max frequency500 MHz (0.5 GHz, 500,000 KHz) +
isax86-64 +
isa familyx86 +
l1$ size0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
l1d$ description8-way set associative +
l1d$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
l1i$ description4-way set associative +
l1i$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description8-way set associative +
l3$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldateAugust 15, 2010 +
manufacturerIntel +
market segmentMobile + and Embedded +
max cpu count1 +
max junction temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max memory channels2 +
max pcie lanes16 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureWestmere +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberU3405 +
nameIntel Celeron U3405 +
packageBGA-1288 +
part numberCN80617006201AA +
platformCalpella +
process32 nm (0.032 μm, 3.2e-5 mm) +
s-specSLBWX +
seriesP3000 +
supported memory typeDDR3-1066 +
tdp18 W (18,000 mW, 0.0241 hp, 0.018 kW) +
technologyCMOS +
thread count2 +
transistor count382,000,000 +
word size64 bit (8 octets, 16 nibbles) +