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PEZY-1 - PEZY
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PEZY-1
pezy 1.jpg
General Info
DesignerPEZY
ManufacturerTSMC
Model NumberPEZY-1
MarketIndustrial
Introduction2011 (announced)
2012 (launched)
General Specs
Frequency533.33 MHz
Microarchitecture
Process40 nm
TechnologyCMOS
Die335 mm²
16.8 mm × 21 mm
Cores512
Electrical
Power dissipation35 W

PEZY-1 was a first generation many-core microprocessor developed by PEZY in 2012. PEZY-1 contains 2 ARM926 cores (ARMv5TEJ) along with 512 simpler RISC cores. Operating at 533 MHz, the processor is said to have peak performance of 533 GFLOPS (single-precision) and 266 GFLOPS (double-precision). PEZY-1 was designed using 220 million gates and manufactured on TSMC's 40 nm process.

The PEZY-1 is used for image processing devices and various medical instruments. In 2014 PEZY introduced their second generation many-core processor, the PEZY-SC, with twice as many cores and formed the basis for the PEZY-SCx family.

Cache[edit]

PEZY-1's cache is separate from the ARM926's cache which has an L1$ of 16 KiB (2x) and no L2$.

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
0.125 MiB
131,072 B
1.220703e-4 GiB
L1I$64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB  
L1D$64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB  

L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  1x1 MiB  

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1333
Supports ECCYes
Controllers4
Channels4
Width64 bit
Max Bandwidth39.74 GiB/s
69.148 GB/s
40,693.76 MiB/s
0.0388 TiB/s
0.0427 TB/s
Bandwidth
Single 9.93 GiB/s
Double 19.86 GiB/s
Quad 39.74 GiB/

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision2.0
Max Lanes24
Configs6x4
UART

GP I/OYes


PEZY-1 Quad PCI Board[edit]

pezy 1 quad pci board.jpg

PEZY has developed a Quad-PEZY-1 PCI board for their microprocessors which has 4 PEZY-1 for a total of 2,048 PE cores (along with 8 ARM cores). The board is equipped with 64 GiB of memory for a total bandwidth of 200 GB/s. PEZY reports the total computational power for the board to be at 2.56 TFLOPS with a power consumption of 180 Watts.

Documents[edit]

Facts about "PEZY-1 - PEZY"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
PEZY-1 - PEZY#io +
base frequency533.33 MHz (0.533 GHz, 533,330 kHz) +
core count512 +
designerPEZY +
die area335 mm² (0.519 in², 3.35 cm², 335,000,000 µm²) +
die length16.8 mm (1.68 cm, 0.661 in, 16,800 µm) +
die width21 mm (2.1 cm, 0.827 in, 21,000 µm) +
first announced2011 +
first launched2012 +
full page namepezy/pezy-1 +
has ecc memory supporttrue +
instance ofmicroprocessor +
l1$ size0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
l1d$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
l1i$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldate2012 +
main imageFile:pezy 1.jpg +
manufacturerTSMC +
market segmentIndustrial +
max memory bandwidth39.74 GiB/s (69.148 GB/s, 40,693.76 MiB/s, 0.0388 TiB/s, 0.0427 TB/s) +
max memory channels4 +
max pcie lanes24 +
model numberPEZY-1 +
namePEZY-1 +
power dissipation35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
process40 nm (0.04 μm, 4.0e-5 mm) +
supported memory typeDDR3-1333 +
technologyCMOS +