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Difference between revisions of "arm holdings"

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{{title|ARM Holdings}}
 
{{title|ARM Holdings}}
 
{{semi company
 
{{semi company
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| name              = ARM Holdings
+
| name              = Arm Holdings
 
| logo              = ARM logo.svg
 
| logo              = ARM logo.svg
 
| logo size        = 150px
 
| logo size        = 150px
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}}-->
 
}}-->
 
}}
 
}}
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'''ARM Holdings''', usually simply '''ARM''', is a British multinational semiconductor and software design company. ARM was spun-off from [[Acorn Computers]] in November [[1990]] as ''Advanced RISC Machines, Ltd.'' (''ARM, Ltd.'') as a  joint venture between [[Acorn Computers]], [[Apple Computer]], and [[VLSI Technology]].
+
'''Arm Holdings''', usually simply '''Arm''' (previously '''ARM'''), is a British multinational semiconductor and software design company. ARM was spun-off from [[Acorn Computers]] in November [[1990]] as ''Advanced RISC Machines, Ltd.'' (''ARM, Ltd.'') as a  joint venture between [[Acorn Computers]], [[Apple Computer]], and [[VLSI Technology]].
 +
 
 +
== Design Groups ==
 +
Arm processors can largely be grouped into the three design teams that design them in parallel:
 +
 
 +
* Austin (Texas)
 +
** {{armh|Cortex-A8|l=arch}}, {{armh|Cortex-A15|l=arch}}, {{armh|Cortex-A57|l=arch}}, {{armh|Cortex-A72|l=arch}}, {{armh|Cortex-A76|l=arch}}, {{armh|Cortex-A77|l=arch}}, {{armh|Cortex-A78|l=arch}}
 +
** {{armh|Cortex-X1|l=arch}}, {{armh|Cortex-X2|l=arch}}, {{armh|Cortex-X3|l=arch}}
 +
** {{armh|Neoverse N1|l=arch}}, {{armh|Neoverse N2|l=arch}}, {{armh|Neoverse V1|l=arch}}
 +
* Sophia-Antipolis (France)
 +
** {{armh|ARM11|l=arch}}, {{armh|Cortex-A9|l=arch}}, {{armh|Cortex-A12|l=arch}}, {{armh|Cortex-A17|l=arch}}, {{armh|Cortex-A73|l=arch}}, {{armh|Cortex-A75|l=arch}}
 +
* Cambridge (UK)
 +
** {{armh|Cortex-A5|l=arch}}, {{armh|Cortex-A7|l=arch}}, {{armh|Cortex-A53|l=arch}}, {{armh|Cortex-A35|l=arch}}, {{armh|Cortex-A55|l=arch}}
  
 
== Microarchitectures ==
 
== Microarchitectures ==
 +
=== {{\|Classic}}===
 +
{{lbox
 +
|'''Classic'''
 +
|
 
{{collist
 
{{collist
 
| count = 4
 
| count = 4
Line 43: Line 59:
 
* {{armh|ARM10|l=arch}}
 
* {{armh|ARM10|l=arch}}
 
* {{armh|ARM11|l=arch}}
 
* {{armh|ARM11|l=arch}}
−
* {{armh|Cortex-A12|l=arch}}
+
}}
−
* {{armh|Cortex-A15|l=arch}}
+
<small>'''Note:''' ARM4 & ARM5 would've been during the time Acorn was spun off as ARM Holdings. The two versions were skipped.</small>
−
* {{armh|Cortex-A17|l=arch}}
+
}}
−
* {{armh|Cortex-A32|l=arch}}
+
=== {{\|Cortex}} ===
−
* {{armh|Cortex-A35|l=arch}}
+
{{lbox
−
* {{armh|Cortex-A53|l=arch}}
+
|'''Real-Time'''
−
* {{armh|Cortex-A55|l=arch}}
+
|
−
* {{armh|Cortex-A57|l=arch}}
+
{{collist
−
* {{armh|Cortex-A5|l=arch}}
+
| count = 4
−
* {{armh|Cortex-A72|l=arch}}
+
| style= margin-left: 20px;
−
* {{armh|Cortex-A73|l=arch}}
+
|
−
* {{armh|Cortex-A75|l=arch}}
+
'''Storage/Modem:'''
−
* {{armh|Cortex-A7|l=arch}}
 
−
* {{armh|Cortex-A8|l=arch}}
 
−
* {{armh|Cortex-A9|l=arch}}
 
−
* {{armh|Cortex-M0|l=arch}}
 
−
* {{armh|Cortex-M0+|l=arch}}
 
−
* {{armh|Cortex-M1|l=arch}}
 
−
* {{armh|Cortex-M3|l=arch}}
 
−
* {{armh|Cortex-M4|l=arch}}
 
−
* {{armh|Cortex-M7|l=arch}}
 
−
* {{armh|Cortex-R4|l=arch}}
 
−
* {{armh|Cortex-R52|l=arch}}
 
−
* {{armh|Cortex-R5|l=arch}}
 
 
* {{armh|Cortex-R7|l=arch}}
 
* {{armh|Cortex-R7|l=arch}}
 
* {{armh|Cortex-R8|l=arch}}
 
* {{armh|Cortex-R8|l=arch}}
−
* {{armh|SecurCore SC000|l=arch}}
+
* {{armh|Cortex-R82|l=arch}}
−
* {{armh|SecurCore SC100|l=arch}}
+
'''Functional Safety:'''
−
* {{armh|SecurCore SC300|l=arch}}
+
* {{armh|Cortex-R4|l=arch}} (Serval-E)
 +
* {{armh|Cortex-R5|l=arch}}
 +
* {{armh|Cortex-R52|l=arch}}
 +
}}
 +
}}
 +
 
 +
{{lbox
 +
|'''Microcontroller'''
 +
|
 +
{{collist
 +
| count = 4
 +
| style= margin-left: 20px;
 +
|
 +
'''LP/Area:'''
 +
* {{armh|Cortex-M0|l=arch}} (Swift)
 +
* {{armh|Cortex-M0+|l=arch}} (Flycatcher)
 +
* {{armh|Cortex-M23|l=arch}} (Grebe)
 +
'''Performance/efficiency:'''
 +
* {{armh|Cortex-M3|l=arch}} (Sandcat)
 +
* {{armh|Cortex-M4|l=arch}} (Merlin)
 +
* {{armh|Cortex-M33|l=arch}} (Teal)
 +
* {{armh|Cortex-M35P|l=arch}} (Tahan)
 +
'''High Performance:'''
 +
* {{armh|Cortex-M7|l=arch}} (Pelican)
 +
* {{armh|Cortex-M55|l=arch}} (Yamin)
 +
'''FPGA:'''
 +
* {{armh|Cortex-M1|l=arch}} (Proteus)
 +
}}
 +
}}
 +
 
 +
{{lbox
 +
|'''Mainstream'''
 +
|
 +
{{collist
 +
| count = 4
 +
| style= margin-left: 20px;
 +
|
 +
* {{armh|Cortex-A8|l=arch}} (Tiger)
 +
* {{armh|Cortex-A9|l=arch}} (Falcon)
 +
 
 +
'''ULP:'''
 +
* {{armh|Cortex-A5|l=arch}} (Sparrow)
 +
* {{armh|Cortex-A34|l=arch}} (Metis)
 +
* {{armh|Cortex-A35|l=arch}} (Mercury)
 +
* {{armh|Cortex-A32|l=arch}} (Minerva)
 +
'''[[little core|Little]]:'''
 +
* {{armh|Cortex-A7|l=arch}} (Kingfisher)
 +
* {{armh|Cortex-A53|l=arch}} (Apollo)
 +
* {{armh|Cortex-A55|l=arch}} (Ananke)
 +
* {{armh|Cortex-A510|l=arch}} (Klein)
 +
* {{armh|Hayes|l=arch}}
 +
'''Mid-Range'''
 +
* <s>{{armh|Cortex-A12|l=arch}}</s> (Owl)
 +
* {{armh|Cortex-A17|l=arch}} (Owl)
 +
'''[[big core|Big]]:'''
 +
* {{armh|Cortex-A15|l=arch}} (Eagle)
 +
* {{armh|Cortex-A57|l=arch}} (Atlas)
 +
* {{armh|Cortex-A72|l=arch}} (Maia)
 +
* {{armh|Cortex-A73|l=arch}} (Artemis)
 +
* {{armh|Cortex-A75|l=arch}} (Prometheus)
 +
* {{armh|Cortex-A76|l=arch}} (Enyo)
 +
* {{armh|Cortex-A77|l=arch}} (Deimos)
 +
* {{armh|Cortex-A78|l=arch}} (Hercules)
 +
* {{armh|Cortex-A710|l=arch}} (Matterhorn)
 +
* {{armh|Cortex-A715|l=arch}} (Makalu)
 +
* {{armh|Hunter|l=arch}}
 +
* {{armh|Chaberton|l=arch}}
 +
 
 +
 
 +
* {{armh|Cortex-A78C|l=arch}} (Hercules-C)
 +
'''[[big core|Bigger]]:'''
 +
* {{armh|Cortex-X1|l=arch}} (Hera)
 +
* {{armh|Cortex-X2|l=arch}} (Matterhorn-ELP)
 +
* {{armh|Cortex-X3|l=arch}} (Makalu-ELP)
 +
* {{armh|Hunter-ELP|l=arch}}
 +
* {{armh|Chaberton-ELP|l=arch}}
 +
 
 +
 
 +
* {{armh|Cortex-X1C|l=arch}} (Hera-C)
 +
'''Autonomous Machines:'''
 +
* {{armh|Cortex-A76AE|l=arch}} (Enyo-SL)
 +
* {{armh|Cortex-A78AE|l=arch}} (Hercules-AE)
 +
* {{armh|Cortex-A65AE|l=arch}} (Helios-SL)
 +
}}
 
}}
 
}}
  
−
* <small>ARM4 & ARM5 would've been during the time Acorn was spun off as ARM Holdings. The two versions were skipped.</small>
+
=== {{\|Neoverse}} ===
 +
{{lbox
 +
|'''Servers'''
 +
|
 +
{{collist
 +
| count = 4
 +
| style= margin-left: 20px;
 +
|
 +
'''Performance'''
 +
* {{armh|Cosmos|l=arch}}
 +
* {{armh|Neoverse N1|l=arch}} (Ares)
 +
* {{armh|Neoverse N2|l=arch}} (Perseus)
 +
* {{armh|Poseidon|l=arch}}
 +
'''HPC'''
 +
* {{armh|Neoverse V1|l=arch}} (Zeus)
 +
* {{armh|Demeter|l=arch}}
 +
'''Throughput'''
 +
* {{armh|Neoverse E1|l=arch}} (Helios)
 +
}}
 +
}}
 +
 
 +
=== Other ===
 +
{{lbox
 +
|'''Other IP'''
 +
|
 +
{{collist
 +
| count = 4
 +
|
 +
'''SecurCore:'''
 +
* {{armh|SC000|l=arch}}
 +
* {{armh|SC100|l=arch}}
 +
* {{armh|SC300|l=arch}}
 +
'''[[Neural Processors]]:'''
 +
* {{armh|ARM MLP|l=arch}}
 +
* {{armh|Ethos}}
 +
}}
 +
}}
 +
 
 +
== GPUs ==
 +
* {{armh|Mali}}
 +
* {{armh|Immortalis}}
 +
 
 +
== Architectures ==
 +
GPU:
 +
 
 +
* {{armh|Heimdall}}
 +
* {{armh|Bifrost}}
  
 
== ISAs ==
 
== ISAs ==
 
* [[ARM]]
 
* [[ARM]]
 +
 +
== Other topics ==
 +
* {{\\|big.LITTLE}}
 +
* {{\\|DynamIQ}}
 +
* {{\\|Coherent Mesh Network}} (CMN)
  
 
== See Also ==
 
== See Also ==
 
* [[Acorn Computers]]
 
* [[Acorn Computers]]

Latest revision as of 21:02, 3 November 2022

Arm Holdings
ARM logo.svg
Type Public
Founded November 27, 1990
Founder Jamie Urquhart
Mike Muller
Tudor Brown
Lee Smith
John Biggs
Harry Oldham
Dave Howard
Pete Harrod
Harry Meekings
Al Thomas
Andy Merritt
Headquarters Cambridge, England
Website http://www.arm.com

Arm Holdings, usually simply Arm (previously ARM), is a British multinational semiconductor and software design company. ARM was spun-off from Acorn Computers in November 1990 as Advanced RISC Machines, Ltd. (ARM, Ltd.) as a joint venture between Acorn Computers, Apple Computer, and VLSI Technology.

Design Groups[edit]

Arm processors can largely be grouped into the three design teams that design them in parallel:

Microarchitectures[edit]

Classic[edit]

Classic

Note: ARM4 & ARM5 would've been during the time Acorn was spun off as ARM Holdings. The two versions were skipped.

Cortex[edit]

Real-Time

Storage/Modem:

Functional Safety:

Microcontroller

LP/Area:

Performance/efficiency:

High Performance:

FPGA:

Mainstream

ULP:

Little:

Mid-Range

Big:


Bigger:


Autonomous Machines:

Neoverse[edit]

Servers

Performance

HPC

Throughput

Other[edit]

GPUs[edit]

Architectures[edit]

GPU:

ISAs[edit]

Other topics[edit]

See Also[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=arm_holdings&oldid=100911"
Facts about "ARM Holdings"
RDF feed
company typepublic +
foundedNovember 27, 1990 +
founderJamie Urquhart +, Mike Muller +, Tudor Brown +, Lee Smith +, John Biggs +, Harry Oldham +, Dave Howard +, Pete Harrod +, Harry Meekings +, Al Thomas + and Andy Merritt +
full page namearm holdings +
headquartersCambridge, England +
instance ofsemiconductor company +
nameARM Holdings +
websitehttp://www.arm.com +
wikidata idQ296782 +