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Difference between revisions of "arm holdings"

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{{title|ARM Holdings}}
 
{{title|ARM Holdings}}
 
{{semi company
 
{{semi company
−
| name              = ARM Holdings
+
| name              = Arm Holdings
 
| logo              = ARM logo.svg
 
| logo              = ARM logo.svg
 
| logo size        = 150px
 
| logo size        = 150px
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}}-->
 
}}-->
 
}}
 
}}
−
'''ARM Holdings''', usually simply '''ARM''', is a British multinational semiconductor and software design company. ARM was spun-off from [[Acorn Computers]] in November [[1990]] as ''Advanced RISC Machines, Ltd.'' (''ARM, Ltd.'') as a  joint venture between [[Acorn Computers]], [[Apple Computer]], and [[VLSI Technology]].
+
'''Arm Holdings''', usually simply '''Arm''' (previously '''ARM'''), is a British multinational semiconductor and software design company. [[ARM]] was spun-off from [[Acorn Computers]] in November [[1990]] as ''Advanced RISC Machines, Ltd.'' (''ARM, Ltd.'') as a  joint venture between [[Acorn Computers]], [[Apple Computer]], and [[VLSI Technology]].
  
 
== Design Groups ==
 
== Design Groups ==
Line 33: Line 33:
  
 
* Austin (Texas)
 
* Austin (Texas)
−
** {{armh|Cortex-A8|l=arch}}, {{armh|Cortex-A15|l=arch}}, {{armh|Cortex-A57|l=arch}}, {{armh|Cortex-A72|l=arch}}, {{armh|Cortex-A76|l=arch}}
+
** {{armh|Cortex-A8|l=arch}}, {{armh|Cortex-A15|l=arch}}, {{armh|Cortex-A57|l=arch}}, {{armh|Cortex-A72|l=arch}}, {{armh|Cortex-A76|l=arch}}, {{armh|Cortex-A77|l=arch}}, {{armh|Cortex-A78|l=arch}}
 +
** {{armh|Cortex-X1|l=arch}}, {{armh|Cortex-X2|l=arch}}, {{armh|Cortex-X3|l=arch}}
 +
** {{armh|Neoverse N1|l=arch}}, {{armh|Neoverse N2|l=arch}}, {{armh|Neoverse V1|l=arch}}
 
* Sophia-Antipolis (France)
 
* Sophia-Antipolis (France)
 
** {{armh|ARM11|l=arch}}, {{armh|Cortex-A9|l=arch}}, {{armh|Cortex-A12|l=arch}}, {{armh|Cortex-A17|l=arch}}, {{armh|Cortex-A73|l=arch}}, {{armh|Cortex-A75|l=arch}}
 
** {{armh|ARM11|l=arch}}, {{armh|Cortex-A9|l=arch}}, {{armh|Cortex-A12|l=arch}}, {{armh|Cortex-A17|l=arch}}, {{armh|Cortex-A73|l=arch}}, {{armh|Cortex-A75|l=arch}}
 
* Cambridge (UK)  
 
* Cambridge (UK)  
−
** {{armh|Cortex-A5|l=arch}}, {{armh|Cortex-A7|l=arch}}, {{armh|Cortex-A53|l=arch}}, {{armh|Cortex-A35|l=arch}}, {{armh|Cortex-A55|l=arch}}
+
** {{armh|Cortex-A5|l=arch}}, {{armh|Cortex-A7|l=arch}}, {{armh|Cortex-A35|l=arch}}, {{armh|Cortex-A53|l=arch}}, {{armh|Cortex-A55|l=arch}}
  
 
== Microarchitectures ==
 
== Microarchitectures ==
−
=== Classic ===
+
=== {{\|Classic}}===
 +
{{lbox
 +
|'''Classic'''
 +
|
 
{{collist
 
{{collist
−
| count = 4
+
| count = 5
 
|
 
|
 
* {{armh|ARM1|l=arch}}
 
* {{armh|ARM1|l=arch}}
Line 49: Line 54:
 
* {{armh|ARM3|l=arch}}
 
* {{armh|ARM3|l=arch}}
 
* {{armh|ARM6|l=arch}}
 
* {{armh|ARM6|l=arch}}
 +
 
* {{armh|ARM7|l=arch}}
 
* {{armh|ARM7|l=arch}}
 
* {{armh|ARM8|l=arch}}
 
* {{armh|ARM8|l=arch}}
Line 55: Line 61:
 
* {{armh|ARM11|l=arch}}
 
* {{armh|ARM11|l=arch}}
 
}}
 
}}
−
* <small>ARM4 & ARM5 would've been during the time Acorn was spun off as ARM Holdings. The two versions were skipped.</small>
+
<small>'''Note:''' ARM4 & ARM5 would've been during the time Acorn was spun off as ARM Holdings. The two versions were skipped.</small>
−
=== Cortex ===
+
}}
−
'''Real-Time:'''
+
=== {{\|Cortex}} ===
 +
{{lbox
 +
|'''Real-Time'''
 +
|
 
{{collist
 
{{collist
 
| count = 4
 
| count = 4
 
| style= margin-left: 20px;
 
| style= margin-left: 20px;
 
|
 
|
 +
'''Functional Safety:'''
 +
* {{armh|Cortex-R4|l=arch}} (Serval-E)
 +
* {{armh|Cortex-R5|l=arch}}
 +
* {{armh|Cortex-R52|l=arch}}
 +
* Cortex-R52+
 
'''Storage/Modem:'''
 
'''Storage/Modem:'''
 
* {{armh|Cortex-R7|l=arch}}
 
* {{armh|Cortex-R7|l=arch}}
 
* {{armh|Cortex-R8|l=arch}}
 
* {{armh|Cortex-R8|l=arch}}
−
'''Functional Safety:'''
+
* {{armh|Cortex-R82|l=arch}}
−
* {{armh|Cortex-R4|l=arch}}
+
* Cortex-R82AE
−
* {{armh|Cortex-R5|l=arch}}
+
}}
−
* {{armh|Cortex-R52|l=arch}}
 
 
}}
 
}}
−
'''Microcontroller:'''
+
 
 +
{{lbox
 +
|'''Microcontroller'''
 +
|
 
{{collist
 
{{collist
 
| count = 4
 
| count = 4
 
| style= margin-left: 20px;
 
| style= margin-left: 20px;
 
|
 
|
 +
'''FPGA:'''
 +
* {{armh|Cortex-M1|l=arch}} (Proteus)
 
'''LP/Area:'''
 
'''LP/Area:'''
−
* {{armh|Cortex-M0|l=arch}}
+
* {{armh|Cortex-M0|l=arch}} (Swift)
−
* {{armh|Cortex-M0+|l=arch}}
+
* {{armh|Cortex-M0+|l=arch}} (Flycatcher)
−
* {{armh|Cortex-M23|l=arch}}
+
* {{armh|Cortex-M23|l=arch}} (Grebe)
 
'''Performance/efficiency:'''
 
'''Performance/efficiency:'''
−
* {{armh|Cortex-M3|l=arch}}
+
* {{armh|Cortex-M3|l=arch}} (Sandcat)
−
* {{armh|Cortex-M4|l=arch}}
+
* {{armh|Cortex-M4|l=arch}} (Merlin)
−
* {{armh|Cortex-M33|l=arch}}
+
* {{armh|Cortex-M33|l=arch}} (Teal)
−
* {{armh|Cortex-M35P|l=arch}}
+
* {{armh|Cortex-M35P|l=arch}} (Tahan)
 
'''High Performance:'''
 
'''High Performance:'''
−
* {{armh|Cortex-M7|l=arch}}
+
* {{armh|Cortex-M7|l=arch}} (Pelican)
−
'''FPGA:'''
+
* Cortex-M52
−
* {{armh|Cortex-M1|l=arch}}
+
* {{armh|Cortex-M55|l=arch}} (Yamin)
 +
* Cortex-M85
 +
}}
 
}}
 
}}
−
'''Mainstream:'''
+
 
 +
{{lbox
 +
|'''Mainstream'''
 +
|
 
{{collist
 
{{collist
−
| count = 4
+
| count = 3
 
| style= margin-left: 20px;
 
| style= margin-left: 20px;
 
|
 
|
 
* {{armh|Cortex-A8|l=arch}} (Tiger)
 
* {{armh|Cortex-A8|l=arch}} (Tiger)
−
* {{armh|Cortex-A9|l=arch}}
+
* {{armh|Cortex-A9|l=arch}} (Falcon)
  
 
'''ULP:'''
 
'''ULP:'''
−
* {{armh|Cortex-A5|l=arch}}
+
* {{armh|Cortex-A5|l=arch}} (Sparrow)
 +
* {{armh|Cortex-A32|l=arch}} (Minerva)
 +
* {{armh|Cortex-A34|l=arch}} (Metis)
 
* {{armh|Cortex-A35|l=arch}} (Mercury)
 
* {{armh|Cortex-A35|l=arch}} (Mercury)
−
* {{armh|Cortex-A32|l=arch}}
+
 
 
'''[[little core|Little]]:'''
 
'''[[little core|Little]]:'''
 
* {{armh|Cortex-A7|l=arch}} (Kingfisher)
 
* {{armh|Cortex-A7|l=arch}} (Kingfisher)
 
* {{armh|Cortex-A53|l=arch}} (Apollo)
 
* {{armh|Cortex-A53|l=arch}} (Apollo)
 
* {{armh|Cortex-A55|l=arch}} (Ananke)
 
* {{armh|Cortex-A55|l=arch}} (Ananke)
−
* {{armh|Helios|l=arch}}
+
* {{armh|Cortex-A510|l=arch}} (Klein)
 +
* {{armh|Cortex-A520|l=arch}} ({{armh|Hayes|l=arch}})
 +
* {{armh|Cortex-A530|l=arch}} (Nevis)
 +
 
 
'''Mid-Range'''
 
'''Mid-Range'''
 
* <s>{{armh|Cortex-A12|l=arch}}</s> (Owl)
 
* <s>{{armh|Cortex-A12|l=arch}}</s> (Owl)
−
* {{armh|Cortex-A17|l=arch}}
+
* {{armh|Cortex-A17|l=arch}} (Owl)
 +
 
 
'''[[big core|Big]]:'''
 
'''[[big core|Big]]:'''
 
* {{armh|Cortex-A15|l=arch}} (Eagle)
 
* {{armh|Cortex-A15|l=arch}} (Eagle)
 
* {{armh|Cortex-A57|l=arch}} (Atlas)
 
* {{armh|Cortex-A57|l=arch}} (Atlas)
−
* {{armh|Cortex-A72|l=arch}} (Maya)
+
* {{armh|Cortex-A65|l=arch}} ({{armh|Helios|l=arch}}) ?
 +
* {{armh|Cortex-A72|l=arch}} (Maia)
 
* {{armh|Cortex-A73|l=arch}} (Artemis)
 
* {{armh|Cortex-A73|l=arch}} (Artemis)
 
* {{armh|Cortex-A75|l=arch}} (Prometheus)
 
* {{armh|Cortex-A75|l=arch}} (Prometheus)
 
* {{armh|Cortex-A76|l=arch}} (Enyo)
 
* {{armh|Cortex-A76|l=arch}} (Enyo)
−
* {{armh|Deimos|l=arch}}
+
* {{armh|Cortex-A77|l=arch}} (Deimos)
−
* {{armh|Hercules|l=arch}}
+
* {{armh|Cortex-A78|l=arch}} (Hercules)
 +
 
 +
* {{armh|Cortex-A710|l=arch}} (Matterhorn)
 +
* {{armh|Cortex-A715|l=arch}} (Makalu)
 +
* {{armh|Cortex-A720|l=arch}} ({{armh|Hunter|l=arch}})
 +
* {{armh|Cortex-A725|l=arch}} ({{armh|Chaberton|l=arch}})
 +
* {{armh|Cortex-A730|l=arch}} (Gelas)
 +
 
 +
 
 +
* {{armh|Cortex-A78C|l=arch}} (Hera Prime)
 +
 
 +
'''[[big core|Bigger]]:'''
 +
* {{armh|Cortex-X1|l=arch}} ({{armh|Hera|l=arch}})
 +
* {{armh|Cortex-X2|l=arch}} ({{armh|Matterhorn-ELP|l=arch}})
 +
* {{armh|Cortex-X3|l=arch}} ({{armh|Makalu-ELP|l=arch}})
 +
* {{armh|Cortex-X4|l=arch}} ({{armh|Hunter-ELP|l=arch}})
 +
* <s>Cortex-X5 ({{armh|Chaberton-ELP|l=arch}})</s>
 +
* {{armh|Cortex-X925|l=arch}} (Blackhawk)
 +
* {{armh|Cortex-X930|l=arch}} (Travis)
 +
 
 +
 
 +
* {{armh|Cortex-X1C|l=arch}} (Hera-C)
 +
 
 
'''Autonomous Machines:'''
 
'''Autonomous Machines:'''
−
* {{armh|Cortex-A76AE|l=arch}}
+
* {{armh|Cortex-A65AE|l=arch}} (Helios-SL)
−
* {{armh|Cortex-A65AE|l=arch}}
+
* {{armh|Cortex-A76AE|l=arch}} (Enyo-SL)
 +
* {{armh|Cortex-A78AE|l=arch}} (Hercules-AE)
 +
 
 +
* Cortex-A520AE (Hayes-AE)
 +
* Cortex-A720AE (Hunter-AE)
 
}}
 
}}
 +
}}
  
−
=== Neoverse ===
+
=== {{\|Neoverse}} ===
−
'''Servers:'''
+
{{lbox
 +
|'''Servers'''
 +
|
 
{{collist
 
{{collist
−
| count = 4
+
| count = 2
 
| style= margin-left: 20px;
 
| style= margin-left: 20px;
 
|
 
|
−
* {{armh|Cosmos|l=arch}}
+
'''Throughput'''
−
* {{armh|Ares|l=arch}}
+
* {{armh|Neoverse E1|l=arch}} ({{armh|Helios|l=arch}}) ?
−
* {{armh|Zeus|l=arch}}
+
* {{armh|Neoverse E2|l=arch}} (A510)
−
* {{armh|Poseidon|l=arch}}
+
* {{armh|Neoverse E3|l=arch}} (Aphrodite)
 +
* {{armh|Neoverse E4|l=arch}} (Lycius)
 +
 
 +
'''Performance'''
 +
* {{armh|Neoverse N1|l=arch}} ({{armh|Ares|l=arch}}) • [[Graviton 2]]
 +
* {{armh|Neoverse N2|l=arch}} ({{armh|Perseus|l=arch}})
 +
* {{armh|Neoverse N3|l=arch}} (Hermes)
 +
* {{armh|Neoverse N4|l=arch}} (Dionysus) <!--
 +
* {{armh|Cosmos|l=arch}} (A72/A75) ? -->
 +
 
 +
'''HPC'''
 +
* {{armh|Neoverse V1|l=arch}} ({{armh|Zeus|l=arch}}) • [[Graviton 3]]
 +
* {{armh|Neoverse V2|l=arch}} ({{armh|Demeter|l=arch}}) • [[Graviton 4]]
 +
* {{armh|Neoverse V3|l=arch}} ({{armh|Poseidon|l=arch}})
 +
* {{armh|Neoverse V4|l=arch}} (Adonis)
 +
 
 +
'''Auto'''
 +
* Neoverse V3AE (Autonome)
 +
* Neoverse VN (Automobile)
 +
 
 +
'''CSS'''
 +
* Neoverse CSS N2 (Genesis)
 +
* Neoverse CSS N3 (Pioneer)
 +
* Neoverse CSS N4 (Ranger)
 +
* Neoverse CSS V3 (Voyager)
 +
* Neoverse CSS V4 (Vega)
 
}}
 
}}
 +
}}
 +
<!--
 +
Gen 1: Neoverse E1 (Helios), Neoverse N1 (Ares), Neoverse V1 (Zeus)
 +
Gen 2: Neoverse E2, Neoverse N2 (Perseus), Neoverse V2 (Demeter)
 +
Neoverse CSS N2 (Genesis) • Neoverse Roadmap • Tables 2024
 +
Gen 3: Neoverse E3 (Aphrodite), Neoverse N3 (Hermes), Neoverse V3 (Poseidon)
 +
Neoverse V3AE (Poseidon-AE), Neoverse VN (Poseidon-VN) [Auto]
 +
Neoverse CSS N3 (Pioneer), Neoverse CSS V3 (Voyager)
 +
Gen 4: Neoverse E4 (Lycius), Neoverse N4 (Dionysus), Neoverse V4 (Adonis)
 +
Neoverse CSS N4 (Ranger), Neoverse CSS V4 (Vega)
 +
-->
  
 
=== Other ===
 
=== Other ===
 +
{{lbox
 +
|'''Other IP'''
 +
|
 
{{collist
 
{{collist
 
| count = 4
 
| count = 4
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* {{armh|SC300|l=arch}}
 
* {{armh|SC300|l=arch}}
 
'''[[Neural Processors]]:'''
 
'''[[Neural Processors]]:'''
−
* {{armh|ARM ML|l=arch}}
+
* {{armh|ARM MLP|l=arch}}
 +
* {{armh|Ethos}}
 
}}
 
}}
 +
}}
 +
 +
== GPUs ==
 +
* {{armh|Mali}}
 +
* {{armh|Immortalis}}
  
 
== Architectures ==
 
== Architectures ==

Latest revision as of 21:40, 22 March 2025

Arm Holdings
ARM logo.svg
Type Public
Founded November 27, 1990
Founder Jamie Urquhart
Mike Muller
Tudor Brown
Lee Smith
John Biggs
Harry Oldham
Dave Howard
Pete Harrod
Harry Meekings
Al Thomas
Andy Merritt
Headquarters Cambridge, England
Website http://www.arm.com

Arm Holdings, usually simply Arm (previously ARM), is a British multinational semiconductor and software design company. ARM was spun-off from Acorn Computers in November 1990 as Advanced RISC Machines, Ltd. (ARM, Ltd.) as a joint venture between Acorn Computers, Apple Computer, and VLSI Technology.

Design Groups[edit]

Arm processors can largely be grouped into the three design teams that design them in parallel:

Microarchitectures[edit]

Classic[edit]

Classic

Note: ARM4 & ARM5 would've been during the time Acorn was spun off as ARM Holdings. The two versions were skipped.

Cortex[edit]

Real-Time

Functional Safety:

Storage/Modem:

Microcontroller

FPGA:

LP/Area:

Performance/efficiency:

High Performance:

Mainstream

ULP:

Little:

Mid-Range

Big:


Bigger:


Autonomous Machines:

  • Cortex-A520AE (Hayes-AE)
  • Cortex-A720AE (Hunter-AE)

Neoverse[edit]

Servers

Throughput

Performance

HPC

Auto

  • Neoverse V3AE (Autonome)
  • Neoverse VN (Automobile)

CSS

  • Neoverse CSS N2 (Genesis)
  • Neoverse CSS N3 (Pioneer)
  • Neoverse CSS N4 (Ranger)
  • Neoverse CSS V3 (Voyager)
  • Neoverse CSS V4 (Vega)

Other[edit]

GPUs[edit]

Architectures[edit]

GPU:

ISAs[edit]

Other topics[edit]

See Also[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=arm_holdings&oldid=103041"
Facts about "ARM Holdings"
RDF feed
company typepublic +
foundedNovember 27, 1990 +
founderJamie Urquhart +, Mike Muller +, Tudor Brown +, Lee Smith +, John Biggs +, Harry Oldham +, Dave Howard +, Pete Harrod +, Harry Meekings +, Al Thomas + and Andy Merritt +
full page namearm holdings +
headquartersCambridge, England +
instance ofsemiconductor company +
nameArm Holdings +
websitehttp://www.arm.com +
wikidata idQ296782 +