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Difference between revisions of "arm holdings"
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| − | '''Arm Holdings''', usually simply '''Arm''' (previously '''ARM'''), is a British multinational semiconductor and software design company. ARM was spun-off from [[Acorn Computers]] in November [[1990]] as ''Advanced RISC Machines, Ltd.'' (''ARM, Ltd.'') as a joint venture between [[Acorn Computers]], [[Apple Computer]], and [[VLSI Technology]]. | + | '''Arm Holdings''', usually simply '''Arm''' (previously '''ARM'''), is a British multinational semiconductor and software design company. [[ARM]] was spun-off from [[Acorn Computers]] in November [[1990]] as ''Advanced RISC Machines, Ltd.'' (''ARM, Ltd.'') as a joint venture between [[Acorn Computers]], [[Apple Computer]], and [[VLSI Technology]]. |
== Design Groups == | == Design Groups == | ||
| Line 39: | Line 39: | ||
** {{armh|ARM11|l=arch}}, {{armh|Cortex-A9|l=arch}}, {{armh|Cortex-A12|l=arch}}, {{armh|Cortex-A17|l=arch}}, {{armh|Cortex-A73|l=arch}}, {{armh|Cortex-A75|l=arch}} | ** {{armh|ARM11|l=arch}}, {{armh|Cortex-A9|l=arch}}, {{armh|Cortex-A12|l=arch}}, {{armh|Cortex-A17|l=arch}}, {{armh|Cortex-A73|l=arch}}, {{armh|Cortex-A75|l=arch}} | ||
* Cambridge (UK) | * Cambridge (UK) | ||
| − | ** {{armh|Cortex-A5|l=arch}}, {{armh|Cortex-A7|l=arch}}, {{armh|Cortex- | + | ** {{armh|Cortex-A5|l=arch}}, {{armh|Cortex-A7|l=arch}}, {{armh|Cortex-A35|l=arch}}, {{armh|Cortex-A53|l=arch}}, {{armh|Cortex-A55|l=arch}} |
== Microarchitectures == | == Microarchitectures == | ||
| Line 47: | Line 47: | ||
| | | | ||
{{collist | {{collist | ||
| − | | count = | + | | count = 5 |
| | | | ||
* {{armh|ARM1|l=arch}} | * {{armh|ARM1|l=arch}} | ||
| Line 54: | Line 54: | ||
* {{armh|ARM3|l=arch}} | * {{armh|ARM3|l=arch}} | ||
* {{armh|ARM6|l=arch}} | * {{armh|ARM6|l=arch}} | ||
| + | |||
* {{armh|ARM7|l=arch}} | * {{armh|ARM7|l=arch}} | ||
* {{armh|ARM8|l=arch}} | * {{armh|ARM8|l=arch}} | ||
| Line 70: | Line 71: | ||
| style= margin-left: 20px; | | style= margin-left: 20px; | ||
| | | | ||
| + | '''Functional Safety:''' | ||
| + | * {{armh|Cortex-R4|l=arch}} (Serval-E) | ||
| + | * {{armh|Cortex-R5|l=arch}} | ||
| + | * {{armh|Cortex-R52|l=arch}} | ||
| + | * Cortex-R52+ | ||
'''Storage/Modem:''' | '''Storage/Modem:''' | ||
* {{armh|Cortex-R7|l=arch}} | * {{armh|Cortex-R7|l=arch}} | ||
* {{armh|Cortex-R8|l=arch}} | * {{armh|Cortex-R8|l=arch}} | ||
* {{armh|Cortex-R82|l=arch}} | * {{armh|Cortex-R82|l=arch}} | ||
| − | + | * Cortex-R82AE | |
| − | * | ||
| − | |||
| − | |||
}} | }} | ||
}} | }} | ||
| Line 88: | Line 91: | ||
| style= margin-left: 20px; | | style= margin-left: 20px; | ||
| | | | ||
| + | '''FPGA:''' | ||
| + | * {{armh|Cortex-M1|l=arch}} (Proteus) | ||
'''LP/Area:''' | '''LP/Area:''' | ||
* {{armh|Cortex-M0|l=arch}} (Swift) | * {{armh|Cortex-M0|l=arch}} (Swift) | ||
| Line 99: | Line 104: | ||
'''High Performance:''' | '''High Performance:''' | ||
* {{armh|Cortex-M7|l=arch}} (Pelican) | * {{armh|Cortex-M7|l=arch}} (Pelican) | ||
| + | * Cortex-M52 | ||
* {{armh|Cortex-M55|l=arch}} (Yamin) | * {{armh|Cortex-M55|l=arch}} (Yamin) | ||
| − | + | * Cortex-M85 | |
| − | * | ||
}} | }} | ||
}} | }} | ||
| Line 109: | Line 114: | ||
| | | | ||
{{collist | {{collist | ||
| − | | count = | + | | count = 3 |
| style= margin-left: 20px; | | style= margin-left: 20px; | ||
| | | | ||
| Line 117: | Line 122: | ||
'''ULP:''' | '''ULP:''' | ||
* {{armh|Cortex-A5|l=arch}} (Sparrow) | * {{armh|Cortex-A5|l=arch}} (Sparrow) | ||
| + | * {{armh|Cortex-A32|l=arch}} (Minerva) | ||
* {{armh|Cortex-A34|l=arch}} (Metis) | * {{armh|Cortex-A34|l=arch}} (Metis) | ||
* {{armh|Cortex-A35|l=arch}} (Mercury) | * {{armh|Cortex-A35|l=arch}} (Mercury) | ||
| − | + | ||
'''[[little core|Little]]:''' | '''[[little core|Little]]:''' | ||
* {{armh|Cortex-A7|l=arch}} (Kingfisher) | * {{armh|Cortex-A7|l=arch}} (Kingfisher) | ||
| Line 125: | Line 131: | ||
* {{armh|Cortex-A55|l=arch}} (Ananke) | * {{armh|Cortex-A55|l=arch}} (Ananke) | ||
* {{armh|Cortex-A510|l=arch}} (Klein) | * {{armh|Cortex-A510|l=arch}} (Klein) | ||
| − | * {{armh|Hayes|l=arch}} | + | * {{armh|Cortex-A520|l=arch}} ({{armh|Hayes|l=arch}}) |
| + | * {{armh|Cortex-A530|l=arch}} (Nevis) | ||
| + | |||
'''Mid-Range''' | '''Mid-Range''' | ||
* <s>{{armh|Cortex-A12|l=arch}}</s> (Owl) | * <s>{{armh|Cortex-A12|l=arch}}</s> (Owl) | ||
* {{armh|Cortex-A17|l=arch}} (Owl) | * {{armh|Cortex-A17|l=arch}} (Owl) | ||
| + | |||
'''[[big core|Big]]:''' | '''[[big core|Big]]:''' | ||
* {{armh|Cortex-A15|l=arch}} (Eagle) | * {{armh|Cortex-A15|l=arch}} (Eagle) | ||
* {{armh|Cortex-A57|l=arch}} (Atlas) | * {{armh|Cortex-A57|l=arch}} (Atlas) | ||
| + | * {{armh|Cortex-A65|l=arch}} ({{armh|Helios|l=arch}}) ? | ||
* {{armh|Cortex-A72|l=arch}} (Maia) | * {{armh|Cortex-A72|l=arch}} (Maia) | ||
* {{armh|Cortex-A73|l=arch}} (Artemis) | * {{armh|Cortex-A73|l=arch}} (Artemis) | ||
| Line 138: | Line 148: | ||
* {{armh|Cortex-A77|l=arch}} (Deimos) | * {{armh|Cortex-A77|l=arch}} (Deimos) | ||
* {{armh|Cortex-A78|l=arch}} (Hercules) | * {{armh|Cortex-A78|l=arch}} (Hercules) | ||
| + | |||
* {{armh|Cortex-A710|l=arch}} (Matterhorn) | * {{armh|Cortex-A710|l=arch}} (Matterhorn) | ||
* {{armh|Cortex-A715|l=arch}} (Makalu) | * {{armh|Cortex-A715|l=arch}} (Makalu) | ||
| − | * {{armh|Hunter|l=arch}} | + | * {{armh|Cortex-A720|l=arch}} ({{armh|Hunter|l=arch}}) |
| − | * {{armh|Chaberton|l=arch}} | + | * {{armh|Cortex-A725|l=arch}} ({{armh|Chaberton|l=arch}}) |
| + | * {{armh|Cortex-A730|l=arch}} (Gelas) | ||
| + | |||
| + | * {{armh|Cortex-A78C|l=arch}} (Hera Prime) | ||
| − | |||
'''[[big core|Bigger]]:''' | '''[[big core|Bigger]]:''' | ||
| − | * {{armh|Cortex-X1|l=arch}} (Hera) | + | * {{armh|Cortex-X1|l=arch}} ({{armh|Hera|l=arch}}) |
| − | * {{armh|Cortex-X2|l=arch}} (Matterhorn-ELP) | + | * {{armh|Cortex-X2|l=arch}} ({{armh|Matterhorn-ELP|l=arch}}) |
| − | * {{armh|Cortex-X3|l=arch}} (Makalu-ELP) | + | * {{armh|Cortex-X3|l=arch}} ({{armh|Makalu-ELP|l=arch}}) |
| − | * {{armh|Hunter-ELP|l=arch}} | + | * {{armh|Cortex-X4|l=arch}} ({{armh|Hunter-ELP|l=arch}}) |
| − | * {{armh|Chaberton-ELP|l=arch}} | + | * <s>Cortex-X5 ({{armh|Chaberton-ELP|l=arch}})</s> |
| + | * {{armh|Cortex-X925|l=arch}} (Blackhawk) | ||
| + | * {{armh|Cortex-X930|l=arch}} (Travis) | ||
* {{armh|Cortex-X1C|l=arch}} (Hera-C) | * {{armh|Cortex-X1C|l=arch}} (Hera-C) | ||
| + | |||
'''Autonomous Machines:''' | '''Autonomous Machines:''' | ||
| + | * {{armh|Cortex-A65AE|l=arch}} (Helios-SL) | ||
* {{armh|Cortex-A76AE|l=arch}} (Enyo-SL) | * {{armh|Cortex-A76AE|l=arch}} (Enyo-SL) | ||
* {{armh|Cortex-A78AE|l=arch}} (Hercules-AE) | * {{armh|Cortex-A78AE|l=arch}} (Hercules-AE) | ||
| − | * | + | |
| − | + | * Cortex-A520AE (Hayes-AE) | |
| + | * Cortex-A720AE (Hunter-AE) | ||
}} | }} | ||
| + | }} | ||
=== {{\|Neoverse}} === | === {{\|Neoverse}} === | ||
| Line 166: | Line 185: | ||
| | | | ||
{{collist | {{collist | ||
| − | | count = | + | | count = 3 |
| style= margin-left: 20px; | | style= margin-left: 20px; | ||
| | | | ||
'''Performance''' | '''Performance''' | ||
| − | * {{armh| | + | * {{armh|Neoverse N1|l=arch}} ({{armh|Ares|l=arch}}) • [[Graviton 2]] |
| − | * {{armh|Neoverse | + | * {{armh|Neoverse N2|l=arch}} ({{armh|Perseus|l=arch}}) |
| − | * {{armh|Neoverse | + | * {{armh|Neoverse N3|l=arch}} (Hermes) |
| − | * {{armh| | + | * {{armh|Neoverse N4|l=arch}} (Dionysus) |
| + | * {{armh|Cosmos|l=arch}} (A72/A75) ? | ||
| + | |||
'''HPC''' | '''HPC''' | ||
| − | * {{armh|Neoverse V1|l=arch}} (Zeus) | + | * {{armh|Neoverse V1|l=arch}} ({{armh|Zeus|l=arch}}) • [[Graviton 3]] |
| − | * {{armh|Demeter|l=arch}} | + | * {{armh|Neoverse V2|l=arch}} ({{armh|Demeter|l=arch}}) • [[Graviton 4]] |
| + | * {{armh|Neoverse V3|l=arch}} ({{armh|Poseidon|l=arch}}) | ||
| + | * Neoverse V3AE (Autonome) | ||
| + | * Neoverse VN (Automobile) | ||
| + | * {{armh|Neoverse V4|l=arch}} (Adonis) | ||
| + | |||
'''Throughput''' | '''Throughput''' | ||
| − | * {{armh|Neoverse E1|l=arch}} (Helios) | + | * {{armh|Neoverse E1|l=arch}} ({{armh|Helios|l=arch}}) ? |
| + | * {{armh|Neoverse E2|l=arch}} (A510) | ||
| + | * {{armh|Neoverse E3|l=arch}} (Aphrodite) | ||
| + | * {{armh|Neoverse E4|l=arch}} (Lycius) | ||
}} | }} | ||
}} | }} | ||
Latest revision as of 20:45, 8 February 2025
| Arm Holdings | |
| |
| Type | Public |
| Founded | November 27, 1990 |
| Founder | Jamie Urquhart Mike Muller Tudor Brown Lee Smith John Biggs Harry Oldham Dave Howard Pete Harrod Harry Meekings Al Thomas Andy Merritt |
| Headquarters | Cambridge, England |
| Website | http://www.arm.com |
Arm Holdings, usually simply Arm (previously ARM), is a British multinational semiconductor and software design company. ARM was spun-off from Acorn Computers in November 1990 as Advanced RISC Machines, Ltd. (ARM, Ltd.) as a joint venture between Acorn Computers, Apple Computer, and VLSI Technology.
Contents
Design Groups[edit]
Arm processors can largely be grouped into the three design teams that design them in parallel:
- Austin (Texas)
- Sophia-Antipolis (France)
- Cambridge (UK)
Microarchitectures[edit]
Classic[edit]
Cortex[edit]
Real-Time
Functional Safety:
- Cortex-R4 (Serval-E)
- Cortex-R5
- Cortex-R52
- Cortex-R52+
Storage/Modem:
- Cortex-R7
- Cortex-R8
- Cortex-R82
- Cortex-R82AE
Microcontroller
FPGA:
- Cortex-M1 (Proteus)
LP/Area:
- Cortex-M0 (Swift)
- Cortex-M0+ (Flycatcher)
- Cortex-M23 (Grebe)
Performance/efficiency:
- Cortex-M3 (Sandcat)
- Cortex-M4 (Merlin)
- Cortex-M33 (Teal)
- Cortex-M35P (Tahan)
High Performance:
- Cortex-M7 (Pelican)
- Cortex-M52
- Cortex-M55 (Yamin)
- Cortex-M85
Mainstream
ULP:
- Cortex-A5 (Sparrow)
- Cortex-A32 (Minerva)
- Cortex-A34 (Metis)
- Cortex-A35 (Mercury)
- Cortex-A7 (Kingfisher)
- Cortex-A53 (Apollo)
- Cortex-A55 (Ananke)
- Cortex-A510 (Klein)
- Cortex-A520 (Hayes)
- Cortex-A530 (Nevis)
Mid-Range
-
Cortex-A12(Owl) - Cortex-A17 (Owl)
Big:
- Cortex-A15 (Eagle)
- Cortex-A57 (Atlas)
- Cortex-A65 (Helios) ?
- Cortex-A72 (Maia)
- Cortex-A73 (Artemis)
- Cortex-A75 (Prometheus)
- Cortex-A76 (Enyo)
- Cortex-A77 (Deimos)
- Cortex-A78 (Hercules)
- Cortex-A710 (Matterhorn)
- Cortex-A715 (Makalu)
- Cortex-A720 (Hunter)
- Cortex-A725 (Chaberton)
- Cortex-A730 (Gelas)
- Cortex-A78C (Hera Prime)
- Cortex-X1 (Hera)
- Cortex-X2 (Matterhorn-ELP)
- Cortex-X3 (Makalu-ELP)
- Cortex-X4 (Hunter-ELP)
-
Cortex-X5 (Chaberton-ELP) - Cortex-X925 (Blackhawk)
- Cortex-X930 (Travis)
- Cortex-X1C (Hera-C)
Autonomous Machines:
- Cortex-A65AE (Helios-SL)
- Cortex-A76AE (Enyo-SL)
- Cortex-A78AE (Hercules-AE)
- Cortex-A520AE (Hayes-AE)
- Cortex-A720AE (Hunter-AE)
Neoverse[edit]
Servers
Performance
- Neoverse N1 (Ares) • Graviton 2
- Neoverse N2 (Perseus)
- Neoverse N3 (Hermes)
- Neoverse N4 (Dionysus)
- Cosmos (A72/A75) ?
HPC
- Neoverse V1 (Zeus) • Graviton 3
- Neoverse V2 (Demeter) • Graviton 4
- Neoverse V3 (Poseidon)
- Neoverse V3AE (Autonome)
- Neoverse VN (Automobile)
- Neoverse V4 (Adonis)
Throughput
- Neoverse E1 (Helios) ?
- Neoverse E2 (A510)
- Neoverse E3 (Aphrodite)
- Neoverse E4 (Lycius)
Other[edit]
GPUs[edit]
Architectures[edit]
GPU:
ISAs[edit]
Other topics[edit]
See Also[edit]
Facts about "ARM Holdings"
| company type | public + |
| founded | November 27, 1990 + |
| founder | Jamie Urquhart +, Mike Muller +, Tudor Brown +, Lee Smith +, John Biggs +, Harry Oldham +, Dave Howard +, Pete Harrod +, Harry Meekings +, Al Thomas + and Andy Merritt + |
| full page name | arm holdings + |
| headquarters | Cambridge, England + |
| instance of | semiconductor company + |
| name | Arm Holdings + |
| website | http://www.arm.com + |
| wikidata id | Q296782 + |