• intel/mcs-4/4004
  ...|| rowspan="4" | Bidirectional data bus pins || rowspan="4" | Address and data communication to the ROM and RAM occurs on D0-D3. | 11 || CM-ROM || CM-ROM output || ROM selection signal used to retrieve data from memory.
  5 KB (748 words) - 21:37, 21 November 2021
• intel/core i7
  ...essors are [[quad-core]] processors. These processors had the [[front-side bus|FSB]] replaced with {{intel|Direct Media Interface}} 1.0. All processors us * '''Bus:''' {{intel|DMI}} (2.5 GT/s) interface
  43 KB (5,739 words) - 21:30, 22 April 2024
• microprocessor
  ...circuits operating as a cohesive unit, designed for the processing digital data. ...oadest sense, their basic functionality is to continuously read in digital data consisting of instructions and possibly values; execute them by interpretin
  8 KB (1,149 words) - 00:41, 16 September 2019
• multiplexer
  A '''multiplexer''' ('''mux''') or a '''data selector''' or '''input selector''' is a [[combinational circuit]] device t ...single destination. Multiplexers are also heavily used in I/O operations, data buses, and register files. Additionally multiplexers have also found their
  10 KB (1,445 words) - 11:53, 18 November 2018
• read-only register
  ...gisters]], [[hardware timers]], [[counters]], and [[bus|data buses]] where data is only transmitted. Attempting to write to such registers typically result
  676 bytes (92 words) - 20:32, 31 July 2017
• amd/am2900
  ...division. The slices can be stacked to produce any multiple of 4-bit wide data path (8, 12, 16, 32, etc. bits) and memory address for use in larger system | {{\|AM2905}} || Quad 2-input bus transceiver || 24
  9 KB (1,061 words) - 22:55, 18 June 2019
• intel/3000
  | {{\|3216}} || Noninverting bidirectional bus driver | {{\|3226}} || Inverting bidirectional bus driver
  3 KB (308 words) - 05:03, 18 February 2020
• rockwell international/pps-4
  | {{\|10731}} || com data interface || | {{\|10738}} || Bus I/O ||
  3 KB (359 words) - 17:26, 19 May 2016
• intel/atom
  This table is generated automatically from the data in the actual articles. ...-header"><th>&nbsp;</th><th colspan="8">Main processor</th><th colspan="2">Bus</th><th colspan="3">Features</th></tr>
  17 KB (2,292 words) - 09:32, 16 July 2019
• amd/athlon
  ...ble data rate [[front side bus]] operating at 100 MHz (having an effective bus speed of 200 MHz). Argon microprocessors were manufactured in 250 nm proces ...ble data rate [[front side bus]] operating at 100 MHz (having an effective bus speed of 200 MHz). Pluto microprocessors were manufactured in 180 nm proces
  10 KB (1,163 words) - 10:41, 26 February 2019
• amd/am9080
  This table is generated automatically from the data in the actual articles. | {{\|Am8228}} || system controller & bus driver
  5 KB (683 words) - 23:46, 7 March 2018
• intel/mcs-8/isa
  | data size = 8 bit This ISA has an {{arch|8}} data and address bus. This architecture included seven 8-bit registers, 48 instructions, and int
  13 KB (2,079 words) - 09:11, 29 September 2019
• intel/microarchitectures/bonnell
  ...MT/s dual mode ([[gunning transceiver logic|GTL]] & [[CMOS]]) [[front side bus|FSB]] ** L1 Data Cache
  38 KB (5,468 words) - 20:29, 23 May 2019
• intel/microarchitectures/silvermont
  * {{x86|PREFETCHW|<code>PREFETCHW</code>}} - Prefetch data into caches, hinting a write is expected in the future ...by integrating and other support chips on-die, it still used a Front Side Bus implementation to talk to North Bridge. In Silvermont, this was replaced wi
  9 KB (1,160 words) - 09:35, 25 September 2019
• intel/pentium (2009)
  ...essors are [[dual-core]] processors. These processors had the [[front-side bus|FSB]] replaced with {{intel|Direct Media Interface}} 1.0. These processors * '''Bus:''' {{intel|DMI}} (2.5 GT/s) interface
  20 KB (2,661 words) - 00:45, 11 October 2017
• intel/celeron
  ...essors are [[dual-core]] processors. These processors had the [[front-side bus|FSB]] replaced with {{intel|Direct Media Interface}} 1.0. These processors * '''Bus:''' {{intel|DMI}} (2.5 GT/s) interface
  25 KB (3,201 words) - 03:13, 22 September 2018
• intel/microarchitectures/sandy bridge (client)
  ** New SVID (Serial Voltage ID bus) ...sists of dedicated L1 TLB for instruction cache (ITLB) and another one for data cache (DTLB). Additionally there is a unified L2 TLB (STLB).
  84 KB (13,075 words) - 00:54, 29 December 2020
• intel/microarchitectures/skylake (client)
  ** Bus/Interface to Chipset ...sists of dedicated L1 TLB for instruction cache (ITLB) and another one for data cache (DTLB). Additionally there is a unified L2 TLB (STLB).
  79 KB (11,922 words) - 06:46, 11 November 2022
• intel/microarchitectures/kaby lake
  ...sists of dedicated L1 TLB for instruction cache (ITLB) and another one for data cache (DTLB). Additionally there is a unified L2 TLB (STLB). ...} are a two-chip solution linked together via Intel's standard [[DMI 3.0]] bus interface which utilizes 4 of the CPU's 20 [[PCIe]] 3.0 lanes (having a tra
  38 KB (5,431 words) - 10:41, 8 April 2024
• intel/microarchitectures/ice lake (client)
  ** 1.4x higher data rates (3733 MT/s, up from 2666 MT/s) ...nit in the processor. All clock domains are some multiple of the [virtual] bus clock ([[BCLK]]).
  23 KB (3,613 words) - 12:31, 20 June 2021
• intel/mobile pentium ii
  ...l keeping everything closely tied together with respect to the [[back-side bus]]. The separate (slower) cache die also meant the processor was cheaper to This table is generated automatically from the data in the actual articles.
  5 KB (635 words) - 09:54, 11 November 2017
• intel/80386
  ! Model !! Introduction !! Ext. Bus !! Frequency !! Notes ! Model !! Introduction !! Ext. Bus !! Frequency !! Notes
  4 KB (400 words) - 08:43, 5 December 2022
• intel/80486
  ...tly used data and instructions. Various enhancements were also made to the bus interface including faster communication that required single clock cycle i This table is generated automatically from the data in the actual articles.
  8 KB (953 words) - 08:27, 29 October 2022
• intel/80486/486gx-33
  | bus type = FSB | bus speed = 33 MHz
  2 KB (214 words) - 16:13, 13 December 2017
• intel/core i3
  ...essors are [[dual-core]] processors. These processors had the [[front-side bus|FSB]] replaced with {{intel|Direct Media Interface}} 1.0. These processors This table is generated automatically from the data in the actual articles.
  25 KB (3,397 words) - 03:12, 3 October 2022
• intel/core i5
  ...essors are [[dual-core]] processors. These processors had the [[front-side bus|FSB]] replaced with {{intel|Direct Media Interface}} 1.0 and introduced {{x * '''Bus:''' {{intel|DMI}} (2.5 GT/s) interface
  34 KB (4,663 words) - 20:38, 20 February 2023
• amd/am486
  ...versions introduced had lower clock frequency which matched their external bus speed. Later versions introduced a [[clock multiplier]]: DX2 having a multi This table is generated automatically from the data in the actual articles.
  13 KB (1,897 words) - 09:30, 21 July 2021
• amd/am5x86
  ...nce comparable to the Pentium-75. The clock multiplier was set to x4 (e.g. bus speed of 33 MHz would have a core frequency of 133 MHz). Essentially, one c This table is generated automatically from the data in the actual articles.
  7 KB (1,043 words) - 16:50, 14 June 2020
• amd/am286
  This table is generated automatically from the data in the actual articles. <tr><th>Model</th><th>Launched</th><th>Process</th><th>Freq</th><th>Bus</th><th>Max Mem</th><th>Package</th><th>Power</th><th>Min T_case<
  9 KB (1,192 words) - 01:35, 29 May 2016
• amd/am286zx-lx
  ...amd|Am286#Low-power CMOS models|from the Am286 family}} and incorporated a bus controller, DMA controller, interrupt controller, and clock generator. The This table is generated automatically from the data in the actual articles.
  5 KB (750 words) - 21:22, 24 May 2016
• amd/am186
  This table is generated automatically from the data in the actual articles. <tr><th>Model</th><th>Launched</th><th>Process</th><th>Freq</th><th>Bus</th><th>Max Mem</th><th>Package</th><th>Power</th><th>Min T_case<
  5 KB (602 words) - 18:20, 3 June 2016
• amd/am186ex
  This table is generated automatically from the data in the actual articles. <tr><th>Model</th><th>Launched</th><th>Freq</th><th>Bus</th><th>Max Mem</th><th>V_CORE<th>Package</th><th>Min T<sub>case<
  9 KB (1,276 words) - 16:07, 28 June 2016
• amd/am186cx
  ...herals such as [[High-Level Data Link Control]] (HDLC), [[Universal Serial Bus]] (USB), High-Speed [[UART]], and [[Synchronous Serial Interface]] (SSI). * Multiplexed and nonmultiplexed address/data bus
  7 KB (962 words) - 04:25, 22 June 2017
• amd/am186cx/am186cu-25kc\w
  | bus type = | bus speed = 6.25 MHz
  4 KB (364 words) - 16:51, 30 June 2017
• amd/am186cx/am186cu-40kc\w
  | bus type = | bus speed = 10 MHz
  3 KB (364 words) - 16:51, 30 June 2017
• amd/am186cx/am186cu-50kc\w
  | bus type = | bus speed = 12.5 MHz
  4 KB (364 words) - 16:52, 30 June 2017
• amd/am186cx/am186cu-25ki\w
  | bus type = | bus speed = 6.25 MHz
  4 KB (374 words) - 16:51, 30 June 2017
• amd/am186cx/am186cu-40ki\w
  | bus type = | bus speed = 10 MHz
  4 KB (374 words) - 16:52, 30 June 2017
• amd/am186cx/am186ch-25kc\w
  | bus type = | bus speed = 6.25 MHz
  3 KB (367 words) - 16:50, 30 June 2017
• amd/am186cx/am186ch-40kc\w
  | bus type = | bus speed = 10 MHz
  3 KB (367 words) - 16:51, 30 June 2017
• amd/am186cx/am186ch-50kc\w
  | bus type = | bus speed = 12.5 MHz
  3 KB (367 words) - 16:51, 30 June 2017
• amd/am186cx/am186ch-25ki\w
  | bus type = | bus speed = 6.25 MHz
  4 KB (378 words) - 16:50, 30 June 2017
• amd/am186cx/am186ch-40ki\w
  | bus type = | bus speed = 10 MHz
  4 KB (378 words) - 16:51, 30 June 2017
• amd/am186cx/am186cc-25kc\w
  | bus type = | bus speed = 6.25 MHz
  4 KB (390 words) - 16:49, 30 June 2017
• amd/am186cx/am186cc-40kc\w
  | bus type = | bus speed = 10 MHz
  4 KB (390 words) - 16:50, 30 June 2017
• amd/am186cx/am186cc-50kc\w
  | bus type = | bus speed = 12.5 MHz
  4 KB (390 words) - 16:50, 30 June 2017
• amd/am186cx/am186cc-25ki\w
  | bus type = | bus speed = 6.25 MHz
  4 KB (402 words) - 16:50, 30 June 2017
• amd/am186cx/am186cc-40ki\w
  | bus type = | bus speed = 10 MHz
  4 KB (402 words) - 16:50, 30 June 2017
• amd/am8086
  This table is generated automatically from the data in the actual articles. <tr><th>Model</th><th>Launched</th><th>Process</th><th>Freq</th><th>Bus</th><th>Max Mem</th><th>Package</th><th>Power</th><th>Min T_case<
  5 KB (616 words) - 14:24, 1 May 2019
• intel/xeon e7/e7-4807
  | bus type = QPI | bus speed =
  4 KB (473 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-2803
  | bus type = QPI | bus speed =
  4 KB (475 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-8830
  | bus type = QPI | bus speed =
  4 KB (520 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-8837
  | bus type = QPI | bus speed =
  4 KB (528 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-4820
  | bus type = QPI | bus speed =
  4 KB (520 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-4830
  | bus type = QPI | bus speed =
  4 KB (522 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-2820
  | bus type = QPI | bus speed =
  4 KB (518 words) - 05:10, 18 February 2020
• intel/xeon e7/e7-2830
  | bus type = QPI | bus speed =
  4 KB (518 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-8850
  | bus type = QPI | bus speed =
  4 KB (539 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-8870
  | bus type = QPI | bus speed =
  4 KB (539 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-4850
  | bus type = QPI | bus speed =
  4 KB (539 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-8867l
  | bus type = QPI | bus speed =
  4 KB (542 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-8860
  | bus type = QPI | bus speed =
  4 KB (539 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-4860
  | bus type = QPI | bus speed =
  4 KB (539 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-2860
  | bus type = QPI | bus speed =
  4 KB (537 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-4870
  | bus type = QPI | bus speed =
  4 KB (541 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-2850
  | bus type = QPI | bus speed =
  4 KB (537 words) - 16:28, 13 December 2017
• intel/xeon e7/e7-2870
  | bus type = QPI | bus speed =
  4 KB (537 words) - 16:28, 13 December 2017
• uc davis/kilocore
  | bus type = | bus speed =
  8 KB (1,031 words) - 14:09, 10 May 2019
• mathstar/builder
  Inter-Object communication was done primarily by passing data to the nearest neighbor through a unidirectional synchronous interconnect. ** Configurable 20 or 40-bit data
  5 KB (596 words) - 21:23, 19 November 2017
• amd/k5
  This table is generated automatically from the data in the actual articles. ...>Model</th><th>Launched</th><th>Process</th><th>Freq</th><th>Mult.</th><th>Bus</th><th>Max Mem</th><th>V_CORE</th><th>Package</th><th>Min T<sub>
  8 KB (1,002 words) - 22:19, 17 June 2022
• exponential technology/x704
  This table is generated automatically from the data in the actual articles. ...EE 754-compliant [[microprocessor]] operating at over 400 MHz supporting a bus at up to 100 MHz.
  8 KB (1,228 words) - 20:49, 2 June 2019
• exponential technology/x704/410
  | bus type = 60x bus | bus speed = 100 MHz
  3 KB (359 words) - 16:13, 13 December 2017
• exponential technology/x704/533
  | bus type = 60x bus | bus speed = 100 MHz
  3 KB (337 words) - 16:13, 13 December 2017
• exponential technology/x704/500
  | bus type = 60x bus | bus speed = 100 MHz
  3 KB (331 words) - 16:13, 13 December 2017
• exponential technology/x704/466
  | bus type = 60x bus | bus speed = 100 MHz
  3 KB (331 words) - 16:13, 13 December 2017
• intrinsity/fastmath/fastmath-1.5
  | bus type = RapidIO | bus speed = 500 MHz
  3 KB (317 words) - 16:30, 13 December 2017
• intrinsity/fastmath/fastmath-2
  | bus type = RapidIO | bus speed = 500 MHz
  3 KB (318 words) - 16:30, 13 December 2017
• intrinsity/fastmath/fastmath-lp
  | bus type = RapidIO | bus speed = 500 MHz
  3 KB (334 words) - 16:31, 13 December 2017
• intrinsity/fastmath/fastmath-3
  | bus type = RapidIO | bus speed = 500 MHz
  3 KB (306 words) - 16:31, 13 December 2017
• amd/k6
  ...ign underwent a number of small modifications: the chip was modified to be bus and pin-compatible with Intel's Pentium, making it a drop-in replacement/al ...was AMD's '''K6''' - an entirely [[NexGen]]'s designed microarchitecture, bus-compatible, pin-compatible, and software-compatible with Intel's Pentium in
  8 KB (1,156 words) - 23:10, 1 August 2016
• amd/k6/amd-k6-200afr
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (314 words) - 16:09, 13 December 2017
• amd/k6/amd-k6/266afr
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (310 words) - 16:09, 13 December 2017
• amd/k6/amd-k6-233afr
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (314 words) - 16:09, 13 December 2017
• amd/k6/amd-k6/233acz
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (314 words) - 16:09, 13 December 2017
• amd/k6/amd-k6/233bcz
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (293 words) - 13:34, 18 March 2023
• amd/k6/amd-k6/266acz
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (314 words) - 16:09, 13 December 2017
• amd/k6/amd-k6/300bdz
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (293 words) - 13:34, 18 March 2023
• amd/k6/amd-k6/300adz
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (314 words) - 16:09, 13 December 2017
• amd/k6/amd-k6/266bcz
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (293 words) - 13:33, 18 March 2023
• amd/k6/amd-k6/300afr
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (329 words) - 16:09, 13 December 2017
• amd/k6-2
  ...ced a number of enhancements including support for [[Super Socket 7]] with bus speeds of up to 100 MHz and {{x86|3DNow!}} [[SIMD]] extension. Due to its a ...compatibilitiy with the older [[Socket 7]] but added support for a system bus of up to 100 MHz. Additionally support for [[accelerated graphics port|AGP]
  13 KB (1,969 words) - 18:07, 2 October 2019
• intel/microarchitectures/coffee lake
  ...sists of dedicated L1 TLB for instruction cache (ITLB) and another one for data cache (DTLB). Additionally there is a unified L2 TLB (STLB). ...ge]]. A coherent communication link was lacking and the aging [[front-side bus]] was used for as the die-to-die link. This configuration did not change th
  30 KB (4,192 words) - 13:48, 10 December 2023
• amd/ryzen 5/pro 4650u
  |bus type=PCIe 3.0 ...f up to 3200 MT/s (51.2 GB/s) or up to 32 GiB of quad-channel LPDDR4x with data rates of up to 4266 MT/s (68.27 GB/s).
  5 KB (748 words) - 00:43, 26 March 2023
• amd/ryzen 7/pro 4750u
  |bus type=PCIe 3.0 ...f up to 3200 MT/s (51.2 GB/s) or up to 32 GiB of quad-channel LPDDR4x with data rates of up to 4266 MT/s (68.27 GB/s).
  5 KB (748 words) - 00:51, 26 March 2023
• amd/k6-2/k6-2-266afr
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (344 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-300afr
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (398 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-300afr-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (381 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-333afr-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (375 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-333afr
  | bus type = FSB | bus speed = 95.33 MHz
  3 KB (387 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-350afr
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (338 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-350afq
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (338 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-366afr
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (338 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-380afr
  | bus type = FSB | bus speed = 95 MHz
  3 KB (338 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-400afr
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (364 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-400afr-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (369 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-400afq
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (364 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-400afq-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (369 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-400ahx
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (364 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-400ahx-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (368 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-450afx
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (338 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-450agx
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (338 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-450ahx
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (343 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-475afx
  | bus type = FSB | bus speed = 95 MHz
  3 KB (338 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-475ahx
  | bus type = FSB | bus speed = 95 MHz
  3 KB (338 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-500afx
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (353 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-500ahx
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (338 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-533afx
  | bus type = FSB | bus speed = 96.99 MHz
  3 KB (344 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-550afx
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (338 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-550agr
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (338 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2-337afr
  | bus type = FSB | bus speed = 75 MHz
  3 KB (336 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-350afk
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-366afk
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-380afk
  | bus type = FSB | bus speed = 95 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-400afk
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (361 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-400afk-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (361 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-400ack
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (361 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-400ack-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (362 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-433adk
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-450adk
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-475ack
  | bus type = FSB | bus speed = 95 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-500adk
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-500ack
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-475adk
  | bus type = FSB | bus speed = 95 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-450ack
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-233amz
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (339 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-266amz
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-266anz
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-266bnz
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (335 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-300amz
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-300anz
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-300anz-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (341 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-333amz
  | bus type = FSB | bus speed = 95.33 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-333amz-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (341 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-333anz
  | bus type = FSB | bus speed = 95.33 MHz
  3 KB (340 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-333anz-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (341 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-300bnz
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (335 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-300bnz-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (336 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-333bnz
  | bus type = FSB | bus speed = 95.33 MHz
  3 KB (335 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-333bnz-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (336 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2-380ack
  | bus type = FSB | bus speed = 95 MHz
  3 KB (347 words) - 16:08, 13 December 2017
• amd/k6-2/k6-2e-233afr
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (345 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-233amz
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (345 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-266afr
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (345 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-266amz
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (345 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-300afr
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (345 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-300afr-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (346 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-300amz
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (345 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-300amz-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (346 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-333afr
  | bus type = FSB | bus speed = 95.33 MHz
  3 KB (344 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-333afr-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (344 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-333amz
  | bus type = FSB | bus speed = 95.33 MHz
  3 KB (344 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-333amz-66
  | bus type = FSB | bus speed = 66.66 MHz
  3 KB (344 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-350afr
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (344 words) - 16:09, 13 December 2017
• amd/k6-2/k6-2e-350amz
  | bus type = FSB | bus speed = 99.99 MHz
  3 KB (344 words) - 16:09, 13 December 2017
• amd/k6-iii
  This table is generated automatically from the data in the actual articles. ...>Model</th><th>Launched</th><th>Process</th><th>Freq</th><th>Mult.</th><th>Bus</th><th>Max Mem</th><th>V_CORE</th><th>Package</th><th>Min T<sub>
  9 KB (1,264 words) - 02:29, 19 January 2017
• amd/duron
  ...sors shared the same specs as Athlon - including a higher speed of 100 MHz bus DDR (200 MT/s). Additionally, Intel used the same production for both Celer | desc 8 = '''Max [[front size bus|FSB]]'''<br><table><tr><td style="width: 55px;">'''B'''</td><td>200 MT/s</t
  19 KB (2,874 words) - 17:30, 3 December 2016
• p-rating
  This table is generated automatically from the data in the actual articles. .../th><th>Family</th><th>Launched</th><th>P-Rating</th><th>Frequency</th><th>Bus</th></tr>
  3 KB (456 words) - 06:30, 8 July 2020
• amd/duron/d550aut1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (423 words) - 16:07, 13 December 2017
• amd/duron/d600aut1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (438 words) - 16:07, 13 December 2017
• amd/duron/d650aut1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (423 words) - 16:07, 13 December 2017
• amd/duron/d700aut1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (423 words) - 16:07, 13 December 2017
• amd/duron/d750aut1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (423 words) - 16:07, 13 December 2017
• amd/duron/d800aut1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (438 words) - 16:07, 13 December 2017
• amd/duron/d850aut1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (423 words) - 16:07, 13 December 2017
• amd/duron/d950aut1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (422 words) - 16:07, 13 December 2017
• amd/duron/d900aut1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (437 words) - 16:07, 13 December 2017
• amd/duron/d700ast1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (427 words) - 16:07, 13 December 2017
• amd/duron/d600ast1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (419 words) - 16:07, 13 December 2017
• amd/duron/d650ast1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (419 words) - 16:07, 13 December 2017
• amd/duron/d750ast1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (419 words) - 16:07, 13 December 2017
• amd/duron/d700avs1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (419 words) - 16:07, 13 December 2017
• amd/duron/d800avs1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (419 words) - 16:07, 13 December 2017
• amd/microarchitectures/k7
  ...core}} || {{amd|Duron}} || 2nd generation Duron, introduced SSE & Hardware data prefetcher * System Bus
  6 KB (923 words) - 16:48, 3 March 2022
• amd/microarchitectures/zen
  ** Better L1$ and L2$ data prefetcher ...ailure correction (Chipkill), x8 SEC-DED ECC, Patrol and Demand scrubbing, Data poisoning
  79 KB (12,095 words) - 15:27, 9 June 2023
• amd/microarchitectures/zen 2
  ...error causes a machine check exception, the core recovers by reloading the data from memory. The caches are ECC protected to correct single (and double?) b ...imilarly predicts dependencies between stores and loads accessing the same data in memory, e.g. local variables. Both functions use memory renaming to faci
  57 KB (8,701 words) - 22:11, 9 October 2022
• amd/k6-iii+
  This table is generated automatically from the data in the actual articles. ...>Model</th><th>Launched</th><th>Process</th><th>Freq</th><th>Mult.</th><th>Bus</th><th>Max Mem</th><th>V_CORE</th><th>Package</th><th>Min T<sub>
  5 KB (730 words) - 19:14, 27 October 2018
• amd/k6-2+/k6-2e+-500acr
  |bus type=FSB |bus speed=100 MHz
  2 KB (299 words) - 06:06, 24 March 2023
• amd/duron/dhd900amt1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (434 words) - 16:07, 13 December 2017
• amd/duron/dhd950amt1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (434 words) - 16:07, 13 December 2017
• amd/duron/dhd1000amt1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (434 words) - 16:07, 13 December 2017
• amd/duron/dhd1100amt1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (434 words) - 16:07, 13 December 2017
• amd/duron/dhd1200amt1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (456 words) - 16:07, 13 December 2017
• amd/duron/dhd1300amt1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (445 words) - 16:07, 13 December 2017
• amd/cores/spitfire
  This table is generated automatically from the data in the actual articles. ...egment</th><th>Launched</th><th>Process</th><th>Freq</th><th>Mult.</th><th>Bus</th><th>Max Mem</th><th>V_CORE</th><th>Package</th><th>Min T<sub>
  2 KB (308 words) - 18:31, 23 October 2016
• amd/cores/morgan
  ...nm process]]. Morgan introduced support for {{x86|SSE}} as well as a cache data hardware prefetcher. * Cache data hardware prefetcher
  3 KB (350 words) - 17:29, 3 December 2016
• amd/duron/dhd1400dlv1c
  | bus type = FSB | bus speed = 133.33 MHz
  4 KB (414 words) - 16:07, 13 December 2017
• amd/duron/dhd1600dlv1c
  | bus type = FSB | bus speed = 133.33 MHz
  4 KB (429 words) - 16:07, 13 December 2017
• amd/duron/dhd1800dlv1c
  | bus type = FSB | bus speed = 133.33 MHz
  4 KB (414 words) - 16:07, 13 December 2017
• amd/cores/applebred
  * Cache data hardware prefetcher This table is generated automatically from the data in the actual articles.
  3 KB (369 words) - 15:04, 7 November 2016
• amd/duron/dhm1300alq1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (403 words) - 16:07, 13 December 2017
• amd/duron/dhm1200aqq1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (403 words) - 16:07, 13 December 2017
• amd/duron/dhm1100ahq1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (403 words) - 16:07, 13 December 2017
• amd/duron/dhm1000avs1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (409 words) - 16:07, 13 December 2017
• amd/duron/dhm0950aqs1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (409 words) - 16:07, 13 December 2017
• amd/duron/dhm0900aqs1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (409 words) - 16:07, 13 December 2017
• amd/duron/dhm0850als1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (409 words) - 16:07, 13 December 2017
• amd/duron/dhm0850avs1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (409 words) - 16:07, 13 December 2017
• amd/duron/dhm0800als1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (409 words) - 16:07, 13 December 2017
• amd/duron/dhg0800avs1b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (406 words) - 16:07, 13 December 2017
• amd/duron/dhm0800avs1bm
  | bus type = FSB | bus speed = 100 MHz
  4 KB (443 words) - 16:07, 13 December 2017
• amd/duron/dhm0850avs1bm
  | bus type = FSB | bus speed = 100 MHz
  4 KB (443 words) - 16:07, 13 December 2017
• amd/athlon mp
  ...[[chipset]]. {{amd|AMD-760MP}} supports one- and two-way setups and Double Data Rate (DDR) memory operating at 133 MHz. At the time, AMD's vice president f ...({{decc|EV6}} system bus), Athlon MP operate on a 133 MHz FSB DDR (double data rate) yielding an effective 266 MT/s transfer rate (note that 'B' models op
  11 KB (1,571 words) - 18:57, 17 November 2016
• amd/athlon mp/ahx1000ams3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (542 words) - 15:20, 13 December 2017
• amd/athlon mp/ahx1200ans3b
  | bus type = FSB | bus speed = 100 MHz
  4 KB (538 words) - 15:20, 13 December 2017
• amd/athlon mp/ahx1200ams3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (542 words) - 15:20, 13 December 2017
• amd/athlon mp/ahx1200dhs3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (500 words) - 15:20, 13 December 2017
• amd/athlon mp/amp1500dms3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (508 words) - 15:20, 13 December 2017
• amd/athlon mp/amp2000dms3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (508 words) - 15:20, 13 December 2017
• amd/athlon mp/amp1600dms3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (508 words) - 15:20, 13 December 2017
• amd/athlon mp/amp1800dms3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (508 words) - 15:20, 13 December 2017
• amd/athlon mp/amp1900dms3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (508 words) - 15:20, 13 December 2017
• amd/athlon mp/amp2100dms3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (508 words) - 15:20, 13 December 2017
• amd/athlon mp/amsn2000dut3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (494 words) - 15:20, 13 December 2017
• amd/athlon mp/amsn2000dkt3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (492 words) - 15:20, 13 December 2017
• amd/athlon mp/amsn2200dkt3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (493 words) - 15:20, 13 December 2017
• amd/athlon mp/amsn2400dkt3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (494 words) - 15:20, 13 December 2017
• amd/athlon mp/amsn2400dut3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (492 words) - 15:20, 13 December 2017
• amd/athlon mp/amsn2600dkt3c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (494 words) - 15:20, 13 December 2017
• amd/athlon mp/amsn2800dut4c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (488 words) - 15:20, 13 December 2017
• amd/athlon mp/amsn2600dut4c
  | bus type = FSB | bus speed = 133 MHz
  4 KB (488 words) - 15:20, 13 December 2017
• cavium/microarchitectures/cnmips
  Note that the [[L2$]] is shared across all the cores over a coherent bus operating at the core's native clock frequency of 600 MHz for a theoretical This table is generated automatically from the data in the actual articles.
  7 KB (870 words) - 19:38, 23 June 2017
• cavium/octeon
  ...eted towards makers of network infrastructure (commercial, enterprise, and data center switches, routers, etc..). Cavium offers OCTEON processors with anyw ...revision 2 implementation. OCTEON chips are found in many enterprise an [[data center]] network servers, routers, and switches as well as various high-end
  11 KB (1,489 words) - 09:25, 30 December 2020
• cavium/octeon/cn3110-300bg868-nsp
  | bus type = | bus speed =
  4 KB (474 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-400bg868-nsp
  | bus type = | bus speed =
  4 KB (471 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-500bg868-nsp
  | bus type = | bus speed =
  4 KB (471 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-550bg868-nsp
  | bus type = | bus speed =
  4 KB (474 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-300bg868-exp
  | bus type = | bus speed =
  4 KB (453 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-400bg868-exp
  | bus type = | bus speed =
  4 KB (450 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-500bg868-exp
  | bus type = | bus speed =
  4 KB (450 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-550bg868-exp
  | bus type = | bus speed =
  4 KB (453 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-300bg868-scp
  | bus type = | bus speed =
  4 KB (463 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-400bg868-scp
  | bus type = | bus speed =
  4 KB (460 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-500bg868-scp
  | bus type = | bus speed =
  4 KB (460 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-550bg868-scp
  | bus type = | bus speed =
  4 KB (463 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-300bg868-cp
  | bus type = | bus speed =
  4 KB (447 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-400bg868-cp
  | bus type = | bus speed =
  4 KB (444 words) - 16:10, 13 December 2017
• cavium/octeon/cn3110-500bg868-cp
  | bus type = | bus speed =
  4 KB (443 words) - 16:11, 13 December 2017
• cavium/octeon/cn3110-550bg868-cp
  | bus type = | bus speed =
  4 KB (447 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-300bg868-nsp
  | bus type = | bus speed =
  4 KB (474 words) - 16:11, 13 December 2017
• cavium/octeon/cn3120-400bg868-nsp
  | bus type = | bus speed =
  4 KB (471 words) - 16:11, 13 December 2017

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