Semiconductor & Computer Engineering
From WikiChip
Am186CH-50KC\W - AMD
| Am186CH-50KC\W | |||||||||||
| Designer | AMD | ||||||||||
| Manufacturer | AMD | ||||||||||
| Model Number | Am186CH-50KC\W | ||||||||||
| Part Number | Am186CH-50KC\W | ||||||||||
| Market | Embedded | ||||||||||
| Introduction | 1998 (launch) | ||||||||||
| General information | |||||||||||
| Family | Am186Cx | ||||||||||
| Series | Am186CH | ||||||||||
| Frequency | 50 MHz 0.05 GHz
50,000 kHz | ||||||||||
| Bus speed | 12.5 MHz 0.0125 GHz
12,500 kHz | ||||||||||
| Bus rate | 12.5 MT/s 0.0125 GT/s
12,500 kT/s | ||||||||||
| Microarchitecture | |||||||||||
| Microarchitecture | 80186 | ||||||||||
| Core name | Am186 | ||||||||||
| Process | 350 nm 0.35 μm
3.5e-4 mm | ||||||||||
| Word size | 16 bit 2 octets
4 nibbles | ||||||||||
| Core count | 1 | ||||||||||
| Max CPUs | 1 | ||||||||||
| Electrical | |||||||||||
| Vcore | 3.3 V 33 dV ± 0.3 V
330 cV 3,300 mV | ||||||||||
| Tcase | 0 °C 273.15 K – 100 °C32 °F 491.67 °R 373.15 K
212 °F 671.67 °R | ||||||||||
| Tstorage | -65 °C 208.15 K – 150 °C-85 °F 374.67 °R 423.15 K
302 °F 761.67 °R | ||||||||||
| Max Memory | 1 MiB 1,024 KiB
1,048,576 B 9.765625e-4 GiB 9.536743e-7 TiB | ||||||||||
| Pins | |||||||||||
| Pins | 160 | ||||||||||
| IRQ lines | 36 | ||||||||||
| I/O ports | 48 | ||||||||||
| Packaging | |||||||||||
| |||||||||||
Am186CH-50KC\W is a 16-bit HDLC communication microcontroller designed by AMD. This MCU implements the Am186 core operating at 50 MHz and incorporates a number of High-level Data Link Controls along with 4 dedicated DMA channels for it.
Cache[edit]
- Main article: 80186 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 0 KiB 0 B 0 MiB |
1x0 KiB |
| L2$ | 0 KiB 0 MiB 0 B 0 GiB |
1x0 KiB |
Graphics[edit]
This chip had no integrated graphics processing unit.
Features[edit]
- High-Speed UART with autobaud
- Synchronous serial interface (SSI)
- 3x programmable 16-bit timers
- Hardware watchdog timer
- 4x General-purpose DMA channels
- 48x Programmable I/O ports
- 36x maskable interrupts
- Interrupt Controller
- Integrated DRAM controller
- 14x chip selects (8x peripherals, 6x memory)
- Multiplexed and nonmultiplexed address/data bus
- 2x High-level Data Link Control (HDLC) channels
- 2x Time Slot Assigners (TSAs)
- 4x dedicated DMA channels (4x HDLC)
Documents[edit]
Datasheets[edit]
- Am186CH (May 2000); Publication #22024.
Manuals[edit]
- Am186CC/CH/CU Microcontrollers User's Manual; Publication #21914.
- Am186CC/CH/CU Microcontroller Customer Development Platform User's Manual; Publication #22002.
Facts about "Am186CH-50KC\W - AMD"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Am186CH-50KC\W - AMD#package_1 + |
| base frequency | 50 MHz (0.05 GHz, 50,000 kHz) + |
| bus rate | 12.5 MT/s (0.0125 GT/s, 12,500 kT/s) + |
| bus speed | 12.5 MHz (0.0125 GHz, 12,500 kHz) + |
| core count | 1 + |
| core name | Am186 + |
| core voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
| core voltage tolerance | 0.3 V + |
| designer | AMD + |
| family | Am186Cx + |
| first launched | 1998 + |
| full page name | amd/am186cx/am186ch-50kc\w + |
| instance of | microcontroller + |
| l1$ size | 0 KiB (0 B, 0 MiB) + |
| l2$ size | 0 MiB (0 KiB, 0 B, 0 GiB) + |
| manufacturer | AMD + |
| market segment | Embedded + |
| max case temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
| max memory | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB, 9.536743e-7 TiB) + |
| max storage temperature | 423.15 K (150 °C, 302 °F, 761.67 °R) + |
| microarchitecture | 80186 + |
| min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| min storage temperature | 208.15 K (-65 °C, -85 °F, 374.67 °R) + |
| model number | Am186CH-50KC\W + |
| name | Am186CH-50KC\W + |
| package | PQFP-160 + |
| part number | Am186CH-50KC\W + |
| pin count | 160 + |
| process | 350 nm (0.35 μm, 3.5e-4 mm) + |
| series | Am186CH + |
| word size | 16 bit (2 octets, 4 nibbles) + |