Page title matches

• ideal logic circuit
  ...[[ideal logic gate]]s - where all switching is done instantaneously. Ideal logic circuits are used in academia and test settings where the primary goal is m
  292 bytes (44 words) - 16:39, 9 November 2015
• Ideal logic circuit
  #REDIRECT [[ideal logic circuit]]
  33 bytes (4 words) - 15:08, 5 August 2018

Page text matches

• microprocessor
  ...implements the core elements of a computer system on a single [[integrated circuit]], or as a few integrated circuits operating as a cohesive unit, designed f ...[[clock generator|clock]], [[central processing unit]] (CPU), [[arithmetic logic unit]] (ALU), [[floating point unit]] (FPU), [[control unit]] (CU), [[memor
  8 KB (1,149 words) - 00:41, 16 September 2019
• multiplexer
  {{title|Multiplexer (MUX)}}{{logic device ...''') or a '''data selector''' or '''input selector''' is a [[combinational circuit]] device that selects one of ''N'' inputs and provides it on its output. A
  10 KB (1,445 words) - 11:53, 18 November 2018
• cmos/static
  '''Static [[CMOS]]''' is a [[logic gate|logic]] circuit design technique whereby the output is always strongly driven due to it alw A static CMOS circuit is composed of two networks:
  1 KB (221 words) - 18:07, 26 November 2018
• digital design
  ...al design has grown to included small [[microcontrollers]], [[programmable logic device|PLDs]] and [[soft processors]].
  682 bytes (91 words) - 12:10, 21 July 2018
• inverter
  {{title|Inverter}}{{Logic gates}} An '''Inverter''' or a '''NOT gate''', is a [[logic gate]] which implements logical negation. When the input is LOW, the output
  6 KB (983 words) - 04:50, 8 November 2015
• Ring oscillator
  A '''Ring oscillator''' is a [[sequential logic]] circuit composed of an odd number of [[inverters]] with zero inputs and one output
  191 bytes (27 words) - 19:57, 10 May 2014
• ideal logic gate
  ...milar to a [[step function]]. Such gates operate on [[truth value|discrete logic inputs]] and ignore most physical characteristics such as [[gate delay|prop ...a person to make key observations about [[ideal logic circuit|a particular circuit]] without diving into the full specifications.
  1 KB (158 words) - 22:40, 20 December 2015
• ideal logic circuit
  ...[[ideal logic gate]]s - where all switching is done instantaneously. Ideal logic circuits are used in academia and test settings where the primary goal is m
  292 bytes (44 words) - 16:39, 9 November 2015
• discrete logic
  ...vidual discrete components such as [[resistors]], [[capacitors]], discrete logic chips and single-functionality chips such as those provided by the [[7400 s Likewise, a '''discrete logic chip''' is integrated circuit that performs a single function such as [[ANDing]] or [[XORing]] two inputs
  1 KB (163 words) - 06:06, 18 December 2015
• 7400 series
  ...ntegrated circuit]]s. Chips in this series include a variety of [[discrete logic chip]]s chips such as [[and gates]] and [[or gates]] as well as [[register] While the original series was designed as [[transistor-transistor logic|TTL]] logic chips, over the years, a large number of sub-families have been introduced.
  7 KB (851 words) - 20:53, 29 July 2021
• cmos
  ...or|nMOS]]. CMOS is the dominant technology used for [[VLSI]] and [[ULSI]] circuit chips used for anywhere from [[SRAM]] to [[microcontroller]]s and [[micropr CMOS primarily makes use of what would otherwise be two separate circuit technologies - [[pmos transistor|pMOS]] and [[nMOS transistor|nMOS]]. To be
  7 KB (1,159 words) - 21:01, 8 February 2019
• logic family
  ...us '''logic sub-families''' where particular technique used to implement [[logic gates]] (e.g. [[Dynamic CMOS]] vs [[Static CMOS]]. *** [[pmos logic|p-type metal–oxide–semiconductor logic]] (pMOS)
  1 KB (145 words) - 00:40, 26 December 2015
• boolean algebra/majority function
  ...y gate]]''' is a [[logic gate]] that implements the majority function as a circuit.
  2 KB (368 words) - 21:04, 15 December 2015
• power-supply pin
  ...s''' (or '''power-supply terminals''') are [[pinout|pins]] on [[integrated circuit package]]s that go to the [[die]]'s common [[power rails]]. ...om one manufacturer to another, most terms are more common to a specific [[logic family|technology]]. Some notable exceptions are known to exist, for exampl
  1 KB (209 words) - 20:19, 26 November 2015
• boolean algebra
  ...logic''') is a [[instance of::branch of algebra]] that deals with only two logic values - [[0]] (corresponding to [[false]]) and [[1]] (corresponding to [[t ...nd [[OR]] [[logic gates|gates]] are implemented, any conceivable system of logic can be implemented using them like Lego pieces.
  32 KB (5,239 words) - 01:23, 19 May 2016
• Manchester carry-chain adder
  ...gn strategy section. The Manchester carry chain was designed using dynamic logic and implements the following logical function: ...layed as this gives us enough information about the delays incurred by the circuit.
  2 KB (421 words) - 23:00, 8 December 2015
• boolean algebra/incompletely specified function
  ...ons can be treated as either 0 or 1 depending on whichever yields a more [[logic minimization|simplified]] Boolean expression. Note that depending on the final design of the circuit, the output for <math>f(0,0,1)</math> for example may be either 0 or 1.
  2 KB (263 words) - 20:56, 15 December 2015
• relay computer
  ...Harvard Mark I.jpg|thumb|right|250px|The {{ibm|Harvard Mark I}}, a [[relay logic|relay-based]] computer, one of the earliest, made by [[Howard Aiken]] with ...]]s. From the mid 1950s onward, [[vacuum tube computer]]s superseded relay logic.
  3 KB (390 words) - 07:45, 9 March 2021
• discrete logic computer
  {{title|Discrete Logic Computer}} ...s and 60s after the [[vacuum tube]] era but before the modern [[integrated circuit]].
  526 bytes (75 words) - 03:52, 24 December 2015
• inversion bubble
  ...sion bubble''' is a [[schematic]] symbol that's used in conjunction with [[logic gate]]s that indicates the signal at that point is inverted. Inversion bubb ...w}}, one can often move the inversion bubble around in order to optimize a circuit. The ability to generate {{ba|logically equivalent|equivalent networks}} is
  1 KB (157 words) - 23:52, 20 December 2015
• ti/tmx1795
  ...would need to create a more complex integrated circuit as using [[discrete logic]] would not meet their desired specifications. After having the basic archi
  6 KB (933 words) - 16:32, 13 December 2017
• arithmetic logic unit
  {{title|Arithmetic Logic Unit (ALU)}} ...ALU''') is digital circuit that incorporates the functionality of both a [[logic unit]] and an [[arithmetic unit]], i.e. a unit capable of performing both [
  597 bytes (91 words) - 20:50, 21 April 2020
• intel/mcs-8
  ...ed the 1201 idea entirely and went with a discrete [[transistor-transistor logic|TTL]] instead.
  3 KB (382 words) - 17:58, 19 May 2016
• technology node
  ...ring process]] and its design rules. Different nodes often imply different circuit generations and architectures. Generally, the smaller the technology node m ...be and differentiate the technologies used in [[fabricating]] [[integrated circuit]]s.
  8 KB (1,225 words) - 13:48, 14 December 2022
• 32 nm lithography process
  ...40 nm lithography process|40 nm process]] stopgap. Commercial [[integrated circuit]] manufacturing using 32 nm process began in 2010. This technology was supe * Natarajan, S., et al. "A 32nm logic technology featuring 2 nd-generation high-k+ metal-gate transistors, enhanc
  10 KB (1,090 words) - 19:14, 8 July 2021
• 14 nm lithography process
  ...apple|A8}} or {{apple|A9}}. Those numbers are somewhat expected given tall logic cells are generally optimized for performance and high frequency (e.g., hig ...ss. It should be noted that in recent years, SRAM hasn't scaled as well as logic and I/O have either.
  17 KB (2,243 words) - 19:32, 25 May 2023
• 45 nm lithography process
  ...55 nm lithography process|55 nm process]] stopgap. Commercial [[integrated circuit]] manufacturing using 45 nm process began in 2007. This technology was supe ...of an [[Intel]] [[45 nm]] shuttle test chip including 153 MiB [[SRAM]] and logic test circuits
  5 KB (602 words) - 05:51, 20 July 2018
• intel/microarchitectures/bonnell
  * 533 MT/s dual mode ([[gunning transceiver logic|GTL]] & [[CMOS]]) [[front side bus|FSB]] ...Bonnell's power and area constraints simply couldn't allow for the complex logic needed to support that capability. The [[Instruction Fetch]] consists of 3
  38 KB (5,468 words) - 20:29, 23 May 2019
• 22 nm lithography process
  ...chnology, as opposed to gate length or half pitch. Commercial [[integrated circuit]] manufacturing using 22 nm process began in 2008 for memory and 2012 for [ ...Speed Logic !! colspan="2" | Low Power Logic !! colspan="2" | High Voltage Logic
  7 KB (891 words) - 09:52, 25 November 2020
• intel/microarchitectures/p6
  * Brand, Adam, et al. "Intel’s 0.25 micron, 2.0 volts logic process technology." Intel Technology Journal Q 3 (1998): 1998. * Integrated Circuit Engineering (ICE) Corporation. "Construction Analysis Intel 266MHz 32-Bit P
  3 KB (325 words) - 21:34, 22 February 2020
• 130 nm lithography process
  ...0 nm lithography process|150 nm process]] stopgap. Commercial [[integrated circuit]] manufacturing using 130 nm process began in 2001. This technology was rep == 130 nm programmable logic devices ==
  5 KB (500 words) - 16:02, 13 May 2020
• 5 nm lithography process
  ...he [[7 nm lithography process|7 nm process]] node. Commercial [[integrated circuit]] manufacturing using 5 nm process is set to begin sometime around 2020. ...e]] successor to the company's [[N7 node]], featuring 1.84x improvement in logic density.
  11 KB (1,662 words) - 02:58, 2 October 2022
• 250 nm lithography process
  ...[350 nm lithography process|350 nm process]] node. Commercial [[integrated circuit]] manufacturing using 250 nm process began in 1997 and was eventually repla * Brand, Adam, et al. "Intel’s 0.25 micron, 2.0 volts logic process technology." Intel Technology Journal Q 3 (1998): 1998.
  6 KB (661 words) - 16:18, 21 August 2022
• amd/am486
  ...was stored in the {{intel|80386|386's}}/{{intel|84386|486's}} programmable logic array in the processor. All newer AMD models were marked with an "'''N'''"
  13 KB (1,897 words) - 09:30, 21 July 2021
• microarchitecture
  ...used to describe the connections of the transistors used to represent the logic gates schematic. ...on language|HDLs]] such as [[Verilog]] or [[VHDL]]. The description of the circuit is known as [[RTL design]]. [[Register Transfer Level]] (RTL) can be effici
  3 KB (431 words) - 22:51, 21 November 2017
• amd/microarchitectures/zen
  ...the core and a slightly smaller coverage of the L3. In addition to the LDO circuit integrated for each core is a low-latency power supply [[droop detector]] t ...instructions as it could so it can get going again. Additionally, similar logic can be found at dispatch to ensure good throughput by both threads and high
  79 KB (12,095 words) - 15:27, 9 June 2023
• moore's law
  ...y]] that states that the number of [[transistor]]s on a dense [[integrated circuit]] roughly doubles every 24 months. ...largely a law of economics whereby the scaling of devices allows for more logic to be packed at a lower price. The law has had a significant impact on the
  2 KB (369 words) - 09:36, 21 February 2023
• 3 nm lithography process
  ...he [[5 nm lithography process|5 nm process]] node. Commercial [[integrated circuit]] manufacturing using 3 nm process is set to begin some time around 2023. N3 technology will offer up to 70% logic density gain, up to 15% speed improvement at the same power and up to 30% p
  5 KB (558 words) - 19:04, 29 December 2023
• physical core
  ...s''') or just simply a '''core''' is [[macrocell|well-partitioned piece of logic]] capable of independently performing all functions of a processor (i.e., [ ...Intel's [[Core i7-7820X]] has eight identical cores on a single integrated circuit, each capable of operating on equally heavy workloads simultaneously. Unlik
  2 KB (294 words) - 01:39, 13 June 2018
• counter
  A '''counter''' is a device (i.e., [[digital circuit]]) that increments or decrements a stored value (e.g., in a [[physical regi similar to the way an adder can be seen as a simplified [[arithmetic logic unit]] (the function control input hard-wired to addition).
  2 KB (303 words) - 00:30, 28 August 2017
• neural processor
  ...ialized]] circuit that implements all the necessary control and arithmetic logic necessary to execute [[machine learning]] algorithms, typically by operatin ...ssing unit]]. Moreover, unlike a GPU, NPUs can benefit from vastly simpler logic because their workloads tend to exhibit high regularity in the computationa
  5 KB (640 words) - 16:27, 26 September 2023
• mtr-mm²
  ...d cell]]. This metrics estimates the transistor density of an [[integrated circuit]] by filling a square [[die]] with cells from north to south and all the wa ...itly excludes [[SRAM]] cell sizes because of the large variance in SRAM-to-logic ratio between popular chips. Furthermore, the metal pitch does not play a r
  4 KB (634 words) - 12:16, 25 April 2020
• soft hardware
  ...able logic devices]] instead of being fabricated as an actual [[integrated circuit]]. Soft hardware is typically coded in a language like [[VHDL]] or [[Verlog
  416 bytes (59 words) - 01:41, 20 November 2017
• thruchip interface
  ...he layers, including the silicon itself, without affecting the rest of the circuit.
  3 KB (510 words) - 17:57, 22 July 2020
• Ideal logic circuit
  #REDIRECT [[ideal logic circuit]]
  33 bytes (4 words) - 15:08, 5 August 2018
• ideal
  * [[Ideal logic gate]] * [[Ideal logic circuit]]
  124 bytes (15 words) - 15:08, 5 August 2018
• microprocessor performance
  ...gnificantly reduces the working frequency range. Likewise, by reducing the logic circuitry complexity, it's possible to increases the frequency at expense o
  3 KB (466 words) - 17:58, 10 February 2023
• tsmc/cowos
  ...on-Substrate''' ('''CoWoS''') is a [[two-point-five dimensional integrated circuit]] (2.5D IC) [[through-silicon via]] (TSV) [[interposer]]-based packaging te | 2012 || 1.25x (~1070 mm²) || Logic+Logic || -
  6 KB (943 words) - 23:31, 1 August 2021
• chip multiprocessor
  ...units (e.g., CPU cores) are integrated onto a single monolithic integrated circuit or onto multiple [[dies]] in a single [[package]].
  4 KB (397 words) - 15:43, 10 December 2023
• intel/foveros
  '''Foveros''' is a high-performance [[three-dimensional integrated circuit]] (3D IC) face-to-face-based packaging technology designed by [[Intel]]. ...logic die on top of which sit additional active components such as another logic die, memory, FPGA, or even analog/RF.
  3 KB (473 words) - 14:00, 30 September 2019

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