Semiconductor & Computer Engineering
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- * For example "[[ARM]]" INSTEAD of "[[ARMv7]]" OR "[[ARMv8]]".463 bytes (67 words) - 19:35, 2 December 2016
- | developer 2 = ARM Holdings | arch = ARM performance processors10 KB (1,247 words) - 00:25, 8 November 2023
- | developer 2 = ARM Holdings | arch = ARM performance processors1 KB (118 words) - 02:42, 1 March 2017
- |designer 2=ARM Holdings |isa=ARMv74 KB (533 words) - 21:28, 27 March 2018
- | arch = Consumer ARM-based SoCs | isa 3 = ARMv74 KB (435 words) - 10:46, 29 May 2017
- {{arm title|Versions}}{{arm isa main}} ...arious ARM implementations which historically used similar notations <code>ARM#</code>. Note that for the implementations, the number does not necessarily3 KB (499 words) - 10:03, 20 July 2020
- |designer 2=ARM Holdings |isa=ARMv73 KB (467 words) - 16:32, 13 December 2017
- |designer 2=ARM Holdings |isa=ARMv73 KB (415 words) - 16:32, 13 December 2017
- |designer 2=ARM Holdings |isa=ARMv72 KB (337 words) - 16:32, 13 December 2017
- |designer 2=ARM Holdings |isa=ARMv72 KB (248 words) - 16:32, 13 December 2017
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- |designer 2=ARM Holdings |isa=ARMv73 KB (467 words) - 04:41, 21 July 2018
- |designer 2=ARM Holdings |isa=ARMv72 KB (334 words) - 16:13, 13 December 2017
- .... This was Samsung's first in-house developed high-performance low-power [[ARM]] microarchitecture. * ARM v8.013 KB (1,962 words) - 14:48, 21 February 2019
- ...' ('''Meerkat''') is the successor to the {{\\|Mongoose 2}}, a [[10 nm]] [[ARM]] microarchitecture designed by [[Samsung]] for their consumer electronics. ...cycles. Instruction execution may take a cycle or more depending on the [[ARM]] instruction being executed. There is a single cycle for the [[write back]20 KB (3,149 words) - 10:44, 15 February 2020
- |designer 2=ARM Holdings |isa=ARMv7443 bytes (55 words) - 22:19, 29 March 2018
- |designer 2=ARM Holdings |isa=ARMv7449 bytes (55 words) - 00:11, 28 March 2018
- |designer 2=ARM Holdings |isa=ARMv7457 bytes (54 words) - 00:12, 28 March 2018
- |designer 2=ARM Holdings |isa=ARMv7439 bytes (55 words) - 08:43, 2 August 2018
- |designer 2=ARM Holdings |isa=ARMv7455 bytes (55 words) - 23:53, 28 March 2018
- |designer 2=ARM Holdings |isa=ARMv7558 bytes (65 words) - 23:56, 28 March 2018
- |designer 2=ARM Holdings |isa=ARMv7514 bytes (61 words) - 00:17, 29 March 2018
- |designer 2=ARM Holdings |isa=ARMv7526 bytes (62 words) - 00:01, 29 March 2018
- |designer 2=ARM Holdings |isa=ARMv7524 bytes (62 words) - 23:56, 28 March 2018
- |designer 2=ARM Holdings |isa=ARMv7514 bytes (62 words) - 00:23, 29 March 2018
- '''Vulcan''' is a [[16 nm]] high-performance {{arch|64}} [[ARM]] microarchitecture designed by [[Broadcom]] and later introduced by [[Cavi ...outcome of this effort which involved adapting the existing core to the [[ARM]] ISA instead of [[MIPS]] and enhancing the cores in various ways. Vulcan d17 KB (2,449 words) - 22:11, 4 October 2019
- {{arm title|ARMv8}}{{arm isa main}} '''ARMv8''' (codename '''Oban''') is the successor to {{\\|ARMv7}}, an [[ARM]] [[instruction set architecture]] announced in [[2011]] which brought a la6 KB (817 words) - 06:37, 24 April 2020
- {{arm title|AArch64}}{{arm isa main}} ...is in contrast to the {{\\|AArch32}} which describes the classical 32-bit ARM execution state.4 KB (661 words) - 20:26, 2 May 2019
- |designer=ARM Holdings |isa=ARMv73 KB (347 words) - 14:40, 31 December 2018
- |designer=ARM Holdings |isa=ARMv72 KB (285 words) - 12:27, 28 July 2019
- |designer=ARM Holdings |isa=ARMv73 KB (428 words) - 14:30, 31 December 2018
- |designer=ARM Holdings |isa=ARMv72 KB (275 words) - 14:24, 31 December 2018
- |designer=ARM Holdings |isa=ARMv71 KB (167 words) - 14:25, 31 December 2018
- |designer=ARM Holdings |isa=ARMv72 KB (184 words) - 14:25, 31 December 2018
- |designer=ARM Holdings |isa=ARMv71 KB (159 words) - 14:25, 31 December 2018
- |designer 2=ARM Holdings |isa=ARMv73 KB (358 words) - 13:44, 29 December 2018
- {{arm title|Thumb Execution Environment (ThumbEE)}}{{arm isa main}} ...int and immproving power efficiency. ThumbEE was introduced with the {{arm|ARMv7-A}}.523 bytes (66 words) - 11:49, 21 April 2019
- |isa=ARMv7 |isa family=ARM682 bytes (98 words) - 13:35, 26 February 2021
- |isa=ARMv7-M |isa family=ARM3 KB (460 words) - 02:24, 12 February 2020
- |designer=ARM Holdings ...be implemented in their own chips. The Cortex-M55, which implements the {{arm|ARMv8.1-M}} ISA, is an ultra-low-power core which is often found in microco12 KB (1,806 words) - 10:51, 12 January 2021
- ...ex-M55|l=arch}} || February 10, 2020 || {{arm|ARMv8.1-M}} Mainline, FPU, {{arm|Helium}} || 4.2 | [[Arm]] || {{armh|Cortex-M7|l=arch}} || || {{arm|ARMv7-M}}, FPU || 5.014 KB (555 words) - 11:32, 16 June 2022
