• 28 nm lithography process
  ...anufacturing using 28 nm process began in 2011. This technology superseded by commercial [[22 nm lithography process|22 nm process]]. * HiSilicon
  6 KB (711 words) - 17:01, 26 March 2019
• 16 nm lithography process
  ...MG FinFET process at the 2014 IEEE ISSCC. TSMC followed their 16FF process by the 16FF+ which provided roughly 10-15% performance improvement. A final 16 * HiSilicon
  4 KB (580 words) - 17:00, 26 March 2019
• 180 nm lithography process
  ...ring using 180 nm process began in late 1998. This technology was replaced by with [[150 nm lithography process|150 nm process]] (HN) in 2000 and [[130 n * HiSilicon
  4 KB (413 words) - 03:04, 17 August 2023
• 7 nm lithography process
  ...t by leading-edge foundries by 2020/21 timeframe where it will be replaced by the [[5 nm node]]. ...18]]-19 timeframe, the 7-nanometer [[process technology]] is characterized by its use of [[FinFET]] transistors with fin pitches in the 30s of nanometer
  13 KB (1,941 words) - 02:40, 5 November 2022
• 5 nm lithography process
  ...[2020]] timeframe, the 5-nanometer [[process technology]] is characterized by its use of [[FinFET]] transistors with fin pitches in the 20s of nanometer ...analog/IO, their 5 nm technology scaling was projected to reduce chip size by 35%-40%.
  11 KB (1,662 words) - 02:58, 2 October 2022
• arm holdings/microarchitectures/cortex-a55
  |predecessor link=arm_holdings/microarchitectures/cortex-a53 |successor link=arm_holdings/microarchitectures/cortex-a510
  4 KB (603 words) - 04:23, 27 April 2023
• hisilicon/k3/k3v1
  {{hisilicon title|K3V1}} |designer=HiSilicon
  2 KB (371 words) - 21:30, 3 June 2018
• hisilicon/k3/k3v2
  {{hisilicon title|K3V2}} |designer=HiSilicon
  3 KB (467 words) - 04:41, 21 July 2018
• hisilicon/k3/k3v2e
  {{hisilicon title|K3V2E}} |designer=HiSilicon
  2 KB (334 words) - 16:13, 13 December 2017
• hisilicon/kirin/970
  |designer=HiSilicon ...[[octa-core]] high-performance mobile [[ARM]] [[LTE]] SoC introduced by [[HiSilicon]] in mid-2017 at the [[2017 IFA]]. This chip, which is fabricated on a [[10
  6 KB (824 words) - 17:25, 1 January 2022
• hisilicon/kirin/980
  |designer=HiSilicon ...is a {{arch|64}} high-performance mobile [[ARM]] [[LTE]] SoC designed by [[HiSilicon]] and introduced in late 2018. Fabricated on TSMC's [[7 nm process]], the 9
  4 KB (600 words) - 22:53, 9 December 2022
• hisilicon/kunpeng
  {{hisilicon title|Kunpeng (Hi16xx)}} | developer = HiSilicon
  5 KB (656 words) - 05:07, 13 October 2019
• hisilicon/kunpeng/hi1610
  {{hisilicon title|Hi1610}} |designer=HiSilicon
  2 KB (273 words) - 03:03, 17 July 2019
• hisilicon/kunpeng/hi1612
  {{hisilicon title|Hi1612}} |designer=HiSilicon
  2 KB (282 words) - 20:49, 5 May 2019
• hisilicon/kunpeng/hi1616
  {{hisilicon title|Kunpeng 916 (Hi1616)}} |designer=HiSilicon
  2 KB (355 words) - 10:12, 8 May 2019
• hisilicon/kunpeng/920-6426
  {{hisilicon title|Kunpeng 920-6426}} |designer=HiSilicon
  2 KB (334 words) - 02:25, 15 February 2020
• flops
  == FLOPs by microarchitecture == ! colspan="5" | [[Intel]] Microarchitectures
  10 KB (1,204 words) - 15:03, 25 January 2023
• arm holdings/microarchitectures/cortex-a7
  |predecessor link=arm_holdings/microarchitectures/cortex-a9 |successor link=arm_holdings/microarchitectures/cortex-a53
  2 KB (275 words) - 14:24, 31 December 2018
• hisilicon/microarchitectures/taishan v110
  {{hisilicon title|TaiShan v110|arch}} |designer=HiSilicon
  7 KB (947 words) - 10:20, 9 September 2022
• hisilicon/kunpeng/920-4826
  {{hisilicon title|Kunpeng 920-4826}} |designer=HiSilicon
  2 KB (331 words) - 00:45, 5 March 2020

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