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Difference between revisions of "arm/versions"
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| rowspan="2" | {{arm|ARMv6}} || ARMv6 || [[ARM]] || {{armh|ARM11|l=arch}} | | rowspan="2" | {{arm|ARMv6}} || ARMv6 || [[ARM]] || {{armh|ARM11|l=arch}} | ||
|- | |- | ||
| − | | ARMv6-M || [[ARM]] || {{armh|Cortex-M0|l=arch}}, {{armh|Cortex-M1|l=arch}} | + | | ARMv6-M || [[ARM]] || • {{armh|Cortex-M0|l=arch}}, {{armh|Cortex-M1|l=arch}} |
|- | |- | ||
| rowspan="7" | {{arm|ARMv7}} || rowspan="4" | ARMv7-A | | rowspan="7" | {{arm|ARMv7}} || rowspan="4" | ARMv7-A | ||
| − | | [[ARM]] || {{armh|Cortex-A5|l=arch}}, {{armh|Cortex-A7|l=arch}}, {{armh|Cortex-A8|l=arch}}, {{armh|Cortex-A9|l=arch}}, {{armh|Cortex-A12|l=arch}}, {{armh|Cortex-A15|l=arch}}, {{armh|Cortex-A17|l=arch}} | + | | [[ARM]] || • {{armh|Cortex-A5|l=arch}}, {{armh|Cortex-A7|l=arch}}, {{armh|Cortex-A8|l=arch}}, {{armh|Cortex-A9|l=arch}}, <br>• {{armh|Cortex-A12|l=arch}}, {{armh|Cortex-A15|l=arch}}, {{armh|Cortex-A17|l=arch}} |
|- | |- | ||
| [[Apple]] || {{apple|Swift|l=arch}} | | [[Apple]] || {{apple|Swift|l=arch}} | ||
| Line 40: | Line 40: | ||
| [[Qualcomm]] || {{qualcomm|Scorpion|l=arch}}, {{qualcomm|Krait|l=arch}} | | [[Qualcomm]] || {{qualcomm|Scorpion|l=arch}}, {{qualcomm|Krait|l=arch}} | ||
|- | |- | ||
| − | | ARMv7-R || [[ARM]] || {{armh|Cortex-R4|l=arch}}, {{armh|Cortex-R5|l=arch}}, {{armh|Cortex-R7|l=arch}} | + | | ARMv7-R || [[ARM]] || • {{armh|Cortex-R4|l=arch}}, {{armh|Cortex-R5|l=arch}}, {{armh|Cortex-R7|l=arch}} |
|- | |- | ||
| − | | ARMv7-M || [[ARM]] || {{armh|Cortex-M3|l=arch}} | + | | ARMv7-M || [[ARM]] || • {{armh|Cortex-M3|l=arch}} |
|- | |- | ||
| − | | ARMv7E-M || [[ARM]] || {{armh|Cortex-M4|l=arch}} | + | | ARMv7E-M || [[ARM]] || • {{armh|Cortex-M4|l=arch}} |
|- | |- | ||
| rowspan="9" | {{arm|ARMv8}} || rowspan="9" | ARMv8-A | | rowspan="9" | {{arm|ARMv8}} || rowspan="9" | ARMv8-A | ||
| − | | [[ARM]] || {{armh|Cortex-A35|l=arch}}, {{armh| Cortex-A53|l=arch}}, {{armh| Cortex-A57|l=arch}}, {{armh| Cortex-A72|l=arch}}, {{armh| Cortex-A73|l=arch}} | + | | [[ARM]] || • {{armh|Cortex-A35|l=arch}}, {{armh| Cortex-A53|l=arch}}, {{armh| Cortex-A57|l=arch}}, <br>• {{armh| Cortex-A72|l=arch}}, {{armh| Cortex-A73|l=arch}} |
|- | |- | ||
| [[Apple]] || {{apple|Cyclone|l=arch}}, {{apple|Typhoon|l=arch}}, {{apple|Twister|l=arch}}, {{apple|Hurricane|l=arch}}, {{apple|Zephyr|l=arch}} | | [[Apple]] || {{apple|Cyclone|l=arch}}, {{apple|Typhoon|l=arch}}, {{apple|Twister|l=arch}}, {{apple|Hurricane|l=arch}}, {{apple|Zephyr|l=arch}} | ||
| Line 67: | Line 67: | ||
| {{arm|ARMv8.1}} || ARMv8.1-A || [[Cavium]] || {{cavium|Vulcan|l=arch}} | | {{arm|ARMv8.1}} || ARMv8.1-A || [[Cavium]] || {{cavium|Vulcan|l=arch}} | ||
|- | |- | ||
| − | | rowspan="5" | {{arm|ARMv8.2}} || rowspan="5" | ARMv8.2-A || | + | | rowspan="5" | {{arm|ARMv8.2}} || rowspan="5" | ARMv8.2-A || rowspan="2" | [[ARM]] || • {{armh|Cortex-A55|l=arch}}, {{armh|Cortex-A75|l=arch}} (''[[arm_holdings/microarchitectures/prometheus|Prometheus]]''), <br>• {{armh|Cortex-A76|l=arch}}, {{armh|Cortex-A77|l=arch}}, {{armh|Cortex-A78|l=arch}} (''[[arm_holdings/microarchitectures/hercules|Hercules]]'') |
|- | |- | ||
| − | | {{armh|Neoverse N1|l=arch}} (''[[arm_holdings/microarchitectures/ares|Ares]]''), {{armh|Neoverse E1|l=arch}} (''[[arm_holdings/microarchitectures/helios|Helios]]'') | + | | • {{armh|Neoverse N1|l=arch}} (''[[arm_holdings/microarchitectures/ares|Ares]]''), {{armh|Neoverse E1|l=arch}} (''[[arm_holdings/microarchitectures/helios|Helios]]'') |
|- | |- | ||
| [[ampere computing|Ampere]] || {{ampere|Quicksilver|l=arch}} | | [[ampere computing|Ampere]] || {{ampere|Quicksilver|l=arch}} | ||
| Line 79: | Line 79: | ||
| {{arm|ARMv8.3}} || ARMv8.3-A || [[Qualcomm]] || {{qualcomm|Saphira|l=arch}} | | {{arm|ARMv8.3}} || ARMv8.3-A || [[Qualcomm]] || {{qualcomm|Saphira|l=arch}} | ||
|- | |- | ||
| − | | {{arm|ARMv8.4}} || ARMv8.4-A || [[ARM]] || {{armh|Neoverse V1|l=arch}} (''[[arm_holdings/microarchitectures/zeus|Zeus]]'') | + | | {{arm|ARMv8.4}} || ARMv8.4-A || [[ARM]] || • {{armh|Neoverse V1|l=arch}} (''[[arm_holdings/microarchitectures/zeus|Zeus]]'') |
|- | |- | ||
| {{arm|ARMv8.6}} || ARMv8.6-A || [[ARM]] || | | {{arm|ARMv8.6}} || ARMv8.6-A || [[ARM]] || | ||
|- | |- | ||
| − | | {{arm|ARMv9}} || ARMv9.0-A || [[ARM]] || {{armh|Cortex-A510|l=arch}} (''[[arm_holdings/microarchitectures/klein|Klein]]''), (''[[arm_holdings/microarchitectures/hayes|Hayes]]''), {{armh|Cortex-A710|l=arch}} (''[[arm_holdings/microarchitectures/matterhorn|Matterhorn]]''), {{armh|Cortex-A715|l=arch}} (''[[arm_holdings/microarchitectures/makalu|Makalu]]'') | + | | rowspan="2" | {{arm|ARMv9}} || rowspan="2" | ARMv9.0-A || rowspan="2" | [[ARM]] || • {{armh|Cortex-A510|l=arch}} (''[[arm_holdings/microarchitectures/klein|Klein]]''), (''[[arm_holdings/microarchitectures/hayes|Hayes]]''), <br>• {{armh|Cortex-A710|l=arch}} (''[[arm_holdings/microarchitectures/matterhorn|Matterhorn]]''), {{armh|Cortex-A715|l=arch}} (''[[arm_holdings/microarchitectures/makalu|Makalu]]'') |
| + | |- | ||
| + | | • {{armh|Neoverse N2|l=arch}} (''[[arm_holdings/microarchitectures/perseus|Perseus]]''), {{armh|Neoverse N3|l=arch}} (''[[arm_holdings/microarchitectures/hermes|Hermes]]'') <br>• {{armh|Neoverse V2|l=arch}} (''[[arm holdings/microarchitectures/demeter|Demeter]]''), {{armh|Neoverse V3|l=arch}} (''[[arm_holdings/microarchitectures/poseidon|Poseidon]]'') | ||
| + | |- | ||
| + | | {{arm|ARMv9.1}} || ARMv9.1-A || [[ARM]] || | ||
| + | |- | ||
| + | | {{arm|ARMv9.2}} || ARMv9.2-A || [[ARM]] || | ||
| + | |- | ||
| + | | {{arm|ARMv9.3}} || ARMv9.3-A || [[ARM]] || | ||
| + | |- | ||
| + | | {{arm|ARMv9.4}} || ARMv9.4-A || [[ARM]] || | ||
|- | |- | ||
|} | |} | ||
Latest revision as of 22:05, 15 December 2024
| ARM ISA | |
| General | |
| Variants | |
| Extensions | |
| Topics | |
| Versions(all) | |
ARM Versions are the architectural version numbers. ARM architecture versions always use the ARMv# notations. Architecture versions are often confused with the various ARM implementations which historically used similar notations ARM#. Note that for the implementations, the number does not necessarily correlates to the architecture version used. Over the years, a number of additional implementations were designed by third party companies such as DEC, Intel, Qualcomm and Apple.