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{| class="wikitable" | {| class="wikitable" | ||
|- | |- | ||
− | ! ISA !! Variant !! | + | ! ISA !! Variant !! Vendor !! Microarchitectures |
|- | |- | ||
− | + | | {{arm|ARMv1}} || ARMv1 || [[Acorn]] || {{acorn|ARM1|l=arch}} | |
|- | |- | ||
− | | | + | | rowspan="3" | {{arm|ARMv2}} || ARMv2 || [[Acorn]] || {{acorn|ARM2|l=arch}} |
|- | |- | ||
− | | | + | | rowspan="2" | ARMv2a || [[Acorn]] || {{acorn|ARM3|l=arch}} |
|- | |- | ||
− | | ARM || {{armh|ARM250|l=arch}} | + | | [[ARM]] || {{armh|ARM250|l=arch}} |
|- | |- | ||
− | + | | {{arm|ARMv3}} || ARMv3 || [[ARM]] || {{armh|ARM6|l=arch}}, {{armh|ARM7|l=arch}} | |
|- | |- | ||
− | | rowspan="3" | {{arm|ARMv4}} || rowspan="2" | ARMv4 || ARM || {{armh|ARM8}} | + | | rowspan="3" | {{arm|ARMv4}} || rowspan="2" | ARMv4 || [[ARM]] || {{armh|ARM8}} |
|- | |- | ||
| [[DEC]] || {{decc|StrongARM|l=arch}} | | [[DEC]] || {{decc|StrongARM|l=arch}} | ||
|- | |- | ||
− | | ARMv4T || ARM || {{armh|ARM7TDMI}}, {{armh|ARM9TDMI}} | + | | ARMv4T || [[ARM]] || {{armh|ARM7TDMI}}, {{armh|ARM9TDMI}} |
|- | |- | ||
− | | rowspan="2" | {{arm|ARMv5}} || rowspan="2" | ARMv5TE || ARM || {{armh|ARM7EJ}}, {{armh|ARM9E}}, {{armh|ARM10E}} | + | | rowspan="2" | {{arm|ARMv5}} || rowspan="2" | ARMv5TE || [[ARM]] || {{armh|ARM7EJ}}, {{armh|ARM9E}}, {{armh|ARM10E}} |
|- | |- | ||
| [[Intel]] || {{intel|XScale|l=arch}} | | [[Intel]] || {{intel|XScale|l=arch}} | ||
|- | |- | ||
− | | rowspan="2" | {{arm|ARMv6}} || ARMv6 || ARM || {{armh|ARM11|l=arch}} | + | | rowspan="2" | {{arm|ARMv6}} || ARMv6 || [[ARM]] || {{armh|ARM11|l=arch}} |
|- | |- | ||
− | | ARMv6-M || ARM || {{armh|Cortex-M0|l=arch}}, {{armh|Cortex-M1|l=arch}} | + | | ARMv6-M || [[ARM]] || • {{armh|Cortex-M0|l=arch}}, {{armh|Cortex-M1|l=arch}} |
|- | |- | ||
| rowspan="7" | {{arm|ARMv7}} || rowspan="4" | ARMv7-A | | rowspan="7" | {{arm|ARMv7}} || rowspan="4" | ARMv7-A | ||
− | | ARM || {{armh|Cortex-A5|l=arch}}, {{armh|Cortex-A7|l=arch}}, {{armh|Cortex-A8|l=arch}}, {{armh|Cortex-A9|l=arch}}, {{armh|Cortex-A12|l=arch}}, {{armh|Cortex-A15|l=arch}}, {{armh|Cortex-A17|l=arch}} | + | | [[ARM]] || • {{armh|Cortex-A5|l=arch}}, {{armh|Cortex-A7|l=arch}}, {{armh|Cortex-A8|l=arch}}, {{armh|Cortex-A9|l=arch}}, <br>• {{armh|Cortex-A12|l=arch}}, {{armh|Cortex-A15|l=arch}}, {{armh|Cortex-A17|l=arch}} |
|- | |- | ||
| [[Apple]] || {{apple|Swift|l=arch}} | | [[Apple]] || {{apple|Swift|l=arch}} | ||
Line 40: | Line 40: | ||
| [[Qualcomm]] || {{qualcomm|Scorpion|l=arch}}, {{qualcomm|Krait|l=arch}} | | [[Qualcomm]] || {{qualcomm|Scorpion|l=arch}}, {{qualcomm|Krait|l=arch}} | ||
|- | |- | ||
− | | ARMv7-R || ARM || {{armh|Cortex-R4|l=arch}}, {{armh|Cortex-R5|l=arch}}, {{armh|Cortex-R7|l=arch}} | + | | ARMv7-R || [[ARM]] || • {{armh|Cortex-R4|l=arch}}, {{armh|Cortex-R5|l=arch}}, {{armh|Cortex-R7|l=arch}} |
|- | |- | ||
− | | ARMv7-M || ARM || {{armh|Cortex-M3|l=arch}} | + | | ARMv7-M || [[ARM]] || • {{armh|Cortex-M3|l=arch}} |
|- | |- | ||
− | | ARMv7E-M || ARM || {{armh|Cortex-M4|l=arch}} | + | | ARMv7E-M || [[ARM]] || • {{armh|Cortex-M4|l=arch}} |
|- | |- | ||
− | | rowspan=" | + | | rowspan="9" | {{arm|ARMv8}} || rowspan="9" | ARMv8-A |
− | | ARM || {{armh|Cortex-A35|l=arch}}, {{armh| Cortex-A53|l=arch}}, {{armh| Cortex-A57|l=arch}}, {{armh| Cortex-A72|l=arch}}, {{armh| Cortex-A73|l=arch}} | + | | [[ARM]] || • {{armh|Cortex-A35|l=arch}}, {{armh| Cortex-A53|l=arch}}, {{armh| Cortex-A57|l=arch}}, <br>• {{armh| Cortex-A72|l=arch}}, {{armh| Cortex-A73|l=arch}} |
|- | |- | ||
− | | Apple || {{apple|Cyclone|l=arch}}, {{apple|Typhoon|l=arch}}, {{apple|Twister|l=arch}}, {{apple|Hurricane|l=arch}}, {{apple|Zephyr|l=arch}} | + | | [[Apple]] || {{apple|Cyclone|l=arch}}, {{apple|Typhoon|l=arch}}, {{apple|Twister|l=arch}}, {{apple|Hurricane|l=arch}}, {{apple|Zephyr|l=arch}} |
|- | |- | ||
| [[AMD]] || {{amd|K12|l=arch}} | | [[AMD]] || {{amd|K12|l=arch}} | ||
|- | |- | ||
| [[AppliedMicro]] || {{apm|Storm|l=arch}}, {{apm|Shadowcat|l=arch}}, {{apm|Skylark|l=arch}} | | [[AppliedMicro]] || {{apm|Storm|l=arch}}, {{apm|Shadowcat|l=arch}}, {{apm|Skylark|l=arch}} | ||
+ | |- | ||
+ | | [[Cavium]] || {{cavium|ThunderX1|l=arch}} | ||
|- | |- | ||
| [[Nvidia]] || {{nvidia|Denver|l=arch}} | | [[Nvidia]] || {{nvidia|Denver|l=arch}} | ||
|- | |- | ||
− | | [[ | + | | [[Phytium]] || {{phytium|Xiaomi|l=arch}} |
|- | |- | ||
− | | Qualcomm || {{qualcomm|Kryo|l=arch}}, {{qualcomm|Falkor|l=arch}} | + | | [[Samsung]] || {{samsung|M1|l=arch}}, {{samsung|M2|l=arch}}, {{samsung|M3|l=arch}} |
+ | |- | ||
+ | | [[Qualcomm]] || {{qualcomm|Kryo|l=arch}}, {{qualcomm|Falkor|l=arch}} | ||
|- | |- | ||
| {{arm|ARMv8.1}} || ARMv8.1-A || [[Cavium]] || {{cavium|Vulcan|l=arch}} | | {{arm|ARMv8.1}} || ARMv8.1-A || [[Cavium]] || {{cavium|Vulcan|l=arch}} | ||
|- | |- | ||
− | | rowspan=" | + | | rowspan="5" | {{arm|ARMv8.2}} || rowspan="5" | ARMv8.2-A || rowspan="2" | [[ARM]] || • {{armh|Cortex-A55|l=arch}}, {{armh|Cortex-A75|l=arch}} (''[[arm_holdings/microarchitectures/prometheus|Prometheus]]''), <br>• {{armh|Cortex-A76|l=arch}}, {{armh|Cortex-A77|l=arch}}, {{armh|Cortex-A78|l=arch}} (''[[arm_holdings/microarchitectures/hercules|Hercules]]'') |
+ | |- | ||
+ | | • {{armh|Neoverse N1|l=arch}} (''[[arm_holdings/microarchitectures/ares|Ares]]''), {{armh|Neoverse E1|l=arch}} (''[[arm_holdings/microarchitectures/helios|Helios]]'') | ||
+ | |- | ||
+ | | [[ampere computing|Ampere]] || {{ampere|Quicksilver|l=arch}} | ||
+ | |- | ||
+ | | [[Nvidia]] || {{nvidia|Carmel|l=arch}} | ||
+ | |- | ||
+ | | [[Samsung]] || {{samsung|M4|l=arch}}, {{samsung|M5|l=arch}} | ||
+ | |- | ||
+ | | {{arm|ARMv8.3}} || ARMv8.3-A || [[Qualcomm]] || {{qualcomm|Saphira|l=arch}} | ||
+ | |- | ||
+ | | {{arm|ARMv8.4}} || ARMv8.4-A <hr>ARMv8.5-A || [[ARM]] || • {{armh|Neoverse V1|l=arch}} (''{{armh|Zeus|l=arch}}'') <hr>• [[Apple]] A13, S6, S7, S8; Apple A14, M1 <!-- ARMv8.4-A: Neoverse V1 (AWS Graviton3); ARMv8.4-A compatible: Apple A13, S6, S7, S8; ARMv8.5-A compatible: Apple A14, M1 --> | ||
+ | |- | ||
+ | | {{arm|ARMv8.6}} || ARMv8.6-A<hr>ARMv8.7-A || [[ARM]] || [[Apple]] A15, A16, A17, M2, M3 <hr>[[Qualcomm]] Oryon | ||
+ | |- | ||
+ | | rowspan="2" | {{arm|ARMv9}} || rowspan="2" | ARMv9.0-A || rowspan="2" | [[ARM]] || • {{armh|Cortex-A510|l=arch}}, {{armh|Cortex-A710|l=arch}}, {{armh|Cortex-A715|l=arch}} <!-- | ||
+ | :• Cortex-A510: Google Tensor G3; MediaTek Dimensity 7200 (Pro/Ultra), 8300 (Ultra), 9000/9000+, 9200; Qualcomm Snapdragon 7 Gen 1, 7 Gen 3, 7s/7+ Gen 2, 8(+) Gen 1, 8 Gen 2; Samsung Exynos 2200 | ||
+ | :• Cortex-A710: MediaTek Dimensity 9000/9000+; Qualcomm Snapdragon 7 Gen 1, 7 Gen 3, 7s/7+ Gen 2, 8(+) Gen 1, 8 Gen 2; Samsung Exynos 2200 | ||
+ | :• Cortex-A715: Google Tensor G3; MediaTek Dimensity 7200 (Pro/Ultra), 8300 (Ultra), 9200; Qualcomm Snapdragon 7 Gen 3, 8 Gen 2 --><hr>• {{armh|Cortex-X2|l=arch}}, {{armh|Cortex-X3|l=arch}} <!-- | ||
+ | • Cortex-X2: MediaTek Dimensity 9000/9000+; Qualcomm Snapdragon 7s/7+ Gen 2, 8(+) Gen 1; Samsung Exynos 2200 | ||
+ | • Cortex-X3: Google Tensor G3; MediaTek Dimensity 9200/9200+; Qualcomm Snapdragon 8 Gen 2 --> | ||
+ | |- | ||
+ | | • {{armh|Neoverse N2|l=arch}} (''[[arm_holdings/microarchitectures/perseus|Perseus]]''), {{armh|Neoverse V2|l=arch}} (''[[arm holdings/microarchitectures/demeter|Demeter]]'') <!-- | ||
+ | • Neoverse N2: Alibaba YiTian 710; Microsoft Azure Cobalt 100 | ||
+ | • Neoverse V2: AWS Graviton4; Google Axion; Nvidia Grace --> | ||
+ | |- | ||
+ | | {{arm|ARMv9.1}} || ARMv9.1-A || [[ARM]] || | ||
+ | |- | ||
+ | | {{arm|ARMv9.2}} || ARMv9.2-A || [[ARM]] || Cortex-A520, Cortex-A720, Cortex-A725 <hr>{{armh|Cortex-X4|l=arch}}, Cortex-X925, Cortex-X930 <br>{{armh|Neoverse N3|l=arch}} (''[[arm_holdings/microarchitectures/hermes|Hermes]]''), {{armh|Neoverse V3|l=arch}} (''[[arm_holdings/microarchitectures/poseidon|Poseidon]]'') <hr>Apple A18, Apple M4 <!-- | ||
+ | • Cortex-A520: Google Tensor G4; Qualcomm Snapdragon 6 Gen4, 7s/7+ Gen3, 8(s) Gen3; Samsung Exynos 1580, Exynos 2400 | ||
+ | • Cortex-A720: Google Tensor G4; MediaTek Dimensity 9300(+); Qualcomm Snapdragon 6 Gen4, 7s/7+ Gen3, 8(s) Gen3; Samsung Exynos 1580, Exynos 2400 | ||
+ | • Cortex-A725: MediaTek Dimensity 8400 (Ultra) | ||
+ | • Cortex-X4: Google Tensor G4; MediaTek Dimensity 9300(+); Qualcomm Snapdragon 7+ Gen3, 8(s) Gen3; Samsung Exynos 2400 | ||
+ | • Cortex-X925: MediaTek Dimensity 9400(+) | ||
+ | • Neoverse N3, Neoverse V3 | ||
+ | • ARMv9.2-A compatible: Apple A18, Apple M4 --> | ||
+ | |- | ||
+ | | {{arm|ARMv9.3}} || ARMv9.3-A || [[ARM]] || | ||
+ | |- | ||
+ | | {{arm|ARMv9.4}} || ARMv9.4-A || [[ARM]] || | ||
+ | |- | ||
+ | |} | ||
+ | |||
+ | === Part numbers === | ||
+ | :;[[ARM]] • [[Cortex]] | ||
+ | <!-- if (Implementer == "0x41") { // ARM Ltd. | ||
+ | // The CPU part is a 3 digit hexadecimal number with a 0x prefix. | ||
+ | // The values correspond to the "Part number" in the CP15/c0 register. | ||
+ | // The contents are specified in the various processor manuals. | ||
+ | // This corresponds to the Main ID Register in Technical Reference Manuals and | ||
+ | // is used in programs like sys-utils return StringSwitch <const char *> (Part) --> | ||
+ | |||
+ | {| class="wikitable sortable" cellpadding="3px" style="border: 1px solid black; border-spacing: 0px; width: 35%; text-align:center; | ||
+ | |- | ||
+ | ! HW Part number !! Vendor/Manuf | ||
+ | |- | ||
+ | | 0x41 || [[ARM]] | ||
+ | |- | ||
+ | | 0x42 || [[Broadcom]] | ||
+ | |- | ||
+ | | 0x43 || [[Cavium]] | ||
+ | |- | ||
+ | | 0x44 || [[DEC]] | ||
+ | |- | ||
+ | | 0x46 || [[Fujitsu]] | ||
+ | |- | ||
+ | | 0x48 || [[HiSilicon]] | ||
+ | |- | ||
+ | | 0x49 || [[Infineon]] | ||
+ | |- | ||
+ | | 0x4d || [[Motorola]] <br>[[NXP]] ([[freescale/qoriq|Freescale]]) | ||
+ | |- | ||
+ | | 0x4e || [[NVIDIA]] ([[nvidia]]) | ||
+ | |- | ||
+ | | 0x50 || [[APM]] | ||
+ | |- | ||
+ | | 0x51 || [[Qualcomm]] | ||
+ | |- | ||
+ | | 0x53 || [[Samsung]] | ||
+ | |- | ||
+ | | 0x56 || [[Marvell]] | ||
+ | |- | ||
+ | | 0x61 || [[Apple]] | ||
+ | |- | ||
+ | | 0x66 || [[Faraday]] | ||
+ | |- | ||
+ | | 0x69 || [[Intel]] | ||
+ | |- | ||
+ | | 0x6d || [[Microsoft]] | ||
+ | |- | ||
+ | | 0x70 || [[Phytium]] | ||
|- | |- | ||
− | | [[ | + | | 0xc0 || [[Ampere Computing|Ampere]] |
|- | |- | ||
− | |||
|} | |} | ||
+ | <!-- | ||
+ | <pre> | ||
+ | static const struct hw_impl hw_implementer[] = { | ||
+ | { 0x41, arm_part, "ARM" }, | ||
+ | { 0x42, brcm_part, "Broadcom" }, | ||
+ | { 0x43, cavium_part, "Cavium" }, | ||
+ | { 0x44, dec_part, "DEC" }, | ||
+ | { 0x46, fujitsu_part, "FUJITSU" }, | ||
+ | { 0x48, hisi_part, "HiSilicon" }, | ||
+ | { 0x49, unknown_part, "Infineon" }, | ||
+ | { 0x4d, unknown_part, "Motorola/Freescale" }, | ||
+ | { 0x4e, nvidia_part, "NVIDIA" }, | ||
+ | { 0x50, apm_part, "APM" }, | ||
+ | { 0x51, qcom_part, "Qualcomm" }, | ||
+ | { 0x53, samsung_part, "Samsung" }, | ||
+ | { 0x56, marvell_part, "Marvell" }, | ||
+ | { 0x61, apple_part, "Apple" }, | ||
+ | { 0x66, faraday_part, "Faraday" }, | ||
+ | { 0x69, intel_part, "Intel" }, | ||
+ | { 0x6d, ms_part, "Microsoft" }, | ||
+ | { 0x70, ft_part, "Phytium" }, | ||
+ | { 0xc0, ampere_part, "Ampere" }, | ||
+ | </pre>--> | ||
== See also == | == See also == |
Latest revision as of 12:15, 11 October 2025
ARM ISA | |
General | |
Variants | |
Extensions | |
Topics | |
Versions(all) | |
ARM Versions are the architectural version numbers. ARM architecture versions always use the ARMv#
notations. Architecture versions are often confused with the various ARM implementations which historically used similar notations ARM#
. Note that for the implementations, the number does not necessarily correlates to the architecture version used. Over the years, a number of additional implementations were designed by third party companies such as DEC, Intel, Qualcomm and Apple.
Versions[edit]
Part numbers[edit]
HW Part number | Vendor/Manuf |
---|---|
0x41 | ARM |
0x42 | Broadcom |
0x43 | Cavium |
0x44 | DEC |
0x46 | Fujitsu |
0x48 | HiSilicon |
0x49 | Infineon |
0x4d | Motorola NXP (Freescale) |
0x4e | NVIDIA (nvidia) |
0x50 | APM |
0x51 | Qualcomm |
0x53 | Samsung |
0x56 | Marvell |
0x61 | Apple |
0x66 | Faraday |
0x69 | Intel |
0x6d | Microsoft |
0x70 | Phytium |
0xc0 | Ampere |