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{{intel title|Core|arch}}
 
{{intel title|Core|arch}}
 
{{microarchitecture
 
{{microarchitecture
| name             = Core
+
|atype=CPU
| manufacturer     = Intel
+
|name=Core
| introduction     = April, 2006
+
|designer=Intel
| phase-out       = May, 2009
+
|manufacturer=Intel
| process         = 65 nm
+
|introduction=April, 2006
 
+
|phase-out=May, 2009
| succession      = Yes
+
|isa=x86-64
| predecessor     = NetBurst
+
|process=65 nm
| predecessor link = intel/microarchitectures/netburst
+
|predecessor=Modified Pentium M
| successor       = Penryn
+
|predecessor link=intel/microarchitectures/modified_pentium_m
| successor link   = intel/microarchitectures/penryn
+
|successor=Penryn
 +
|successor link=intel/microarchitectures/penryn
 +
|succession=Yes
 
}}
 
}}
 
'''Core''' was the [[microarchitecture]] for [[Intel]]'s [[65 nm process]] for desktops and servers as a successor to {{\\|NetBurst}}. Core was replaced by the {{\\|Penryn}} microarchitecture in late 2008.
 
'''Core''' was the [[microarchitecture]] for [[Intel]]'s [[65 nm process]] for desktops and servers as a successor to {{\\|NetBurst}}. Core was replaced by the {{\\|Penryn}} microarchitecture in late 2008.
 +
 +
== Architecture ==
 +
{{empty section}}
 +
=== Key changes from {{\\|NetBurst}} ===
 +
{{empty section}}
 +
 +
== Overview ==
 +
When Core was introduced in 2006, Intel described it as a merger of both {{\\|P6}} and {{\\|NetBurst}}. When scrutinizing the details, it's fairly clear that little was actually borrowed from {{\\|NetBurst}}. In fact, it wasn't until Intel's entirely new microarchitecture {{\\|Sandy Bridge}} that a true merger presented itself.
 +
{{expand section}}
 +
 +
== Die Shot ==
 +
 +
===Dual-core Core===
 +
* Woodcrest
 +
* 143 mm²
 +
* 291,000,000 transistors
 +
* [[65 nm process]]
 +
* 2 cores
 +
 +
: [[File:intel woodcrest die shot.jpg|300px]]
 +
 +
== Documents ==
 +
* [[:File:01-2 Intel C2 AE Processor Architecture-Core.ppt|Intel® Processor Micro-architecture – Core®]]; Intel® Software College, 2006
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* [[:File:Inside Intel® Core Microarchitecture.pdf|White Paper: Inside Intel® Core TM Microarchitecture]], 2006
 +
* [[:File:Multicore MATS002 999 pct.pdf|Intel Multi-core Architecture and Implementations]], March 7, 2006
 +
* [[:File:NGMA IDF Press Mar 8 PDF Set.pdf|Intel® Core Microarchitecture]], March 8, 2006
 +
* [[:File:20060308 Pawlowski.pdf|Intel® Core Microarchitecture]], IDF
 +
* [[:File:Rattner IDFA Final.pdf|Core]], Justin Rattner Senior Fellow, Chief Technology Officer, IDF
 +
 +
 +
* [[:File:Intel(R) Core(TM)2 Duo Processor Product Brief.pdf|Product Brief: Intel® Core 2 Duo Desktop Processor]]
 +
* [[:File:Intel(R) Core(TM)2 Extreme Processor Product Brief.pdf|Product Brief: Intel® Core 2 Extreme Processor]]

Latest revision as of 20:08, 9 March 2018

Edit Values
Core µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
IntroductionApril, 2006
Phase-outMay, 2009
Process65 nm
Instructions
ISAx86-64
Succession

Core was the microarchitecture for Intel's 65 nm process for desktops and servers as a successor to NetBurst. Core was replaced by the Penryn microarchitecture in late 2008.

Architecture[edit]

New text document.svg This section is empty; you can help add the missing info by editing this page.

Key changes from NetBurst[edit]

New text document.svg This section is empty; you can help add the missing info by editing this page.

Overview[edit]

When Core was introduced in 2006, Intel described it as a merger of both P6 and NetBurst. When scrutinizing the details, it's fairly clear that little was actually borrowed from NetBurst. In fact, it wasn't until Intel's entirely new microarchitecture Sandy Bridge that a true merger presented itself.

New text document.svg This section requires expansion; you can help adding the missing info.

Die Shot[edit]

Dual-core Core[edit]

  • Woodcrest
  • 143 mm²
  • 291,000,000 transistors
  • 65 nm process
  • 2 cores
intel woodcrest die shot.jpg

Documents[edit]


codenameCore +
designerIntel +
first launchedApril 2006 +
full page nameintel/microarchitectures/core (client) +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameCore +
phase-outMay 2009 +
process65 nm (0.065 μm, 6.5e-5 mm) +