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== Release Dates ==
 
== Release Dates ==
 
[[File:zhaoxin roadmap (2017).png|right|400px]]
 
[[File:zhaoxin roadmap (2017).png|right|400px]]
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WuDaoKou-based chips [[taped out]] on November 9, 2017. The architecture and SKUs were officially unveiled at a conference on December 28, 2018.
+
Development for WuDaoKou started in August 2013. WuDaoKou [[taped out]] on November 9, 2017. The architecture and SKUs were officially unveiled at a conference on December 28, 2018.
  
 
== Process Technology ==
 
== Process Technology ==

Revision as of 01:13, 31 January 2018

Edit Values
WuDaoKou µarch
General Info
Arch TypeCPU
DesignerZhaoxin
ManufacturerHLMC
IntroductionDecember 28, 2017
Process28 nm
Core Configs2, 4, 8
Pipeline
TypeSuperscalar
OoOEYes
SpeculativeYes
Reg RenamingYes
Instructions
ISAx86-64
Succession

WuDaoKou is the successor to Zhangjiang, a 28 nm x86 microarchitecture designed by Zhaoxin for mainstream laptops, desktops, and servers.

Brands

Family Series Description
KaiXian KX (5000) Desktop, Laptops
KaisHeng KH (20000) Storage, Servers
hk-20000.png 
kx-5000.png

Release Dates

zhaoxin roadmap (2017).png

Development for WuDaoKou started in August 2013. WuDaoKou taped out on November 9, 2017. The architecture and SKUs were officially unveiled at a conference on December 28, 2018.

Process Technology

WuDaoKou is manufactured on HLMC's 28 nm process.

Architecture

Key changes from Zhangjiang

  • 1.4x performance
  • 8 cores per die (up from 4)
  • SoC design
  • Core
    • Pipeline was reduced by 5 stages
    • Execution engines were re-balanced
    • Branch prediction unit was reworked and optimized
  • FSB removed
  • Chipset
    • Gigabit Ethernet port (RGMII)
    • USB 3.1 Gen2 (Type-C) ports
    • SATA 3.0 ports

This list is incomplete; you can help by expanding it.

Block Diagram

New text document.svg This section is empty; you can help add the missing info by editing this page.

Memory Hierarchy

  • Cache
    • L1D Cache
      • 32 KiB, 8-way set associative
      • Per core
    • L1I Cache
      • 32 KiB, 8-way set associative
      • Per core
    • L2 Cache
      • 4 MiB, 32-way set associative
      • Per quad-core cluster
  • System DRAM
    • 2 Channels
    • DDR4, Up to 2400 MT/s

Sockets/Platform

zhaoxin zx-200 chipset.png

All parts use a HFCBGA 37.5×37.5 mm package and are effectively a system on a chip. However, for the most part, those parts get paired with a chipset which serves as an I/O extension chip. The chipset communicates with the microprocessor over standard PCIe 3.0 x4 lanes.

Chipset
Chipset TDP PCIe SATA USB Network Process Package
2.0 3.0 3.0 2.0 3.1 Gen 1 3.1 Gen 2
ZX-200 6 W 9 lanes - 4 6 3 2 10/100M/1 Gbps 40 nm FCBGA (21mm x 21mm)

zx-200 slide.png

Die

All WuDaoKou Processors

 List of WuDaoKou-based Processors
 Main processor
ModelFamilyLaunchedCoresL2FrequencyMax MemoryECC
KH-25800KaisHeng28 December 201788 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
1.8 GHz
1,800 MHz
1,800,000 kHz
128 GiB
131,072 MiB
134,217,728 KiB
137,438,953,472 B
0.125 TiB
✔
KH-26800KaisHeng28 December 201788 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
2 GHz
2,000 MHz
2,000,000 kHz
128 GiB
131,072 MiB
134,217,728 KiB
137,438,953,472 B
0.125 TiB
✔
KX-5540KaiXian28 December 201744 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
1.8 GHz
1,800 MHz
1,800,000 kHz
64 GiB
65,536 MiB
67,108,864 KiB
68,719,476,736 B
0.0625 TiB
✘
KX-5640KaiXian28 December 201744 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
2 GHz
2,000 MHz
2,000,000 kHz
64 GiB
65,536 MiB
67,108,864 KiB
68,719,476,736 B
0.0625 TiB
✘
KX-U5580KaiXian28 December 201788 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
1.8 GHz
1,800 MHz
1,800,000 kHz
64 GiB
65,536 MiB
67,108,864 KiB
68,719,476,736 B
0.0625 TiB
✘
KX-U5580MKaiXian28 December 201788 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
1.8 GHz
1,800 MHz
1,800,000 kHz
64 GiB
65,536 MiB
67,108,864 KiB
68,719,476,736 B
0.0625 TiB
✘
KX-U5680KaiXian28 December 201788 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
2 GHz
2,000 MHz
2,000,000 kHz
64 GiB
65,536 MiB
67,108,864 KiB
68,719,476,736 B
0.0625 TiB
✘
Count: 7

References

Retrieved from "https://en.wikichip.org/w/index.php?title=zhaoxin/microarchitectures/wudaokou&oldid=73295"
Facts about "WuDaoKou - Microarchitectures - Zhaoxin"
RDF feed
codenameWuDaoKou +
core count2 +, 4 + and 8 +
designerZhaoxin +
first launchedDecember 28, 2017 +
full page namezhaoxin/microarchitectures/wudaokou +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerHLMC +
microarchitecture typeCPU +
nameWuDaoKou +
process28 nm (0.028 μm, 2.8e-5 mm) +