Revision as of 11:34, 2 February 2018

WuDaoKou is the successor to Zhangjiang, a 28 nm x86 microarchitecture designed by Zhaoxin for mainstream laptops, desktops, and servers.

Etymology

WuDaoKou is named after the Wudaokou Station of the Beijing Subway in China.

Brands

 

Release Dates

Development for WuDaoKou started in August 2013. The basic architecture design was completed by June 2014 with basic design done in July 2015. WuDaoKou hardware implementation was completed in April 2016 and taped out in August 2016. Final verification was done in October 2016 and mass production started in October 2017. The KX-5000 (formerly ZX-D) was announced at Semicon China 2017. The architecture and SKUs were officially unveiled at a conference on December 28, 2018.

WuDaoKou is said to be a result of 9,000 engineering months. Development data exceeded 200 TB with 4,000 cores being used for simulations with ten hardware emulators used for verification simulating a total of 150 billion instructions testing more than 300 different kinds of software, testing the CPU, GPU, memory controller, and bus.

Process Technology

WuDaoKou is manufactured on HLMC's 28 nm process.

Architecture

Key changes from Zhangjiang

• 25% higher IPC
• 140% higher performance in multi-threaded workloads
• 8 cores per die (up from 4)
• SoC design
  • New Uncore
    • northbridge moved on-die
    • PCIe 3.0 (from 2.0)
    • DDR4 (From DDR3)
  • New integrated graphics processor
    • HD Audio Output/Codec
    • DirectX 11.1
    • Up to 3 displays
      • DP (1.2a) / eDP (1.3) / HDMI (1.4b) / VGA
• Core
  • Improved OoOE algorithm
  • Pipeline was reduced by 5 stages
  • Execution engines were re-balanced
  • Branch prediction unit was reworked and optimized
• FSB removed
  • x4 PCIe 3.0 communication with southbridge chipset
• Chipset
  • Gigabit Ethernet port (RGMII)
  • USB 3.1 Gen2 (Type-C) ports
  • SATA 3.0 ports
• Formal OS certification
  • Windows Hardware Quality Labs (WHQL) certification
    • Windows 7/10

This list is incomplete; you can help by expanding it.

Block Diagram

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Memory Hierarchy

• Cache
  • L1D Cache
    • 32 KiB, 8-way set associative
    • Per core
  • L1I Cache
    • 32 KiB, 8-way set associative
    • Per core
  • L2 Cache
    • 4 MiB, 32-way set associative
    • Per quad-core cluster
• System DRAM
  • 2 Channels
  • DDR4, Up to 2400 MT/s

Overview

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Core

Pipeline

WuDaoKou features an 18-stage pipeline with a 15 cycle misprediction penalty.

Graphics

The exact architecture of the GPU has not been disclosed but there is some evidence that suggest they may be using a S3 Graphics IP (originally owned by VIA Technologies as well but has since been purchased by HTC.) The GPU supports up to three displays using HDMI 1.4b, DisplayPort 1.2a, Embedded DisplayPort 1.3, and VGA. The GPU supports DirectX 11.1 and up to 4K resolution.

Sockets/Platform

All parts use a HFCBGA 37.5×37.5 mm package and are effectively a system on a chip. However, for the most part, those parts get paired with a chipset which serves as an I/O extension chip. The chipset communicates with the microprocessor over standard PCIe 3.0 x4 lanes.

Die

Core module

Octa-core die

• HLMC 28 nm process
• 187 mm² die size
• 2,100,000,000 transistors

All WuDaoKou Processors

Documents

• WuDaoKou

References

• Information was obtained directly from Zhaoxin
• Zhaoxin launches their highest-performance Chinese x86 chips