From WikiChip
Difference between revisions of "intel/microarchitectures/core (client)"
< intel‎ | microarchitectures

 
(One intermediate revision by one other user not shown)
Line 7: Line 7:
 
|introduction=April, 2006
 
|introduction=April, 2006
 
|phase-out=May, 2009
 
|phase-out=May, 2009
|isa=x86-16
+
|isa=x86-64
|isa 2=x86-32
 
|isa 3=x86-64
 
 
|process=65 nm
 
|process=65 nm
 
|predecessor=Modified Pentium M
 
|predecessor=Modified Pentium M

Latest revision as of 20:08, 9 March 2018

Edit Values
Core µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
IntroductionApril, 2006
Phase-outMay, 2009
Process65 nm
Instructions
ISAx86-64
Succession

Core was the microarchitecture for Intel's 65 nm process for desktops and servers as a successor to NetBurst. Core was replaced by the Penryn microarchitecture in late 2008.

Architecture[edit]

New text document.svg This section is empty; you can help add the missing info by editing this page.

Key changes from NetBurst[edit]

New text document.svg This section is empty; you can help add the missing info by editing this page.

Overview[edit]

When Core was introduced in 2006, Intel described it as a merger of both P6 and NetBurst. When scrutinizing the details, it's fairly clear that little was actually borrowed from NetBurst. In fact, it wasn't until Intel's entirely new microarchitecture Sandy Bridge that a true merger presented itself.

New text document.svg This section requires expansion; you can help adding the missing info.

Die Shot[edit]

Dual-core Core[edit]

  • Woodcrest
  • 143 mm²
  • 291,000,000 transistors
  • 65 nm process
  • 2 cores
intel woodcrest die shot.jpg

Documents[edit]


codenameCore +
designerIntel +
first launchedApril 2006 +
full page nameintel/microarchitectures/core (client) +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameCore +
phase-outMay 2009 +
process65 nm (0.065 μm, 6.5e-5 mm) +