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Difference between revisions of "64-bit architecture"

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== 64-bit microprocessors ==
 
== 64-bit microprocessors ==
 +
{| border="0" cellpadding="5" width="75%"
 +
|-
 +
|width="25%" valign="top" align="left"|
 
=== [[Alpha]] ===
 
=== [[Alpha]] ===
 
<div style="margin: 30px;">
 
<div style="margin: 30px;">
−
'''DEC'''
+
'''[[DEC]]'''
 
* {{decc|Alpha}}
 
* {{decc|Alpha}}
 
</div>
 
</div>
−
 
−
 
 
=== [[ARM]] ===
 
=== [[ARM]] ===
 
<div style="margin: 30px;">
 
<div style="margin: 30px;">
−
'''MediaTek'''
+
'''[[MediaTek]]'''
 
* {{mediatek|Helio}}
 
* {{mediatek|Helio}}
−
'''Phytium'''
+
'''[[Phytium]]'''
 
* {{phytium|FT-1500A}}
 
* {{phytium|FT-1500A}}
 
</div>
 
</div>
−
 
+
|width="25%" valign="top" align="left"|
 
=== [[MIPS]] ===
 
=== [[MIPS]] ===
 
<div style="margin: 30px;">
 
<div style="margin: 30px;">
−
'''Cavium'''
+
'''[[Cavium]]'''
 
{{collist
 
{{collist
 
| count = 1
 
| count = 1
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}}
 
}}
 
</div>
 
</div>
−
 
 
=== [[POWER]] ===
 
=== [[POWER]] ===
 
<div style="margin: 30px;">
 
<div style="margin: 30px;">
−
'''IBM'''
+
'''[[IBM]]'''
 
{{collist
 
{{collist
 
| count=1
 
| count=1
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}}
 
}}
 
</div>
 
</div>
 +
|width="25%" valign="top" align="left"|
 +
=== [[SPARC]] ===
 +
<div style="margin: 30px;">
 +
'''[[Fujitsu]]'''
 +
* {{fujitsu|SPARC64}}
 +
'''[[Oracle]]'''
 +
* {{oracle|SPARC}}
 +
'''[[Sun Microsystems]]'''
 +
* {{sun|UltraSPARC}}
 +
</div>
 +
|}
  
 
=== [[x86]] ===
 
=== [[x86]] ===
−
<div style="margin: 30px;">
 
−
'''AMD'''
 
 
{{collist
 
{{collist
−
| count = 4
+
| style = padding-left: 20px
−
| width = 600px
+
| count = 3
 
|
 
|
−
* {{amd|A10}}
+
'''[[AMD]]'''
−
* {{amd|A8}}
+
{{#ask: [[Category:all microarchitectures]] [[designer::AMD]] [[instruction set architecture::x86-64]]
−
* {{amd|Athlon 64}}
+
| ?full page name
−
* {{amd|Athlon 64 X2}}
+
| ?name
−
* {{amd|Athlon II X2}}
+
| sort= first launched
−
* {{amd|Athlon II X3}}
+
| format=template
−
* {{amd|Athlon II X4}}
+
| template=list item
−
* {{amd|Athlon MP}}
+
| mainlabel=-
−
* {{amd|Athlon X2}}
+
| userparam=1
−
* {{amd|Athlon X4}}
 
−
* {{amd|Athlon XP}}
 
−
* {{amd|Athlon XP-M}}
 
−
* {{amd|EPYC}}
 
−
* {{amd|Geode NX}}
 
−
* {{amd|Mobile Athlon 64}}
 
−
* {{amd|Opteron}}
 
−
* {{amd|Phenom II X2}}
 
−
* {{amd|Phenom II X3}}
 
−
* {{amd|Phenom II X4}}
 
−
* {{amd|Phenom X3}}
 
−
* {{amd|Phenom X4}}
 
−
* {{amd|Ryzen 3}}
 
−
* {{amd|Ryzen 5}}
 
−
* {{amd|Ryzen 7}}
 
−
* {{amd|Sempron}}
 
−
* {{amd|Turion 64}}
 
−
* {{amd|Turion 64 X2}}
 
−
* {{amd|Turion II}}
 
−
* {{amd|Turion II Ultra}}
 
−
* {{amd|Turion X2 Ultra}}
 
 
}}
 
}}
−
'''Intel'''
+
'''[[Intel]]'''
 +
{{#ask: [[Category:all microarchitectures]] [[designer::Intel]] [[instruction set architecture::x86-64]]
 +
| ?full page name
 +
| ?name
 +
| sort= first launched
 +
| format=list
 +
| format=template
 +
| template=list item
 +
| mainlabel=-
 +
| userparam=1
 +
}}
 +
}}
 +
{{clear}}
 +
=== [[IA-64]] ===
 
{{collist
 
{{collist
−
| count = 4
+
| style = padding-left: 20px
−
| width = 750px
+
| count = 3
 
|
 
|
−
* {{intel|Atom}}
+
'''[[Intel]]'''
−
* {{intel|Atom x3}}
+
{{#ask: [[Category:all microarchitectures]] [[designer::Intel]] [[instruction set architecture::IA-64]]
−
* {{intel|Atom x5}}
+
| ?full page name
−
* {{intel|Atom x7}}
+
| ?name
−
* {{intel|Celeron}}
+
| sort= first launched
−
* {{intel|Core i3}}
+
| format=list
−
* {{intel|Core i5}}
+
| format=template
−
* {{intel|Core i7}}
+
| template=list item
−
* {{intel|Core i7 Extreme Edition}}
+
| mainlabel=-
−
* {{intel|Pentium (2009)}}
+
| userparam=1
−
* {{intel|Xeon}}
+
}}
−
* {{intel|Xeon D}}
 
−
* {{intel|Xeon E3}}
 
−
* {{intel|Xeon E5}}
 
−
* {{intel|Xeon E7}}
 
 
}}
 
}}
−
</div>
 
  
 
=== Other ===
 
=== Other ===
 
<div style="margin: 30px;">
 
<div style="margin: 30px;">
−
{{expand list}}
+
'''[[NEC]] SX'''
 +
* [[nec/microarchitectures/sx-aurora|SX-Aurora]]
 
</div>
 
</div>
 +
 
=== Research/University ===
 
=== Research/University ===
 
<div style="margin: 30px;">
 
<div style="margin: 30px;">

Latest revision as of 11:00, 29 April 2025

Architecture word sizes
v · d · e

The 64-bit architecture is a microprocessor or computer architecture that has a datapath width or a highest operand width of 64 bits or 8 octets. These architectures typically have a matching register file with registers width of 64 bits.

64-bit microprocessors[edit]

Alpha[edit]

ARM[edit]

MIPS[edit]

POWER[edit]

SPARC[edit]

x86[edit]

AMD

Intel

IA-64[edit]

Intel

Other[edit]

Research/University[edit]

This list is incomplete; you can help by expanding it.

64-bit microcontrollers[edit]

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