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SPARC64 - Fujitsu
< fujitsu

Developer Fujitsu, HAL Computer Systems
Manufacturer Fujitsu, TSMC
Type Microprocessors
Introduction November, 1995 (announced)
November, 1995 (launch)
µarch SPARC64*
Word size 64 bit
8 octets
16 nibbles
Process 400 nm
0.4 μm
4.0e-4 mm
, 350 nm
0.35 μm
3.5e-4 mm
, 250 nm
0.25 μm
2.5e-4 mm
, 150 nm
0.15 μm
1.5e-4 mm
, 130 nm
0.13 μm
1.3e-4 mm
, 90 nm
0.09 μm
9.0e-5 mm
, 65 nm
0.065 μm
6.5e-5 mm
, 45 nm
0.045 μm
4.5e-5 mm
, 40 nm
0.04 μm
4.0e-5 mm
, 28 nm
0.028 μm
2.8e-5 mm
, 20 nm
0.02 μm
2.0e-5 mm
Technology CMOS
Clock 118 MHz-4,250 MHz

SPARC64 is a family of high-performance 64-bit SPARC microprocessors designed by Fujitsu (originally HAL's) since the mid-1990s. Fujitsu's SPARC64-based computer systems are used in their own high-performance mission-critical UNIX servers.


SPARC64 is a family of high-performance SPARC-V9 microprocessors that has been in continuously active development since the 1990. SPARC emerged as the one of only two RISC processors to survive in the high-performance market. Fujitsu's SPARC64 origin goes back to a 1990-startup company by the name of HAL Computer Systems which was established by an ex-IBMer for the sole purpose of designing the fastest 64-bit RISC processor.


In 1995 HAL introduced the first SPARC64 processor, just a few short months before Sun Microsystems introduced their own SPARC-V9 64-bit microprocessor. The processor, which operated at around 118 MHz and was manufactured on Fujitsu's 0.4µm process, found itself in many high-end workstations. Packaged in an MCM along with four cache chips and an MMU, the processors was designed as a 64-bit superscalar speculative out-of-order. About a year and half later HAL introduced the SPARC64 II which enjoyed higher performance through higher clock speed from a process node shrink.

HAL's final design was the SPARC64 GP which was fabricated on Fujitsu's 0.24µm process. Around 2001 HAL was mostly dissolved with all its assets absorbed into Fujitsu's microelectronics division. The SPARC64 GP was a single-chip design, incorporating the MMU and cache on-die. It was the first design to incorporate key features that would later be found in all future Fujitsu's SPARC64 chips including multiprocessing support, multiple cache levels, and ECC support throughout the entire system and bus interface. The SPARC64 GP was the first time Fujitsu utilized their SPARC64 processors in their server class systems: GRANPOWER and PRIMEPOWER -series. Through a series of node shrinks Fujitsu improved the frequency of the GP from an initial speed of just 250 MHz to over 800 MHz for the last few models.


Following the folding of HAL around 2001, Fujitsu continued the development of the SPARC64 with the introduction of the SPARC64 V. The SPARC64 V is a radical architectural change from all previous designs. Fujitsu's SPARC64 V pipeline is largely based on their mainframe series (the Global Server (GS) series).

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Facts about "SPARC64 - Fujitsu"
designerFujitsu + and HAL Computer Systems +
first announcedNovember 1995 +
first launchedNovember 1995 +
full page namefujitsu/sparc64 +
instance ofmicroprocessor family +
manufacturerFujitsu + and TSMC +
microarchitectureSPARC64* +
process400 nm (0.4 μm, 4.0e-4 mm) +, 350 nm (0.35 μm, 3.5e-4 mm) +, 250 nm (0.25 μm, 2.5e-4 mm) +, 150 nm (0.15 μm, 1.5e-4 mm) +, 130 nm (0.13 μm, 1.3e-4 mm) +, 90 nm (0.09 μm, 9.0e-5 mm) +, 65 nm (0.065 μm, 6.5e-5 mm) +, 45 nm (0.045 μm, 4.5e-5 mm) +, 40 nm (0.04 μm, 4.0e-5 mm) +, 28 nm (0.028 μm, 2.8e-5 mm) + and 20 nm (0.02 μm, 2.0e-5 mm) +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +