From WikiChip
Difference between revisions of "intel/microarchitectures/core (client)"
< intel‎ | microarchitectures

(→‎Overview)
(→‎Overview)
 
(2 intermediate revisions by the same user not shown)
Line 30: Line 30:
  
 
=== Intel Core Lines ===
 
=== Intel Core Lines ===
−
 
+
{{see also|Intel|intel/atom}}
 
{| class="wikitable mw-datatable" style="margin:0.2em auto; text-align:center; min-width:75em;"
 
{| class="wikitable mw-datatable" style="margin:0.2em auto; text-align:center; min-width:75em;"
 
|+Intel Core (+ Pentium 4) Roadmap
 
|+Intel Core (+ Pentium 4) Roadmap
Line 49: Line 49:
 
|-
 
|-
 
| [[180 nm]]
 
| [[180 nm]]
−
| rowspan="4" | [[P6]],<br>[[NetBurst]]
+
| rowspan="2" | [[NetBurst]]
−
| [[Willamette]]
+
| {{intel|Willamette|l=core}}
 
| colspan="2" rowspan="3" | &mdash;
 
| colspan="2" rowspan="3" | &mdash;
 
| 2000-11-20
 
| 2000-11-20
 
| &mdash;
 
| &mdash;
−
| [[Willamette]]
+
| {{intel|Willamette|l=core}}
 
| &mdash;
 
| &mdash;
−
| [[Foster]]
+
| Foster
 
| Foster MP
 
| Foster MP
 
|-
 
|-
−
| [[130 nm]]
+
| [[130 nm]]<hr>[[90 nm]]
−
| {{intel|Northwood|l=core}}<br>/ Mobile <br>Pentium 4<br>{{intel|Banias|l=core}} (P-M)
+
| {{intel|Northwood|l=core}}<hr>{{intel|Prescott|l=arch}}
 
| 2002-01-07
 
| 2002-01-07
−
| Northwood <br>Mobile<br>{{intel|Banias|l=core}}
+
| Northwood <br>Mobile
−
| Northwood <br>(-XE)
+
| Northwood <hr>Prescott
 +
| Northwood-XE <hr>Prescott 2M-XE
 
| Prestonia<br>Gallatin
 
| Prestonia<br>Gallatin
 
| Gallatin
 
| Gallatin
−
| &mdash;
+
|- <!-- Pentium M (arch): Core: Banias, Dothan, Stealey, Canmore, Tolapai; Core: (Atom) Diamondville, Silverthorne -->
−
|-
+
| [[130 nm]]<hr>[[90 nm]]<hr>[[90 nm]]<hr>[[65 nm]]
−
| [[90 nm]]
+
| {{intel|Pentium M|l=arch}}<br>.<hr>.<br>{{intel|Pentium D|l=arch}}<!-- Pentium D: 90 nm Smithfield, 65 nm Presler -->
−
| {{intel|Prescott|l=core}}<br>{{intel|Dothan|l=core}}
+
| {{intel|Banias|l=core}}<hr>{{intel|Dothan|l=core}}<hr>{{intel|Smithfield|l=core}}<hr>{{intel|Presler|l=core}}
 
| 2004-02-01
 
| 2004-02-01
−
| {{intel|Dothan|l=core}}
+
| {{intel|Banias|l=core}}<hr>{{intel|Dothan|l=core}}
−
| [[Prescott]]<br>[[Smithfield]]
+
| {{intel|Smithfield|l=core}}<hr>{{intel|Presler|l=core}}
−
| Prescott 2M-XE<br>Smithfield-XE
+
| Smithfield-XE<hr>Presler-XE
 
| Nocona<br>Irwindale<br>Paxville
 
| Nocona<br>Irwindale<br>Paxville
 
| Potomac<br>Cranford<br>Paxville
 
| Potomac<br>Cranford<br>Paxville
 
|-
 
|-
 
| rowspan="2" | [[65 nm]]
 
| rowspan="2" | [[65 nm]]
−
| [[Cedar Mill]]<br>[[Yonah]]<br>[[Presler]]
+
| {{intel|Modified Pentium M|Modified <br>Pentium M|l=arch}}
−
| 1<br><small>(Yonah <br>only)</small>
+
| {{intel|Yonah|l=core}}<br>{{intel|Cedar Mill|l=core}}
 +
| 1<br><small>(Yonah<br>only)</small>
 
| rowspan="10" | &mdash;
 
| rowspan="10" | &mdash;
 
| 2006-01-05
 
| 2006-01-05
−
| {{intel|Yonah|l=arch}}
+
| Yonah
−
| [[Cedar Mill]]<br>[[Presler]] (P-D)
+
| Cedar Mill
−
| Presler-XE
+
| -
 
| Dempsey<br>Sossaman
 
| Dempsey<br>Sossaman
 
| Xeon "Tulsa" <br>(65 nm)
 
| Xeon "Tulsa" <br>(65 nm)
 
|-
 
|-
 
| rowspan="2" | '''{{intel|core|Intel Core|l=arch}}'''
 
| rowspan="2" | '''{{intel|core|Intel Core|l=arch}}'''
−
| {{intel|Merom|l=arch}}
+
| {{intel|Merom|l=core}}
 
| rowspan="2" | 2
 
| rowspan="2" | 2
 
| 2006-07-27
 
| 2006-07-27
−
| {{intel|Merom|l=arch}}
+
| {{intel|Merom|l=core}}<br>Merom-L
 
| {{intel|Conroe|l=core}}
 
| {{intel|Conroe|l=core}}
 
| {{intel|Kentsfield|l=core}}
 
| {{intel|Kentsfield|l=core}}
Line 107: Line 109:
 
| {{intel|Dunnington|l=core}}
 
| {{intel|Dunnington|l=core}}
 
|-
 
|-
−
| rowspan="2" | [[Nehalem]]
+
| rowspan="2" | {{intel|Nehalem|l=arch}}
−
| [[Nehalem]]
+
| {{intel|Nehalem|l=arch}}
 
| rowspan="2" | 1 <br>(Core i)
 
| rowspan="2" | 1 <br>(Core i)
 
| 2008-11-17
 
| 2008-11-17
Line 118: Line 120:
 
|-
 
|-
 
| rowspan="2" | [[32 nm]]
 
| rowspan="2" | [[32 nm]]
−
| [[Westmere]]
+
| {{intel|Westmere|l=arch}}
 
| 2010-01-04
 
| 2010-01-04
−
| [[Arrandale]]
+
| {{intel|Arrandale|l=core}}
 
| {{intel|Clarkdale|l=core}}
 
| {{intel|Clarkdale|l=core}}
 
| {{intel|Gulftown|l=core}}
 
| {{intel|Gulftown|l=core}}
Line 126: Line 128:
 
| Westmere-EX
 
| Westmere-EX
 
|-
 
|-
−
| rowspan="2" | [[Sandy Bridge]]
+
| rowspan="2" | {{intel|Sandy Bridge|l=arch}}
−
| [[Sandy Bridge]]
+
| {{intel|Sandy Bridge|l=arch}}
 
| 2
 
| 2
 
| 2011-01-09
 
| 2011-01-09
−
| Sandy Bridge-M
+
| {{intel|Sandy Bridge M|l=core}}
−
| [[Sandy Bridge]]
+
| {{intel|Sandy Bridge|l=arch}}
−
| Sandy Bridge-E
+
| {{intel|Sandy Bridge E|l=core}}
 
| Sandy Bridge-EP
 
| Sandy Bridge-EP
 
| &mdash;
 
| &mdash;
 
|-
 
|-
 
| rowspan="3" | [[22 nm]]
 
| rowspan="3" | [[22 nm]]
−
| [[Ivy Bridge]]
+
| {{intel|Ivy Bridge|l=arch}}
 
| 3
 
| 3
 
| 2012-04-29
 
| 2012-04-29
−
| Ivy Bridge-M
+
| {{intel|Ivy Bridge M|l=core}}
−
| [[Ivy Bridge]]
+
| {{intel|Ivy Bridge|l=arch}}
−
| Ivy Bridge-E
+
| {{intel|Ivy Bridge E|l=core}}
 
| Ivy Bridge-EP
 
| Ivy Bridge-EP
 
| Ivy Bridge-EX
 
| Ivy Bridge-EX
 
|-
 
|-
−
| rowspan="3" | [[Haswell]]
+
| rowspan="2" | {{intel|Haswell|l=arch}}
 
| [[Haswell]]
 
| [[Haswell]]
 
| rowspan="2" | 4
 
| rowspan="2" | 4
 
| nobr|2013-06-0
 
| nobr|2013-06-0
−
| Haswell-H<br>Haswell-MB<br>Haswell-ULP/ULX
+
| Haswell-H<br>Haswell-MB<br>Haswell-ULP<br>Haswell-ULX
 
| Haswell-DT
 
| Haswell-DT
 
| Haswell-E
 
| Haswell-E
Line 156: Line 158:
 
| Haswell-EX
 
| Haswell-EX
 
|-
 
|-
−
| [[Devil's Canyon]]
+
| ''Devil's Canyon''
 
| 2014-06
 
| 2014-06
 
| &mdash;
 
| &mdash;
Line 163: Line 165:
 
|-
 
|-
 
| rowspan="10" | [[14 nm]]
 
| rowspan="10" | [[14 nm]]
 +
| {{intel|Broadwell|l=arch}}
 
| [[Broadwell]]
 
| [[Broadwell]]
 
| 5
 
| 5
Line 172: Line 175:
 
| Broadwell-EX
 
| Broadwell-EX
 
|-
 
|-
−
| rowspan="8" | [[Skylake]]
+
| {{intel|Skylake|l=arch}}
 
| [[Skylake]]
 
| [[Skylake]]
 
| 6
 
| 6
 
| 1
 
| 1
 
| 2015-08-05
 
| 2015-08-05
−
| Skylake-H<br>Skylake-U<br>Skylake-Y
+
| {{intel|Skylake H|l=core}}<br>{{intel|Skylake U|l=core}}<br>{{intel|Skylake Y|l=core}}
−
| Skylake-S
+
| {{intel|Skylake S|l=core}}
−
| Skylake-W<br>Skylake-X
+
| {{intel|Skylake W|l=core}}<br>{{intel|Skylake X|l=core}}
−
| colspan="2" | Skylake-SP<br><small>(formerly Skylake-EP/EX)</small> <br>(Xeon Gold, Platinum)
+
| colspan="2" | {{intel|Skylake SP|l=core}}<br><small>(formerly Skylake-EP/EX)</small> <br>(Xeon Gold, Platinum)
 
|-
 
|-
 +
| {{intel|Kaby Lake|l=arch}}
 
| [[Kaby Lake]]
 
| [[Kaby Lake]]
 
| 7 / 8
 
| 7 / 8
 
| rowspan="4" | &mdash;
 
| rowspan="4" | &mdash;
 
| 2016-10
 
| 2016-10
−
| Kaby Lake-G<br>Kaby Lake-H<br>Kaby Lake-U<br>Kaby Lake-Y
+
| {{intel|Kaby Lake G|l=core}}<br>{{intel|Kaby Lake H|l=core}}<br>{{intel|Kaby Lake U|l=core}}<br>{{intel|Kaby Lake Y|l=core}}
−
| Kaby Lake-S
+
| {{intel|Kaby Lake S|l=core}}
−
| Kaby Lake-X
+
| {{intel|Kaby Lake X|l=core}}
 
| colspan="2" | &mdash;
 
| colspan="2" | &mdash;
 
|-
 
|-
 +
| {{intel|Coffee Lake|l=arch}}
 
| [[Coffee Lake]]
 
| [[Coffee Lake]]
 
| 8 / 9
 
| 8 / 9
 
| 2017-10
 
| 2017-10
−
| Coffee Lake-B<br>Coffee Lake-H<br>Coffee Lake-U
+
| {{intel|Coffee Lake B|l=core}}<br>{{intel|Coffee Lake H|l=core}}<br>{{intel|Coffee Lake U|l=core}}
−
| Coffee Lake-S
+
| {{intel|Coffee Lake S|l=core}}
−
| Coffee Lake-W
+
| {{intel|Coffee Lake W|l=core}}
−
| Coffee Lake<br>(Xeon E)
+
| [[Coffee Lake]]<br>(Xeon E)
 
| &mdash;
 
| &mdash;
 
|-
 
|-
 +
| {{intel|Whiskey Lake|l=arch}}
 
| [[Whiskey Lake]]
 
| [[Whiskey Lake]]
 
| 8
 
| 8
 
| rowspan="2" | 2018-08-28
 
| rowspan="2" | 2018-08-28
−
| Whiskey Lake-U
+
| {{intel|Whiskey Lake U|l=core}}
 
| colspan="2" rowspan="2" | &mdash;
 
| colspan="2" rowspan="2" | &mdash;
 
| colspan="2" rowspan="2" | &mdash;
 
| colspan="2" rowspan="2" | &mdash;
 
|-
 
|-
 +
| {{intel|Amber Lake|l=arch}}
 
| [[Amber Lake]]
 
| [[Amber Lake]]
 
| 8 / 10
 
| 8 / 10
−
| Amber Lake-Y
+
| {{intel|Amber Lake Y|l=core}}
 
|-
 
|-
 +
| {{intel|Cascade Lake|l=arch}}
 
| [[Cascade Lake]]
 
| [[Cascade Lake]]
 
| &mdash;
 
| &mdash;
Line 216: Line 224:
 
| 2019-04-02
 
| 2019-04-02
 
| colspan="2" | &mdash;
 
| colspan="2" | &mdash;
−
| Cascade Lake-W<br>Cascade Lake-X
+
| {{intel|Cascade Lake W|l=core}}<br>{{intel|Cascade Lake X|l=core}}
−
| colspan="2" | Cascade <br>Lake-AP/SP
+
| colspan="2" | {{intel|Cascade Lake AP|l=core}}<br>{{intel|Cascade Lake SP|l=core}}
 
|-
 
|-
 +
| {{intel|Comet Lake|l=arch}}
 
| [[Comet Lake]]
 
| [[Comet Lake]]
 
| 10
 
| 10
 
| &mdash;
 
| &mdash;
 
| 2019-09
 
| 2019-09
−
| Comet Lake-H<br>Comet Lake-Y<br>{{intel|Comet Lake U|l=core}}
+
| {{intel|Comet Lake H|l=core}}<br>{{intel|Comet Lake Y|l=core}}<br>{{intel|Comet Lake U|l=core}}
 
| {{intel|Comet Lake S|l=core}}
 
| {{intel|Comet Lake S|l=core}}
−
| Comet Lake-W
+
| {{intel|Comet Lake W|l=core}}
 
| colspan="2" | &mdash;
 
| colspan="2" | &mdash;
 
|-
 
|-
 +
| {{intel|Cooper Lake|l=arch}}
 
| [[Cooper Lake]]
 
| [[Cooper Lake]]
 
| &mdash;
 
| &mdash;
Line 233: Line 243:
 
| 2020-06
 
| 2020-06
 
| colspan="4" | &mdash;
 
| colspan="4" | &mdash;
−
| Cooper Lake-SP
+
| {{intel|Cooper Lake SP|l=core}}
 
|-
 
|-
−
| {{intel|Cypress Cove|l=arch}}
 
 
| {{intel|Rocket Lake|l=arch}}
 
| {{intel|Rocket Lake|l=arch}}
 +
| {{intel|Cypress Cove|l=core}}
 
| 11
 
| 11
 
| rowspan=2 | &mdash;
 
| rowspan=2 | &mdash;
 
| 2021-03
 
| 2021-03
 
| &mdash;
 
| &mdash;
−
| Rocket Lake-S
+
| {{intel|Rocket Lake SP|l=core}}
−
| Rocket Lake-W
+
| {{intel|Rocket Lake W|l=core}}
−
| [[Rocket Lake]]<br>(Xeon E)
+
| {{intel|Rocket Lake|l=arch}}<br>(Xeon E)
 
| &mdash;
 
| &mdash;
 
|-
 
|-
 
| rowspan=4 | [[10 nm]]
 
| rowspan=4 | [[10 nm]]
 +
| [[Cannon Lake]]
 
| [[Palm Cove]]
 
| [[Palm Cove]]
−
| [[Cannon Lake]]
 
 
| 8
 
| 8
 
| 2018-05
 
| 2018-05
−
| Cannon Lake-U
+
| {{intel|Cannon Lake U|l=core}}
 
| colspan=2 | &mdash;
 
| colspan=2 | &mdash;
 
| colspan=2 | &mdash;
 
| colspan=2 | &mdash;
 
|-
 
|-
−
| rowspan=2 | [[Sunny Cove]]
+
| [[Ice Lake]]<br><small>(client)</small><br><small>(server)</small>
−
| [[Ice Lake]]
+
| rowspan=2 | [[Sunny Cove]]<br>.<hr>.<br>+ 4x {{intel|Tremont|l=arch}}
 
| 10
 
| 10
 
| 3
 
| 3
−
| 2019-09<br><small>(mobile)</small><br>2021-04<br><small>(server)</small>
+
| 2019-09<br><small>(client)</small><br>2021-04<br><small>(server)</small>
−
| Ice Lake-U<br>Ice Lake-Y
+
| {{intel|Ice Lake U|l=core}}<br>{{intel|Ice Lake Y|l=core}}
 
| &mdash;
 
| &mdash;
−
| Ice Lake-W
+
| {{intel|Ice Lake W|l=core}}
−
| Ice Lake-SP <!-- + Cooper Lake -->
+
| {{intel|Ice Lake SP|l=core}} <!-- + Cooper Lake -->
 
| &mdash;
 
| &mdash;
 
|-
 
|-
−
| {{intel|Lakefield|l=arch}}<br><small>(hybrid)</small>
+
| {{intel|Lakefield|l=arch}}<br><small>(hybrid)</small><br>({{intel|Foveros}})
 
| &mdash;
 
| &mdash;
 
| rowspan="3" | &mdash;
 
| rowspan="3" | &mdash;
Line 276: Line 286:
 
| &mdash;
 
| &mdash;
 
|-
 
|-
 +
| {{intel|Tiger Lake|l=arch}}
 
| {{intel|Willow Cove|l=arch}}
 
| {{intel|Willow Cove|l=arch}}
−
| {{intel|Tiger Lake|l=arch}}
 
 
| 11
 
| 11
 
| 2020-09
 
| 2020-09
Line 287: Line 297:
 
|-
 
|-
 
| rowspan="4" | [[Intel]] [[7 nm]]
 
| rowspan="4" | [[Intel]] [[7 nm]]
 +
| {{intel|Alder Lake|l=arch}}<br><small>(hybrid)</small>
 
| rowspan="2" | {{intel|Golden Cove|l=arch}} (P)<br>{{intel|Gracemont|l=arch}} (E)
 
| rowspan="2" | {{intel|Golden Cove|l=arch}} (P)<br>{{intel|Gracemont|l=arch}} (E)
−
| {{intel|Alder Lake|l=arch}}<br><small>(hybrid)</small>
 
 
| 12
 
| 12
 
| 2021-11-04 <!-- ? "Sunny Cove" -->
 
| 2021-11-04 <!-- ? "Sunny Cove" -->
Line 305: Line 315:
 
| Sapphire <br>Rapids-SP
 
| Sapphire <br>Rapids-SP
 
|-
 
|-
 +
| {{intel|Raptor Lake|l=arch}}<br><small>(hybrid)</small>
 
| rowspan="2" | {{intel|Raptor Cove|l=arch}} (P)<br>{{intel|Gracemont|l=arch}} (E)
 
| rowspan="2" | {{intel|Raptor Cove|l=arch}} (P)<br>{{intel|Gracemont|l=arch}} (E)
−
| {{intel|Raptor Lake|l=arch}}<br><small>(hybrid)</small>
 
 
| 13 / 14 /<br>Series<br> 1 / 2
 
| 13 / 14 /<br>Series<br> 1 / 2
 
| &mdash;
 
| &mdash;
Line 324: Line 334:
 
|-
 
|-
 
| [[Intel]] [[4 nm]]
 
| [[Intel]] [[4 nm]]
 +
| {{intel|Meteor Lake|l=arch}}<br><small>(hybrid)</small>
 
| rowspan="2" | {{intel|Redwood Cove|l=arch}} (P)<br>{{intel|Crestmont|l=arch}} (E)
 
| rowspan="2" | {{intel|Redwood Cove|l=arch}} (P)<br>{{intel|Crestmont|l=arch}} (E)
−
| {{intel|Meteor Lake|l=arch}}<br><small>(hybrid)</small>
 
 
| Ultra <br>Series 1
 
| Ultra <br>Series 1
 
| &mdash;
 
| &mdash;
Line 343: Line 353:
 
|-
 
|-
 
| rowspan="2" | TSMC N3B
 
| rowspan="2" | TSMC N3B
 +
| {{intel|Lunar Lake|l=arch}}<br><small>(hybrid)</small>
 
| rowspan="2" | {{intel|Lion Cove|l=arch}} (P)<br>{{intel|Skymont|l=arch}} (E)
 
| rowspan="2" | {{intel|Lion Cove|l=arch}} (P)<br>{{intel|Skymont|l=arch}} (E)
−
| {{intel|Lunar Lake|l=arch}}<br><small>(hybrid)</small>
 
 
| Ultra<br>200V <!-- Core Ultra 200V -->
 
| Ultra<br>200V <!-- Core Ultra 200V -->
 
| rowspan="3" | &mdash;
 
| rowspan="3" | &mdash;
Line 362: Line 372:
 
|-
 
|-
 
| rowspan="2" | [[Intel]] 18A
 
| rowspan="2" | [[Intel]] 18A
 +
| {{intel|Panther Lake|l=arch}}<br><small>(hybrid)</small>
 
| {{intel|Cougar Cove|l=arch}} (P)<br>{{intel|Darkmont|l=arch}} (E) <!-- Cougar Cove (P-cores), Darkmont (E-cores) -->
 
| {{intel|Cougar Cove|l=arch}} (P)<br>{{intel|Darkmont|l=arch}} (E) <!-- Cougar Cove (P-cores), Darkmont (E-cores) -->
−
| {{intel|Panther Lake|l=arch}}<br><small>(hybrid)</small>
 
 
| Ultra <br>300 <!-- Core Ultra 300 -->
 
| Ultra <br>300 <!-- Core Ultra 300 -->
 
| 2025
 
| 2025
Line 372: Line 382:
 
| &mdash;
 
| &mdash;
 
|-
 
|-
 +
| {{intel|Diamond Rapids|l=arch}}
 
| {{intel|Panther Cove X|l=arch}} <!-- Panther Cove X, Mountain Stream -->
 
| {{intel|Panther Cove X|l=arch}} <!-- Panther Cove X, Mountain Stream -->
−
| {{intel|Diamond Rapids|l=arch}}
 
 
| &mdash;
 
| &mdash;
 
|  
 
|  
Line 384: Line 394:
 
|-
 
|-
 
| rowspan="2" | TBA<br>(TSMC <br>2&nbsp;nm or<br>Intel 18A)
 
| rowspan="2" | TBA<br>(TSMC <br>2&nbsp;nm or<br>Intel 18A)
 +
| {{intel|Nova Lake|l=arch}}<br><small>(hybrid)</small>
 
| {{intel|Coyote Cove|l=arch}} <!-- Coyote Cove (P), Arctic Wolf (E) -->
 
| {{intel|Coyote Cove|l=arch}} <!-- Coyote Cove (P), Arctic Wolf (E) -->
−
| {{intel|Nova Lake|l=arch}}<br><small>(hybrid)</small>
 
 
|  
 
|  
 
| &mdash;
 
| &mdash;
Line 395: Line 405:
 
| &mdash;
 
| &mdash;
 
|-
 
|-
 +
| {{intel|Razer Lake|l=arch}}<br><small>(hybrid)</small>
 
|  
 
|  
−
| {{intel|Razer Lake|l=arch}}<br><small>(hybrid)</small>
 
 
|  
 
|  
 
| &mdash;
 
| &mdash;

Latest revision as of 21:17, 25 February 2025

Edit Values
Core µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
IntroductionApril, 2006
Phase-outMay, 2009
Process65 nm
Instructions
ISAx86-64
Succession

Core was the microarchitecture for Intel's 65 nm process for desktops and servers as a successor to NetBurst. Core was replaced by the Penryn microarchitecture in late 2008.

Architecture[edit]

New text document.svg This section is empty; you can help add the missing info by editing this page.

Key changes from NetBurst[edit]

New text document.svg This section is empty; you can help add the missing info by editing this page.

Overview[edit]

  • When Core was introduced in 2006, Intel described it as a merger of both P6 and NetBurst.
When scrutinizing the details, it's fairly clear that little was actually borrowed from NetBurst.
In fact, it wasn't until Intel's entirely new microarchitecture Sandy Bridge that a true merger presented itself.
New text document.svg This section requires expansion; you can help adding the missing info.


Intel Core Lines[edit]

See also: Intel and intel/atom
Intel Core (+ Pentium 4) Roadmap
Fab
process 		Micro-
architecture 		Code
names 		Core
Gen 		Scalable
(Xeon)
Gen 		Release
date 		Processors
Mobile Desktop Enthusiast/
Workstation 		1P/2P
Server 		4P/8P
Server
180 nm NetBurst Willamette — 2000-11-20 — Willamette — Foster Foster MP
130 nm
90 nm 		Northwood
Prescott 		2002-01-07 Northwood
Mobile 		Northwood
Prescott 		Northwood-XE
Prescott 2M-XE 		Prestonia
Gallatin 		Gallatin
130 nm
90 nm
90 nm
65 nm 		Pentium M
.
.
Pentium D 		Banias
Dothan
Smithfield
Presler 		2004-02-01 Banias
Dothan 		Smithfield
Presler 		Smithfield-XE
Presler-XE 		Nocona
Irwindale
Paxville 		Potomac
Cranford
Paxville
65 nm Modified
Pentium M 		Yonah
Cedar Mill 		1
(Yonah
only) 		— 2006-01-05 Yonah Cedar Mill - Dempsey
Sossaman 		Xeon "Tulsa"
(65 nm)
Intel Core Merom 2 2006-07-27 Merom
Merom-L 		Conroe Kentsfield Woodcrest
Clovertown 		Tigerton
45 nm Penryn 2007-11-11 Penryn Wolfdale Yorkfield Harpertown Dunnington
Nehalem Nehalem 1
(Core i) 		2008-11-17 Clarksfield Lynnfield Bloomfield Gainestown Beckton
32 nm Westmere 2010-01-04 Arrandale Clarkdale Gulftown Westmere-EP Westmere-EX
Sandy Bridge Sandy Bridge 2 2011-01-09 Sandy Bridge M Sandy Bridge Sandy Bridge E Sandy Bridge-EP —
22 nm Ivy Bridge 3 2012-04-29 Ivy Bridge M Ivy Bridge Ivy Bridge E Ivy Bridge-EP Ivy Bridge-EX
Haswell Haswell 4 2013-06-0 Haswell-H
Haswell-MB
Haswell-ULP
Haswell-ULX 		Haswell-DT Haswell-E Haswell-EP Haswell-EX
Devil's Canyon 2014-06 — Haswell-DT —
14 nm Broadwell Broadwell 5 2014-09-05 Broadwell-H
Broadwell-U
Broadwell-Y 		Broadwell-DT Broadwell-E Broadwell-EP Broadwell-EX
Skylake Skylake 6 1 2015-08-05 Skylake H
Skylake U
Skylake Y 		Skylake S Skylake W
Skylake X 		Skylake SP
(formerly Skylake-EP/EX)
(Xeon Gold, Platinum)
Kaby Lake Kaby Lake 7 / 8 — 2016-10 Kaby Lake G
Kaby Lake H
Kaby Lake U
Kaby Lake Y 		Kaby Lake S Kaby Lake X —
Coffee Lake Coffee Lake 8 / 9 2017-10 Coffee Lake B
Coffee Lake H
Coffee Lake U 		Coffee Lake S Coffee Lake W Coffee Lake
(Xeon E) 		—
Whiskey Lake Whiskey Lake 8 2018-08-28 Whiskey Lake U — —
Amber Lake Amber Lake 8 / 10 Amber Lake Y
Cascade Lake Cascade Lake — 2 2019-04-02 — Cascade Lake W
Cascade Lake X 		Cascade Lake AP
Cascade Lake SP
Comet Lake Comet Lake 10 — 2019-09 Comet Lake H
Comet Lake Y
Comet Lake U 		Comet Lake S Comet Lake W —
Cooper Lake Cooper Lake — 3 2020-06 — Cooper Lake SP
Rocket Lake Cypress Cove 11 — 2021-03 — Rocket Lake SP Rocket Lake W Rocket Lake
(Xeon E) 		—
10 nm Cannon Lake Palm Cove 8 2018-05 Cannon Lake U — —
Ice Lake
(client)
(server) 		Sunny Cove
.
.
+ 4x Tremont 		10 3 2019-09
(client)
2021-04
(server) 		Ice Lake U
Ice Lake Y 		— Ice Lake W Ice Lake SP —
Lakefield
(hybrid)
(Foveros) 		— — 2020-06-10 Lakefield —
Tiger Lake Willow Cove 11 2020-09 Tiger Lake-H
Tiger Lake-H35
Tiger Lake-UP3
Tiger Lake-UP4 		—
Intel 7 nm Alder Lake
(hybrid) 		Golden Cove (P)
Gracemont (E) 		12 2021-11-04 Alder Lake-H
Alder Lake-HX
Alder Lake-U
Alder Lake M 		Alder Lake S Alder Lake P —
Sapphire Rapids — 4 2023-01-10 — Sapphire
Rapids-WS 		Sapphire
Rapids-SP/HBM
(Xeon Max) 		Sapphire
Rapids-SP
Raptor Lake
(hybrid) 		Raptor Cove (P)
Gracemont (E) 		13 / 14 /
Series
1 / 2 		— 2022-10-20 Raptor Lake-HX
Raptor Lake-PX
Raptor Lake U 		Raptor Lake S Raptor Lake H
Raptor Lake P 		Raptor Lake
(Xeon E) 		—
Emerald Rapids — 5 2023-12-14 — Emerald
Rapids-SP
Intel 4 nm Meteor Lake
(hybrid) 		Redwood Cove (P)
Crestmont (E) 		Ultra
Series 1 		— 2023-12-14 Meteor Lake-H
Meteor Lake-U 		— —
Intel 3 nm Granite Rapids — Xeon 6 2024-09-24 — Granite Rapids-AP
Granite Rapids-SP 		—
TSMC N3B Lunar Lake
(hybrid) 		Lion Cove (P)
Skymont (E) 		Ultra
200V 		— 2024-09 Lunar Lake-V — —
Arrow Lake
(hybrid) 		Ultra
Series 2 		2024-10-24
(desktop)
2025-01-06
(mobile) 		Arrow Lake-H
Arrow Lake-HX
Arrow Lake-U 		Arrow Lake-S — —
Intel 18A Panther Lake
(hybrid) 		Cougar Cove (P)
Darkmont (E) 		Ultra
300 		2025 Panther Lake-H
Panther Lake-HL
Panther Lake-U
Panther Lake-UL 		 ? — —
Diamond Rapids Panther Cove X — 2025 — — —
TBA
(TSMC
2 nm or
Intel 18A) 		Nova Lake
(hybrid) 		Coyote Cove — 2026 — TBA TBA — —
Razer Lake
(hybrid) 		— 2027 — TBA TBA — —

Die Shot[edit]

Dual-core Core[edit]

  • Woodcrest
  • 143 mm²
  • 291,000,000 transistors
  • 65 nm process
  • 2 cores
intel woodcrest die shot.jpg

Documents[edit]


Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/core_(client)&oldid=102873"
Facts about "Core - Microarchitectures - Intel"
RDF feed
codenameCore +
designerIntel +
first launchedApril 2006 +
full page nameintel/microarchitectures/core (client) +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameCore +
phase-outMay 2009 +
process65 nm (0.065 μm, 6.5e-5 mm) +