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  • ...microprocessors of the [[amd/k6|K6]] family. Other members used the [[amd/packages/super socket 7|CPGA-321]] and {{\\|CBGA-360}} package.
    2 KB (309 words) - 18:42, 25 July 2020
  • 2 KB (295 words) - 04:45, 2 December 2016
  • ...ned by [[Intel]] for their {{intel|5 Series}} chipset. It's considered a {{packages|Socket-G1}} type although it's not socket-mounted and is instead permanentl
    2 KB (274 words) - 18:31, 1 December 2016
  • 2 KB (275 words) - 22:17, 12 April 2017
  • |predecessor link=amd/packages/socket fm2+ |predecessor 2 link=amd/packages/socket am3+
    30 KB (6,098 words) - 01:58, 12 January 2024
  • #REDIRECT [[amd/packages/socket am4]]
    37 bytes (5 words) - 08:59, 21 July 2020
  • #REDIRECT [[intel/packages/lga-1567]]
    37 bytes (4 words) - 02:06, 10 January 2017
  • #REDIRECT [[amd/packages/socket am4]]
    37 bytes (5 words) - 08:59, 21 July 2020
  • ...s socket accepts Intel's 1151-pin flip-chip land grid array (FCLGA-1151) [[packages]]. This socket is used for Intel's 6th generation, 7th generation, and 8th
    2 KB (343 words) - 01:34, 6 September 2019
  • |successor link=amd/packages/socket strx4 |successor 2 link=amd/packages/socket swrx8
    86 KB (17,313 words) - 02:48, 13 March 2023
  • #REDIRECT [[amd/packages/socket_tr4]]
    37 bytes (5 words) - 14:52, 11 August 2018
  • |predecessor link=amd/packages/socket g34 |successor link=amd/packages/socket sp5
    110 KB (21,122 words) - 02:46, 13 March 2023
  • * Lidded and lidless (mobile processors) packages OPGA-754 lidded package. Pin AG10 MEMRESET_L is NC on lidless packages.
    5 KB (662 words) - 09:51, 29 January 2020
  • 4 KB (576 words) - 15:27, 30 January 2020
  • 4 KB (490 words) - 22:47, 9 February 2020
  • #REDIRECT [[amd/packages/socket strx4]]
    39 bytes (5 words) - 17:07, 15 April 2022
  • #REDIRECT [[amd/packages/socket swrx8]]
    39 bytes (5 words) - 17:08, 15 April 2022
  • 7 KB (1,029 words) - 18:40, 22 February 2020
  • 8 KB (1,212 words) - 19:01, 22 February 2020
  • 12 KB (1,960 words) - 12:23, 18 July 2020

Page text matches

  • ...edia Interface}} 1.0. All processors use [[packages/socket-g1|PGA-988]] ([[packages/socket-g1|Socket G1]]) packaging. They all have the following features: ...face}} 1.0 and introduced {{x86|AES}} instructions. These processors use {{packages|Socket-G1}}. They all have the following features:
    43 KB (5,739 words) - 21:30, 22 April 2024
  • ...is attractive where performance is more important than cost. Flip-chip BGA packages can be mounted using standard [[printed circuit board]]s and can be replace ...d, high density ceramic substrates or organic laminate. Additionally fcBGA packages are often offered in bare die, flat lid, and full lid configuration. They a
    2 KB (239 words) - 07:17, 17 December 2013
  • |package module 1={{packages/pdip-28}} |package module 2={{packages/cdip-28}}
    617 bytes (77 words) - 16:03, 13 December 2017
  • ...h the [[Intel 4004]]. The chip came in 16-pin [[Dual in-line package|DIP]] packages. The HD35404 was part of the [[Hitachi HMCS-4]], an [[Intel MCS-4]] clone.
    1 KB (157 words) - 01:34, 24 December 2015
  • ...ters may be formed by powering selected LED elements. SSDs come in various packages and pin arranges.
    4 KB (490 words) - 09:47, 24 July 2019
  • 1 KB (209 words) - 20:19, 26 November 2015
  • ...packages]]. Most designers are thus restricted to one of those pre-defined packages. Sometimes the device that's designed does not utilize all the pins for var
    2 KB (238 words) - 20:56, 26 November 2015
  • |package module 1={{packages/intel/fcbga-1364}}
    4 KB (404 words) - 16:22, 13 December 2017
  • |package module 1={{packages/intel/fcbga-1364}}
    3 KB (401 words) - 14:24, 12 February 2019
  • |package module 1={{packages/intel/fcbga-1364}}
    3 KB (399 words) - 16:22, 13 December 2017
  • |package module 1={{packages/intel/fcbga-1364}}
    3 KB (400 words) - 16:22, 13 December 2017
  • |package module 1={{packages/intel/fcbga-1364}}
    3 KB (399 words) - 16:22, 13 December 2017
  • |package module 1={{packages/intel/fcbga-1364}}
    3 KB (386 words) - 09:14, 26 December 2017
  • |package module 1={{packages/intel/fcbga-1364}}
    3 KB (401 words) - 16:22, 13 December 2017
  • |package module 1={{packages/intel/fcbga-1364}}
    3 KB (397 words) - 16:22, 13 December 2017
  • |package module 1={{packages/intel/fcbga-1364}}
    3 KB (398 words) - 16:22, 13 December 2017
  • |package module 1={{packages/intel/fcbga-1364}}
    4 KB (406 words) - 16:22, 13 December 2017
  • |package module 1={{packages/intel/fcbga-1364}}
    4 KB (404 words) - 16:19, 13 December 2017
  • |package module 1={{packages/intel/fcbga-1364}}
    3 KB (401 words) - 16:19, 13 December 2017
  • |package module 1={{packages/intel/fcbga-1364}}
    3 KB (396 words) - 16:22, 13 December 2017

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