From WikiChip
Difference between revisions of "amd/microarchitectures/zen 3"
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|designer=AMD | |designer=AMD | ||
|manufacturer=TSMC | |manufacturer=TSMC | ||
− | |introduction=2020 | + | |manufacturer 2=GlobalFoundries |
− | |process=7 | + | |introduction=October 8, 2020 |
+ | |process=7nm | ||
+ | |process 2=12 nm | ||
+ | |type=Superscalar | ||
+ | |oooe=Yes | ||
+ | |speculative=Yes | ||
+ | |renaming=Yes | ||
+ | |stages=19 | ||
+ | |decode=4-way | ||
+ | |isa=x86-64 | ||
+ | |extension=MOVBE | ||
+ | |extension 2=MMX | ||
+ | |extension 3=SSE | ||
+ | |extension 4=SSE2 | ||
+ | |extension 5=SSE3 | ||
+ | |extension 6=SSSE3 | ||
+ | |extension 7=SSE4A | ||
+ | |extension 8=SSE4.1 | ||
+ | |extension 9=SSE4.2 | ||
+ | |extension 10=POPCNT | ||
+ | |extension 11=AVX | ||
+ | |extension 12=AVX2 | ||
+ | |extension 13=AES | ||
+ | |extension 14=PCLMUL | ||
+ | |extension 15=FSGSBASE | ||
+ | |extension 16=RDRND | ||
+ | |extension 17=FMA3 | ||
+ | |extension 18=F16C | ||
+ | |extension 19=BMI | ||
+ | |extension 20=BMI2 | ||
+ | |extension 21=RDSEED | ||
+ | |extension 22=ADCX | ||
+ | |extension 23=PREFETCHW | ||
+ | |extension 24=CLFLUSHOPT | ||
+ | |extension 25=XSAVE | ||
+ | |extension 26=SHA | ||
+ | |extension 27=UMIP | ||
+ | |extension 28=CLZERO | ||
|predecessor=Zen 2 | |predecessor=Zen 2 | ||
|predecessor link=amd/microarchitectures/zen 2 | |predecessor link=amd/microarchitectures/zen 2 | ||
|successor=Zen 4 | |successor=Zen 4 | ||
|successor link=amd/microarchitectures/zen 4 | |successor link=amd/microarchitectures/zen 4 | ||
− | |||
}} | }} | ||
'''Zen 3''' is a planned [[microarchitecture]] being developed by [[AMD]] as a successor to {{\\|Zen 2}}. | '''Zen 3''' is a planned [[microarchitecture]] being developed by [[AMD]] as a successor to {{\\|Zen 2}}. |
Revision as of 01:56, 11 October 2020
Edit Values | |
Zen 3 µarch | |
General Info | |
Arch Type | CPU |
Designer | AMD |
Manufacturer | TSMC, GlobalFoundries |
Introduction | October 8, 2020 |
Process | 7nm, 12 nm |
Pipeline | |
Type | Superscalar |
OoOE | Yes |
Speculative | Yes |
Reg Renaming | Yes |
Stages | 19 |
Decode | 4-way |
Instructions | |
ISA | x86-64 |
Extensions | MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4A, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA3, F16C, BMI, BMI2, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVE, SHA, UMIP, CLZERO |
Succession | |
Zen 3 is a planned microarchitecture being developed by AMD as a successor to Zen 2.
Contents
History
Zen 3 was formally disclosed in a roadmap by Lisa Su, AMD's CEO, during AMD's Tech Day in February of 2017. Zen 3 will be the 3rd iteration of the Zen microarchitecture. On Investor's Day in May 2017 Jim Anderson, AMD Senior Vice President, confirmed that Zen 3 is set to utilize 7nm+ process.
Codenames
Core | C/T | Target |
---|---|---|
Milan | 64/128 | High-end server multiprocessors |
Genesis Peak | ?/? | Workstation & enthusiasts market processors |
Vermeer | 16/32 | Mainstream to high-end desktops & enthusiasts market processors |
Cezanne | ?/? | Mainstream desktop & mobile processors with GPU |
Process technology
Zen 3 will be fabricated on TSMC's 7nm+ process.
Architecture
There is very limited information available about the architectural improvements of Zen 3.
Key changes from Zen 2
- Unified 8-core CCX with 32 MiB L3$ available to all 8 cores equally
- Wider and more flexible issue in floating-point and integer engines
- Increased number of loads and stores, improved prefetching
- Increased branch prediction bandwidth, "zero-bubble" branch prediction
- Improved µop cache
This list is incomplete; you can help by expanding it.
All Zen 3 Chips
List of all Zen 3-based Processors | |||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Processor | Features | ||||||||||||||||||||||||
Model | Price | Process | Launched | Family | Core | C | T | TDP | L3 | Base | Turbo | Max Mem | SMT | SEV | SME | TSME | |||||||||
Uniprocessors | |||||||||||||||||||||||||
Ryzen 5 5600X | $ 299.00 € 269.10 £ 242.19 ¥ 30,895.67 | 7 nm 0.007 μm , 12 nm7.0e-6 mm 0.012 μm 1.2e-5 mm | 5 November 2020 | Ryzen 5 | Vermeer | 6 | 12 | 65 W 65,000 mW 0.0872 hp 0.065 kW | 32 MiB 32,768 KiB 33,554,432 B 0.0313 GiB | 3.7 GHz 3,700 MHz 3,700,000 kHz | 4.6 GHz 4,600 MHz 4,600,000 kHz | 128 GiB 131,072 MiB 134,217,728 KiB 137,438,953,472 B 0.125 TiB | ✔ | ✘ | ✘ | ✘ | |||||||||
Ryzen 7 5800X | $ 449.00 € 404.10 £ 363.69 ¥ 46,395.17 | 7 nm 0.007 μm , 12 nm7.0e-6 mm 0.012 μm 1.2e-5 mm | 5 November 2020 | Ryzen 7 | Vermeer | 8 | 16 | 105 W 105,000 mW 0.141 hp 0.105 kW | 32 MiB 32,768 KiB 33,554,432 B 0.0313 GiB | 3.8 GHz 3,800 MHz 3,800,000 kHz | 4.7 GHz 4,700 MHz 4,700,000 kHz | 128 GiB 131,072 MiB 134,217,728 KiB 137,438,953,472 B 0.125 TiB | ✔ | ✘ | ✘ | ✘ | |||||||||
Ryzen 9 5900X | $ 549.00 € 494.10 £ 444.69 ¥ 56,728.17 | 7 nm 0.007 μm , 12 nm7.0e-6 mm 0.012 μm 1.2e-5 mm | 5 November 2020 | Ryzen 9 | Vermeer | 12 | 24 | 105 W 105,000 mW 0.141 hp 0.105 kW | 64 MiB 65,536 KiB 67,108,864 B 0.0625 GiB | 3.7 GHz 3,700 MHz 3,700,000 kHz | 4.8 GHz 4,800 MHz 4,800,000 kHz | 128 GiB 131,072 MiB 134,217,728 KiB 137,438,953,472 B 0.125 TiB | ✔ | ✘ | ✘ | ✘ | |||||||||
Ryzen 9 5950X | $ 799.00 € 719.10 £ 647.19 ¥ 82,560.67 | 7 nm 0.007 μm , 12 nm7.0e-6 mm 0.012 μm 1.2e-5 mm | 5 November 2020 | Ryzen 9 | Vermeer | 16 | 32 | 105 W 105,000 mW 0.141 hp 0.105 kW | 64 MiB 65,536 KiB 67,108,864 B 0.0625 GiB | 3.4 GHz 3,400 MHz 3,400,000 kHz | 4.9 GHz 4,900 MHz 4,900,000 kHz | 128 GiB 131,072 MiB 134,217,728 KiB 137,438,953,472 B 0.125 TiB | ✔ | ✘ | ✘ | ✘ | |||||||||
Multiprocessors (dual-socket) | |||||||||||||||||||||||||
Count: 4 |
Designers
- Leslie Barnes, chief architect
Bibliography
- AMD 'Tech Day', February 22, 2017
- AMD 2017 Financial Analyst Day, May 16, 2017
See Also
Facts about "Zen 3 - Microarchitectures - AMD"
codename | Zen 3 + |
designer | AMD + |
first launched | October 8, 2020 + |
full page name | amd/microarchitectures/zen 3 + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | TSMC + and GlobalFoundries + |
microarchitecture type | CPU + |
name | Zen 3 + |
pipeline stages | 19 + |
process | 7 nm (0.007 μm, 7.0e-6 mm) + and 12 nm (0.012 μm, 1.2e-5 mm) + |