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Ryzen Threadripper PRO 5955WX - AMD
Edit Values Ryzen Threadripper PRO 5955WX Designer AMD Manufacturer TSMC, GlobalFoundries Model Number PRO 5955WX Part Number 100-000000447 Market Workstation Introduction March 8, 2022 (launched) Shop Amazon Family Ryzen Threadripper Series 5900 Locked Yes Frequency 4,000 MHz Turbo Frequency 4,500 MHz Clock multiplier 40 ISA x86-64 (x86) Microarchitecture Zen 3 Chipset WRX80 Core Name Chagall Core Family 25 Core Model 8 Process 7 nm Technology CMOS MCP Yes (3 dies) Word Size 64 bit Cores 16 Threads 32 Max Memory 2 TiB Max SMP 1-Way (Uniprocessor) TDP 280 W T junction 0 °C – 95 °C
Package sWRX8 (FC-OLGA)
Dimension 75.40 mm × 58.50 mm × 6.26 mm
Pitch 0.87 mm × 1.00 mm
Pin Count 4094
Socket Socket sWRX8
Ryzen Threadripper PRO 5955WX is a 64-bit 16-core high performance x86 workstation microprocessor introduced by AMD in March 2022. This multi-chip processor, which is based on the Zen 3 microarchitecture, incorporates two Core Complex Dies fabricated on a TSMC 7 nm process and an I/O die manufactured by GlobalFoundries. The PRO 5955WX has a of 280 W with a base frequency of 4.0 GHz and a TDP boost frequency of up to 4.5 GHz. This processor supports up to 2 TiB of octa-channel DDR4-3200 memory.
Main article: Zen 3 § Cache
[Edit/Modify Cache Info]
is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a
by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.
The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.
Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.
Note: All units are in
L1$ 1 MiB
1,048,576 B 9.765625e-4 GiB
L1I$ 512 KiB
524,288 B 4.882812e-4 GiB 16 × 32 KiB 8-way set associative L1D$ 512 KiB
524,288 B 4.882812e-4 GiB 16 × 32 KiB 8-way set associative write-back L2$ 8 MiB
8,388,608 B 0.00781 GiB
16 × 512 KiB 8-way set associative write-back L3$ 64 MiB
67,108,864 B 0.0625 GiB
2 × 32 MiB 16-way set associative write-back
Memory controller [ edit ]
This processor supports
UDIMM, , RDIMM , and LRDIMM memory. The maximum memory capacity is 2 TiB using eight 256 GiB LRDIMMs or 3DS RDIMMs.
[Edit/Modify Memory Info]
Integrated Memory Controller
Max Type DDR4-3200 Supports ECC Yes Max Mem 2 TiB Controllers 8 Channels 8 Max Bandwidth 204.8 GB/s
120,525.977 MiB/s 0.115 TiB/s 0.126 TB/s
Single 25.6 GB/s Double 51.2 GB/s Quad 102.4 GB/s
Octa 204.8 GB/s
Expansions [ edit ]
Main article: Chagall § I/O Interfaces
[Edit/Modify Expansions Info]
PCIe Revision: 4.0 Max Lanes: 128 Configuration: x16, x8, x4, x2, x1
SATA Revision: 3.2 Max Ports: 32
USB Revision: 3.2 Gen 2×1 Max Ports: 4 Rate: 10 Gbit/s
Graphics [ edit ]
This processor has no integrated graphics.
Features [ edit ]
Bibliography [ edit ]