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Zen 5 - Microarchitectures - AMD
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Zen 5 µarch
General Info
Arch TypeCPU
DesignerAMD
ManufacturerTSMC
Introduction2024
Process4 nm, N4X
Core Configs256, 224, 192, 144, 128, 96, 72, 64, 56, 48, 32, 28, 36, 24, 18, 16, 8, 6
PE Configs512, 448, 384, 288, 256, 192, 144, 128, 112, 96, 64, 56, 60, 40, 30, 20
Pipeline
TypeSuperscalar
OoOEYes
SpeculativeYes
Reg RenamingYes
Instructions
ISAAMD64, x86-64
ExtensionsAMX, AVX, AVX2, AVX-512
Cores
Core NamesTurin,
Da Vinci,
Granite Ridge,
Strix Point
Succession

Zen 5 is a microarchitecture Already released and sold being by AMD as a successor to Zen 4

History

Zen 5 was first mentioned by lead architect Michael Clark during a discussion on April 9th, 2018 [1]

Codenames

Product Codenames:

Core Model C/T Target
Turin EPYC 9005 Up to 192/384 High-end EPYC 5th Gen series server multiprocessors
Turin Dense EPYC 9005 Up to 192/384
Shimada Peak Ryzen 9000 Up to ?/? Threadripper Workstation & enthusiasts market processors
Granite Ridge Ryzen 9000 Up to ?/? Mainstream to high-end desktops & enthusiasts market processors
(Gaming Desktop CPU)
Fire Range Ryzen 9000 Up to ?/?
Strix Point Ryzen AI 300 Up to ?/? Mainstream desktop & mobile processors with GPU
(Gaming APU with RDNA3 or RDNA4)
Strix Halo Ryzen AI 300 Up to ?/?
Krackan Point Ryzen AI 300 Up to ?/?
Sonoma Valley Ryzen APU Family Up to ?/? AMD Low-end Ryzen APU Family, Samsung 4 nm (TSMC)
(Zen 5c Quad-core CPU, RDNA3 2CU GPU, TDP 35W)

The Zen 5 microarchitecture powers Ryzen 9000 series desktop processors (codenamed "Granite Ridge"), Epyc 9005 server

processors (codenamed "Turin"), and Ryzen AI 300 thin and light mobile processors (codenamed "Strix Point").
AMD Ryzen Series
AMD Zen 5Microarchitectures

Architectural Codenames:

Arch Codename
Core Nirvana
CCD Eldora
Comparison
Core Zen Zen+ Zen 2 Zen 3 Zen 3+ Zen 4 Zen 4c Zen 5 Zen 5c Zen 6 Zen 6c
Codename Core Valhalla Cerberus Persephone Dionysus Nirvana Prometheus Morpheus Monarch
CCD Aspen
Highlands
Breckenridge Durango Vindhya Eldora
Cores
(threads)
CCD 8 (16) 8 (16) 16 (32)
CCX 8 (16) 8 (16) 8 (16)
L3 cache CCD 32 MB 32 MB 32 MB 32 MB
CCX 32 MB 32 MB 16 MB 32 MB
Die size CCD area 44 mm2 66.3 mm2 72.7 mm2 70.6 mm2
Core area 7 mm2
(14 nm)
(12 nm) (7 nm) (7 nm) (7 nm) 3.84 mm2
(5 nm)
2.48 mm2
(5 nm)
(4 nm) (3 nm) (2 nm) (2 nm)

Models

Process Technology

Zen 5 is to be produced on a 4nm process,Zen 5c is to be produced on a 3nm process.

Architecture

LITTLE design - Improved 16% IPC and clock speed - possibly more L3 cache per chiplet

Key changes from Zen 4

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Designers

  • David Suggs, chief architect

Bibliography

See also

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• Performance
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codenameZen 5 +
core count256 +, 224 +, 192 +, 144 +, 128 +, 96 +, 72 +, 64 +, 56 +, 48 +, 32 +, 28 +, 36 +, 24 +, 18 +, 16 +, 8 + and 6 +
designerAMD +
first launched2024 +
full page nameamd/microarchitectures/zen 5 +
instance ofmicroarchitecture +
instruction set architectureAMD64 + and x86-64 +
manufacturerTSMC +
microarchitecture typeCPU +
nameZen 5 +
process4 nm (0.004 μm, 4.0e-6 mm) +
processing element count512 +, 448 +, 384 +, 288 +, 256 +, 192 +, 144 +, 128 +, 112 +, 96 +, 64 +, 56 +, 60 +, 40 +, 30 + and 20 +