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Difference between revisions of "arm holdings/microarchitectures/neoverse n2"
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| + | {{armh title|Neoverse N2|arch}} | ||
| + | {{microarchitecture | ||
| + | |atype=CPU | ||
| + | |name=Zeus | ||
| + | |designer=ARM Holdings | ||
| + | |manufacturer=TSMC | ||
| + | |introduction=2020 | ||
| + | |process=7 nm | ||
| + | |oooe=Yes | ||
| + | |speculative=Yes | ||
| + | |renaming=Yes | ||
| + | |predecessor=Ares | ||
| + | |predecessor link=arm_holdings/microarchitectures/ares | ||
| + | |successor=Poseidon | ||
| + | |successor link=arm_holdings/microarchitectures/poseidon | ||
| + | }} | ||
| + | '''Neoverse N2''' (codename '''Perseus''') is the successor to {{\\|Ares}}, a high-performance [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the server market. This microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in their own chips. | ||
| + | == History == | ||
| + | [[File:arm server roadmap techcon 2018.jpg|thumb|right|Arm's server roadmap.]] | ||
| + | Zeus was first announced by Drew Henry, Arm’s SVP and GM of Infrastructure Business Unit, at his TechCon 2018 keynote. | ||
| + | |||
| + | == Release Dates == | ||
| + | Zeus is expected to show up in products around 2020. | ||
| + | |||
| + | == Process Technology == | ||
| + | Zeus specifically designed takes advantage of the power and area advantages of the [[7 nm process|7nm+ process]]. | ||
| + | |||
| + | == Architecture == | ||
| + | {{future information}} | ||
| + | |||
| + | === Key changes from {{\\|Ares}} === | ||
| + | * [[7nm+ process]] (from [[7nm]]) | ||
| + | |||
| + | {{expand list}} | ||
| + | |||
| + | == Bibliography == | ||
| + | * Drew Henry keynote, TechCon 2018 keynote. | ||
Latest revision as of 23:04, 25 April 2021
| Edit Values | |
| Zeus µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | ARM Holdings |
| Manufacturer | TSMC |
| Introduction | 2020 |
| Process | 7 nm |
| Pipeline | |
| OoOE | Yes |
| Speculative | Yes |
| Reg Renaming | Yes |
| Succession | |
Neoverse N2 (codename Perseus) is the successor to Ares, a high-performance ARM microarchitecture designed by ARM Holdings for the server market. This microarchitecture is designed as a synthesizable IP core and is sold to other semiconductor companies to be implemented in their own chips.
Contents
History[edit]
Zeus was first announced by Drew Henry, Arm’s SVP and GM of Infrastructure Business Unit, at his TechCon 2018 keynote.
Release Dates[edit]
Zeus is expected to show up in products around 2020.
Process Technology[edit]
Zeus specifically designed takes advantage of the power and area advantages of the 7nm+ process.
Architecture[edit]
 |
Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release. |
Key changes from Ares[edit]
- 7nm+ process (from 7nm)
This list is incomplete; you can help by expanding it.
Bibliography[edit]
- Drew Henry keynote, TechCon 2018 keynote.
Facts about "Neoverse N2 - Microarchitectures - ARM"
| codename | Zeus + |
| designer | ARM Holdings + |
| first launched | 2020 + |
| full page name | arm holdings/microarchitectures/neoverse n2 + |
| instance of | microarchitecture + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Zeus + |
| process | 7 nm (0.007 μm, 7.0e-6 mm) + |