(Changed the GPU max freq. and Vulkan&OpenCL version number :)) |
|||
(18 intermediate revisions by 8 users not shown) | |||
Line 13: | Line 13: | ||
|family=Exynos | |family=Exynos | ||
|series=Exynos 9 | |series=Exynos 9 | ||
+ | |frequency=2 @ 2,730 MHz | ||
+ | |frequency 2=2 @ 2,310 MHz | ||
+ | |frequency 3=4 @ 1,950 MHz | ||
|isa=ARMv8.2 | |isa=ARMv8.2 | ||
|isa family=ARM | |isa family=ARM | ||
− | + | |microarch=Exynos M4 | |
− | |||
− | |microarch= | ||
|microarch 2=Cortex-A75 | |microarch 2=Cortex-A75 | ||
|microarch 3=Cortex-A55 | |microarch 3=Cortex-A55 | ||
− | |core name= | + | |core name=Cheetah |
|core name 2=Cortex-A75 | |core name 2=Cortex-A75 | ||
|core name 3=Cortex-A55 | |core name 3=Cortex-A55 | ||
|process=8 nm | |process=8 nm | ||
|technology=CMOS | |technology=CMOS | ||
+ | |die area=127 mm² | ||
|word size=64 bit | |word size=64 bit | ||
|core count=8 | |core count=8 | ||
|thread count=8 | |thread count=8 | ||
+ | |max memory=12 GiB | ||
|max cpus=1 | |max cpus=1 | ||
− | |||
|predecessor=Exynos 9810 | |predecessor=Exynos 9810 | ||
|predecessor link=samsung/exynos/9810 | |predecessor link=samsung/exynos/9810 | ||
+ | |successor=Exynos 990 | ||
+ | |successor link=samsung/exynos/990 | ||
+ | |contemporary=Exynos 9825 | ||
+ | |contemporary link=samsung/exynos/9825 | ||
}} | }} | ||
− | '''Exynos 9820''' is a {{arch|64}} [[octa-core]] [[ARM]] high performance mobile [[system on a chip]] designed by [[Samsung]] and introduced in early [[2019]]. The processor is fabricated on Samsung's [[8 nm process|8nm]] LPP (Low Power Plus) FinFET process and features [[8 cores]] in a tri-cluster configuration consisting of 2 {{samsung|Mongoose 4|l=arch}} [[big cores]] and 2 {{armh|Cortex-A75|l=arch}} [[middle cores]] and 4 Cortex-A55 [[little cores]]. This chip supports up to 12 GiB of quad-channel 16-bit LPDDR4X-3600 memory and incorporates a {{armh|Mali-G76}} MP12 GPU. The 9820 incorporates an LTE modem supporting cat 20 download and upload. | + | '''Exynos 9820''' is a {{arch|64}} [[octa-core]] [[ARM]] high performance mobile [[system on a chip]] designed by [[Samsung]] and introduced in early [[2019]]. The processor is fabricated on Samsung's [[8 nm process|8nm]] [[8LPP|LPP (Low Power Plus)]] FinFET process and features [[8 cores]] in a tri-cluster configuration consisting of 2 {{samsung|Mongoose 4|l=arch}} [[big cores]] and 2 {{armh|Cortex-A75|l=arch}} [[middle cores]] and 4 Cortex-A55 [[little cores]]. This chip supports up to 12 GiB of quad-channel 16-bit LPDDR4X-3600 memory and incorporates a {{armh|Mali-G76}} MP12 GPU. The 9820 incorporates an LTE modem supporting cat 20 download and upload. |
− | |||
− | |||
− | |||
Line 43: | Line 46: | ||
For the {{samsung|Mongoose 4|l=arch}} core cluster: | For the {{samsung|Mongoose 4|l=arch}} core cluster: | ||
{{cache size | {{cache size | ||
− | |l1 cache= | + | |l1 cache=192 KiB |
− | |l1i cache= | + | |l1i cache=128 KiB |
− | |l1i break= | + | |l1i break=2x64 KiB |
− | |l1i desc= | + | |l1i desc=4-way set associative |
− | |l1d cache= | + | |l1d cache=64 KiB |
− | |l1d break= | + | |l1d break=2x32 KiB |
− | |l1d desc= | + | |l1d desc=8-way set associative |
− | |l2 cache= | + | |l2 cache=1 MiB |
− | |l2 break= | + | |l2 break=2x512 KiB |
− | |l2 desc= | + | |l2 desc=16-way set associative |
− | |l3 cache= | + | |l3 cache=2 MiB |
− | |l3 break= | + | |l3 break=2x1 MiB |
}} | }} | ||
Line 60: | Line 63: | ||
{{cache size | {{cache size | ||
− | |l1 cache= | + | |l1 cache=256 KiB |
− | |l1i cache= | + | |l1i cache=128 KiB |
− | |l1i break= | + | |l1i break=2x64 KiB |
− | |l1i desc= | + | |l1i desc=4-way set associative |
− | |l1d cache= | + | |l1d cache=128 KiB |
− | |l1d break= | + | |l1d break=2x64 KiB |
− | |l1d desc= | + | |l1d desc=16-way set associative |
− | |l2 cache= | + | |l2 cache=512 KiB |
− | |l2 break= | + | |l2 break=2x256 KiB |
− | |l2 desc= | + | |l2 desc=8-way set associative |
}} | }} | ||
Line 111: | Line 114: | ||
| max displays = 2 | | max displays = 2 | ||
| max memory = | | max memory = | ||
− | | frequency | + | | min frequency = 156MHz |
− | | max frequency = | + | | max frequency = 702MHz |
| output crt = | | output crt = | ||
Line 118: | Line 121: | ||
| output dsi = Yes | | output dsi = Yes | ||
| output edp = | | output edp = | ||
− | | output dp = | + | | output dp = Yes |
| output hdmi = | | output hdmi = | ||
| output vga = | | output vga = | ||
Line 127: | Line 130: | ||
| opengl es ver = 3.2 | | opengl es ver = 3.2 | ||
| openvg ver = 1.1 | | openvg ver = 1.1 | ||
− | | opencl ver = 2 | + | | opencl ver = 2.1 |
− | | vulkan ver = 1. | + | | vulkan ver = 1.1.108 |
| hdmi ver = | | hdmi ver = | ||
| dp ver = | | dp ver = | ||
Line 156: | Line 159: | ||
All at 4K UHD 150fps. | All at 4K UHD 150fps. | ||
+ | |||
+ | == NPU == | ||
+ | The Exynos 9820 features Samsung's homegrown NPU instead of the licensed [[DeePhi]] DLA. The new NPU features 1,024 MACs split between two execution cores. The new NPU is capable of a peaking compute of two teraOPS. | ||
== Wireless == | == Wireless == | ||
Line 188: | Line 194: | ||
== ISP == | == ISP == | ||
− | * | + | * 22MP Rear |
− | * | + | * 22MP Front |
* 16MP+16MP Dual | * 16MP+16MP Dual | ||
Line 223: | Line 229: | ||
== Utilizing devices == | == Utilizing devices == | ||
* [[used by::Samsung Galaxy S10]] | * [[used by::Samsung Galaxy S10]] | ||
− | + | * [[used by::Samsung Galaxy S10 5G]] | |
+ | * [[used by::Samsung Galaxy S10+]] | ||
+ | * [[used by::Samsung Galaxy S10e]] | ||
== Documents == | == Documents == | ||
* [[:File:MobileProcessor-9-Series-9820.pdf|Product Brief]] | * [[:File:MobileProcessor-9-Series-9820.pdf|Product Brief]] |
Revision as of 19:56, 23 October 2020
Edit Values | |
Exynos 9820 | |
General Info | |
Designer | Samsung, ARM Holdings |
Manufacturer | Samsung |
Model Number | 9820 |
Market | Mobile |
Introduction | November 14, 2018 (announced) January, 2019 (launched) |
General Specs | |
Family | Exynos |
Series | Exynos 9 |
Frequency | 2 @ 2,730 MHz, 2 @ 2,310 MHz, 4 @ 1,950 MHz |
Microarchitecture | |
ISA | ARMv8.2 (ARM) |
Microarchitecture | Exynos M4, Cortex-A75, Cortex-A55 |
Core Name | Cheetah, Cortex-A75, Cortex-A55 |
Process | 8 nm |
Technology | CMOS |
Die | 127 mm² |
Word Size | 64 bit |
Cores | 8 |
Threads | 8 |
Max Memory | 12 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Succession | |
Contemporary | |
Exynos 9825 |
Exynos 9820 is a 64-bit octa-core ARM high performance mobile system on a chip designed by Samsung and introduced in early 2019. The processor is fabricated on Samsung's 8nm LPP (Low Power Plus) FinFET process and features 8 cores in a tri-cluster configuration consisting of 2 Mongoose 4 big cores and 2 Cortex-A75 middle cores and 4 Cortex-A55 little cores. This chip supports up to 12 GiB of quad-channel 16-bit LPDDR4X-3600 memory and incorporates a Mali-G76 MP12 GPU. The 9820 incorporates an LTE modem supporting cat 20 download and upload.
Contents
Cache
- Main articles: Mongoose § Cache and Cortex-A76 § Cache
For the Mongoose 4 core cluster:
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
|||||||||||||||||||||||||||||||||||||
|
For the Cortex-A75 cluster:
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
|||||||||||||||||||||||||
|
For the Cortex-A55 cluster:
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
||
|
Memory controller
Integrated Memory Controller
|
||||||||||||||||||
|
Graphics
Integrated Graphics Information
|
||||||||||||||||||||||||||||||||||
|
Codec | Encode | Decode |
---|---|---|
HEVC (H.265) | ✔ | ✔ |
MPEG-4 AVC (H.264) | ✔ | ✔ |
VP9 | ✔ | ✔ |
All at 4K UHD 150fps.
NPU
The Exynos 9820 features Samsung's homegrown NPU instead of the licensed DeePhi DLA. The new NPU features 1,024 MACs split between two execution cores. The new NPU is capable of a peaking compute of two teraOPS.
Wireless
Wireless Communications | |||||||
Cellular | |||||||
4G |
|
---|
ISP
- 22MP Rear
- 22MP Front
- 16MP+16MP Dual
Features
[Edit/Modify Supported Features]
Supported ARM Extensions & Processor Features
|
||||||||
|
Utilizing devices
- Samsung Galaxy S10
- Samsung Galaxy S10 5G
- Samsung Galaxy S10+
- Samsung Galaxy S10e
Documents
- all microprocessor models
- microprocessor models by samsung
- microprocessor models by samsung based on exynos m4
- microprocessor models by samsung based on cortex-a75
- microprocessor models by samsung based on cortex-a55
- microprocessor models by arm holdings
- microprocessor models by arm holdings based on exynos m4
- microprocessor models by arm holdings based on cortex-a75
- microprocessor models by arm holdings based on cortex-a55
core count | 8 + |
core name | Cheetah +, Cortex-A75 + and Cortex-A55 + |
designer | Samsung + and ARM Holdings + |
die area | 127 mm² (0.197 in², 1.27 cm², 127,000,000 µm²) + |
family | Exynos + |
first announced | November 14, 2018 + |
first launched | January 2019 + |
full page name | samsung/exynos/9820 + |
has 4g support | true + |
has ecc memory support | false + |
has lte advanced support | true + |
instance of | microprocessor + |
integrated gpu | Mali-G76 + |
integrated gpu designer | ARM Holdings + |
integrated gpu execution units | 12 + |
integrated gpu max frequency | 702 MHz (0.702 GHz, 702,000 KHz) + |
isa | ARMv8.2 + |
isa family | ARM + |
l1$ size | 192 KiB (196,608 B, 0.188 MiB) + and 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + and 16-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + and 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 16-way set associative + and 8-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + and 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
ldate | January 2019 + |
main image | + |
manufacturer | Samsung + |
market segment | Mobile + |
max cpu count | 1 + |
max memory | 12,288 MiB (12,582,912 KiB, 12,884,901,888 B, 12 GiB, 0.0117 TiB) + |
max memory bandwidth | 26.82 GiB/s (27,463.68 MiB/s, 28.798 GB/s, 28,797.756 MB/s, 0.0262 TiB/s, 0.0288 TB/s) + |
max memory channels | 4 + |
microarchitecture | Exynos M4 +, Cortex-A75 + and Cortex-A55 + |
model number | 9820 + |
name | Exynos 9820 + |
process | 8 nm (0.008 μm, 8.0e-6 mm) + |
series | Exynos 9 + |
smp max ways | 1 + |
supported memory type | LPDDR4X-3600 + |
technology | CMOS + |
thread count | 8 + |
used by | Samsung Galaxy S10 +, Samsung Galaxy S10 5G +, Samsung Galaxy S10+ + and Samsung Galaxy S10e + |
user equipment category downlink | 20 + |
user equipment category uplink | 20 + |
word size | 64 bit (8 octets, 16 nibbles) + |