• 6 µm lithography process
  | nMOS/pMOS || depletion-mode nMOS || nMOS/pMOS/CMOS ||
  1 KB (119 words) - 23:04, 20 May 2018
• 1.5 µm lithography process
  | HMOS-II || HMOS-E || P646 (CHMOS III) || NMOS III || || CMOS-2 ! colspan="3" | [[HP]] NMOS-III Design Rules
  3 KB (332 words) - 23:04, 20 May 2018
• 1 µm lithography process
  | nMOS || CMOS || CMOS || BiCMOS
  1 KB (166 words) - 23:04, 20 May 2018
• toshiba/t3400/t3472
  | tech = nMOS ...designed by [[Toshiba]] during the late 1970s. The [[microprocessor]] uses nMOS technology and was primarily used in printers and displays.
  1 KB (119 words) - 14:45, 3 February 2016
• 8 µm lithography process
  ...d became the first truly widely used DRAM chip. Those chips used Si-gate [[nMOS]] transistors using a polysilicon word line and an aluminum metal bit line. | fab 1 xtor.tech = nMOS, pMOS
  5 KB (632 words) - 23:04, 20 May 2018
• cmos/static
  * pull-down network (PDN) - a set of [[NMOS]] transistors connected between GND and the output line
  1 KB (221 words) - 18:07, 26 November 2018
• mosfet
  [[File:Nmos.svg|thumb|right|[[n-type semiconductor]].]] An '''nMOS transistor''' is built with a p-type body with two regions of n-type semico
  8 KB (1,362 words) - 23:38, 17 November 2015
• inverter
  ...to HIGH as it's connected to VDD but not GND. When the input is HIGH, the nMOS transistor is on and the pMOS transistor is off yielding an output that is ...e \( i_{DP} = i_{DN} = 0 \). When the input is LOW, pMOS is conducting and nMOS is off; the load capacitor is charged via the pMOS device.The power dissipa
  6 KB (983 words) - 04:50, 8 November 2015
• general instrument/sba
  | tech = nMOS
  2 KB (244 words) - 00:33, 19 May 2016
• general instrument/sba/sba-1
  | tech = nMOS
  1 KB (140 words) - 05:28, 22 January 2016
• matsushita/mn1400
  | tech 2 = nMOS ...instructions with a 10 microsecond instruction cycle. The chips come in [[nMOS]], [[pMOS]], and [[CMOS]] versions.
  4 KB (462 words) - 19:14, 13 October 2019
• matsushita/mn1500
  | tech 2 = nMOS | {{matsushita|MN1542}} || 2048x8 ROM, 152x4 RAM, 28 I/O || NMOS ||
  3 KB (301 words) - 19:23, 13 October 2019
• motorola/10800
  ...]], the 10800 series was designed for very high speed applications where [[nMOS]] components were insufficient.
  2 KB (179 words) - 00:03, 3 February 2016
• national semiconductor/cops i
  .... A year later, National introduced the {{national|cops ii|COPS II}}, an [[nMOS]] (and later [[CMOS]]) versions of those chips.
  2 KB (274 words) - 18:29, 5 February 2016
• national semiconductor/cops ii
  | tech = nMOS ...national|cops i|COPS I}} in 1977. Components in the COPS II were made in [[nMOS]] and [[CMOS]] technology instead of [[pMOS]] as used in COPS I. The COPS I
  6 KB (685 words) - 22:49, 5 February 2016
• intel/3000
  | {{\|3222}} || Refresh Controller for 4K NMOS DRAMs
  3 KB (308 words) - 05:03, 18 February 2020
• fujitsu/mb8840
  | tech = nMOS ...40/MB8840H series''' is a [[microprocessor family|family]] of {{arch|4}} [[nMOS]] [[microcontroller]]s developed by [[Fujitsu]] and introduced in 1977{{dat
  2 KB (263 words) - 14:57, 4 February 2016
• fujitsu/mb88500
  * {{fujitsu|MB8840}}, a [[NMOS]] version
  2 KB (215 words) - 14:55, 4 February 2016
• fujitsu/mb8850
  ...is architecturally identical to the {{fujitsu|MB8840|MB8840 family}} (An [[nMOS]] version). The {{fujitsu|MB88500}} series is a high-speed version of this * {{fujitsu|MB8840}}, a [[NMOS]] version
  2 KB (230 words) - 07:46, 28 February 2017
• american microsystems/s2000
  | tech = nMOS
  2 KB (280 words) - 00:57, 19 May 2016
• cmos
  ...fet|MOS]] [[transistor]]s - [[pmos transistor|pMOS]] and [[pMOS transistor|nMOS]]. CMOS is the dominant technology used for [[VLSI]] and [[ULSI]] circuit ...S]] and [[nMOS transistor|nMOS]]. To better understand this, consider an [[nMOS transistor]]. Because it can pull no higher than V_DD - V<sub>t</
  7 KB (1,159 words) - 21:01, 8 February 2019
• bicmos
  ...ors are cascaded with an [[NPN transistor]]. When the input is HIGH, the [[NMOS transitor]] is conducting becoming the base current for the Q₂ N
  2 KB (329 words) - 08:33, 16 January 2019
• gate universality
  ...removing redundant sets of [[pMOS transistor|pMOS]] and [[nMOS transistor|nMOS]] pairs of [[transistor]]s.
  903 bytes (132 words) - 00:34, 8 December 2015
• logic family
  *** [[nmos logic|n-type metal–oxide–semiconductor logic]] (nMOS)
  1 KB (145 words) - 00:40, 26 December 2015
• ti/tms1000
  | tech 2 = nMOS ...OS logic|pMOS]] technology, TI later expended the family into [[nMOS logic|nMOS]] and [[CMOS]].
  6 KB (711 words) - 04:39, 26 April 2017
• ti/tms0100
  | tech = nMOS
  1 KB (121 words) - 22:16, 16 January 2016
• dec/lsi-11
  | tech = nMOS ...1975. The chipset was manufactured by [[Western Digital]] in [[nMOS logic|nMOS]] technology under a $6.3M contract<ref>{{apa mag|month=February|day=26|yea
  2 KB (253 words) - 00:33, 19 May 2016
• western digital/mcp-1600
  | tech = nMOS
  1 KB (148 words) - 01:04, 19 May 2016
• general instrument/pic
  | tech = nMOS
  3 KB (423 words) - 00:33, 19 May 2016
• general instrument/sba/sba
  | tech = nMOS
  1 KB (114 words) - 05:27, 22 January 2016
• toshiba/t3400
  | tech = nMOS
  2 KB (233 words) - 15:20, 3 February 2016
• toshiba/t3400/t3444
  | tech = nMOS ...designed by [[Toshiba]] during the late 1970s. The [[microprocessor]] uses nMOS technology and was primarily used in very low-end controllers.
  1 KB (146 words) - 11:49, 23 May 2021
• amd/am9080
  | tech = nMOS
  5 KB (683 words) - 23:46, 7 March 2018
• fairchild/f8
  | tech = nMOS
  2 KB (172 words) - 17:18, 12 December 2016
• intel/mcs-80
  | tech = nMOS
  4 KB (406 words) - 16:10, 26 January 2019
• 14 nm lithography process
  ...[[Intel]]'s 2nd generation FinFET transistors. Intel uses TiN pMOS / TiAlN nMOS as work function metals. Intel makes use of 193 nm immersion lithography wi ...irst generation of FinFET-based transistors. Samsung uses TiN pMOS / TiAIC nMOS as work function metals. Samsung node has gone through a number of refineme
  17 KB (2,243 words) - 19:32, 25 May 2023
• intel/microarchitectures/kaby lake
  [[File:intel 14nm+ (nmos).png|400px]]
  38 KB (5,431 words) - 10:41, 8 April 2024
• 7 µm lithography process
  | NMOS I | nMOS
  710 bytes (91 words) - 06:15, 18 January 2022
• 5 µm lithography process
  ...ng density. Loveland went on on to create a third and final process, the ''NMOS III'' using a [[1.5 µm process]]. While they succeeded in doubling the den | fab 1 xtor.tech = nMOS
  2 KB (325 words) - 06:22, 20 July 2018
• 3.5 µm lithography process
  | nMOS || nMOS || nMOS
  1 KB (122 words) - 06:21, 20 July 2018
• Property:technology
  ** [[Allows value::nMOS]]
  466 bytes (57 words) - 19:57, 18 February 2020
• amd/am286
  | tech = nMOS
  9 KB (1,192 words) - 01:35, 29 May 2016
• amd/am286/n80c286-20
  ...d. These chips were remade by AMD in [[static CMOS]] design (as opposed to nMOS), resulting in considerably lower power dissipation. This MPU was rated to
  3 KB (288 words) - 15:18, 13 December 2017
• amd/am286/n80c286-16
  ...d. These chips were remade by AMD in [[static CMOS]] design (as opposed to nMOS), resulting in considerably lower power dissipation. This MPU was rated to
  3 KB (290 words) - 15:18, 13 December 2017
• amd/am286/n80c286-12
  ...d. These chips were remade by AMD in [[static CMOS]] design (as opposed to nMOS), resulting in considerably lower power dissipation. This MPU was rated to
  3 KB (290 words) - 15:18, 13 December 2017
• amd/am286/n80c286-8
  ...d. These chips were remade by AMD in [[static CMOS]] design (as opposed to nMOS), resulting in considerably lower power dissipation. This MPU was rated to
  3 KB (260 words) - 15:18, 13 December 2017
• amd/am286/n80c286-10
  ...d. These chips were remade by AMD in [[static CMOS]] design (as opposed to nMOS), resulting in considerably lower power dissipation. This MPU was rated to
  3 KB (261 words) - 15:18, 13 December 2017
• amd/am286/n80l286-8
  | technology = nMOS
  3 KB (275 words) - 15:18, 13 December 2017
• amd/am286/n80l286-10
  | technology = nMOS
  3 KB (274 words) - 15:18, 13 December 2017
• amd/am286/n80l286-12
  | technology = nMOS
  3 KB (289 words) - 15:18, 13 December 2017

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