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4004
4004 in CerDIP
General Info
Designer	Intel
Manufacturer	Intel
Model Number	4004
Part Number	C4004, D4004, P4004
Market	Commercial, Industrial
Introduction	November 15, 1971 (announced) December, 1971 (launched)
End-of-life	1982 (last order)
Shop	Amazon
General Specs
Family	MCS-4
Series	MCS
Frequency	500 kHz, 740 kHz
Microarchitecture
ISA	4004 (4004)
Microarchitecture	4004
Chipset	4001, 4002, 4003
Process	10 µm
Transistors	2,250
Technology	pMOS
Die	12 mm² 4 mm × 3 mm
Word Size	4 bit
Cores	1
Threads	1
Max Address Mem	4 kB
Electrical
Power dissipation	1 W
Vcore	15 V ± 5%
Tstorage	-55 °C – 125 °C
Tambient	0 °C – 70 °C

The Intel 4004 was released by Intel Corporation in 1971 and was the first commercially available microprocessor. The 4004 was a 4-bit CPU, designed for use in the Busicom 141-PF printing calculator. The chip, which is clocked at 740 KHz, employs a 10µm process silicon-gate, capable of executing 92,000 instructions per second. The chip was capable of accessing 4KB of program memory and 640 bytes of RAM. The 4004 was part of the Intel MCS-4 system.

The microprocessor had a limited architecture, such as: only a 3-levels deep stack, a complex memory access scheme, and no interrupt support. In 1974 Intel released an enhanced version of the chip called the 4040.

It began as the "Busicom Project", a joint development by America's Intel and Japan's Busicom, with initial design concepts by Busicom's Masatoshi Shima and Sharp's Tadashi Sasaki in 1968, before being designed by Intel's Marcian Hoff and Federico Faggin and Busicom's Shima from 1969 to April 1970; it was completed under Faggin's leadership, with Shima's assistance, in January 1971. The first commercial sale of the fully operational 4004 occurred in March 1971 to Busicom, for the Busicom 141-PF calculator, for which it was originally designed and built as a custom chip.

Variations

A National Semiconductor version of the 4004, INS4004J

Three primary source variations were produced by Intel: C4004, D4004 and the P4004. The Intel C4004 was the first chip to be manufactured; it had the gray traces visible on the white ceramic package itself. The C4004 was produced up until mid 1976, when production for the Intel D4004 began. The D4004 had a plastic, black ceramic package. The Intel P4004 is the plastic packaging version.

A couple secondary sources exists, which has been developed by National Semiconductor and Hitachi since mid-1975. National Semiconductor produced two versions: INS4004J and INS4004D. The INS4004J is a 16-pin black, ceramic DIP, while the INS4004D version is a 16-pin side-brazed, ceramic DIP. The other source was the HD35404 made by Hitachi. A third source was Microsystems International which actually manufactured an enhanced version of the chip since mid 1970 (also introduced in 1971).

Manufacturer	Model	Package
Intel	C4004	16-pin Ceramic DIP
Intel	D4004	16-pin Ceramic DIP
Intel	P4004	16-pin Plastic DIP
National Semiconductor	INS4004D	16-pin Ceramic DIP
National Semiconductor	INS4004J	16-pin side-brazed Ceramic DIP
Hitachi	HD35404	16-pin DIP
Microsystems International	MF7114	?

Pinout

Pinout diagram of the Intel 4004

The 4004 has 16 pins that are used for i/o, memory controller, clock phases, power and reset.

Pinout & Description

Pin #	Pin Name	Purpose	Explanation
1	D0	Bidirectional data bus pins	Address and data communication to the ROM and RAM occurs on D0-D3.
2	D1
3	D2
4	D3
5	Vss	Main Supply
6	Clock Phase 1	Clock inputs
7	Clock Phase 2
8	Sync	ROM & RAM Sync	Synchronizes the ROM and RAM by signaling the clock is on the raising edge.
9	Reset	Reset flag	A logic 1 clears all processor status registers and forces the program counter to jump to address 0x0. The RESET signal must be on for at least 64 clock cycles in order to take effect.
10	Test	Test logic state	Signal can be tested via the JCN instruction.
11	CM-ROM	CM-ROM output	ROM selection signal used to retrieve data from memory.
12	VDD	VSS -15±5%
13	CM-RAM3	CM-ROM outputs	Bank selection signal for the 4002 RAM chips in the system.
14	CM-RAM2
15	CM-RAM1
16	CM-RAM0

Designers

Lead designers for the 4004:

• Masatoshi Shima
• Tadashi Sasaki
• Ted Hoff
• Federico Faggin
• Stan Mazor

Die Shot

• 10 µm process
• pMOS transistors
• 2,250 transistors
• 12 mm² die

History and production

National Semiconductor was a second source manufacturer of the 4004, under their part number INS4004.

1968

The origins of the 4004 date back to the the "Busicom Project", which began at Japanese calculator company Busicom in April 1968, when engineer Masatoshi Shima was tasked with designing a special-purpose LSI chipset, along with his supervisor Tadashi Tanba, for use in the Busicom 141-PF desktop calculator with integrated printer. His initial design consisted of seven LSI chips, including a three-chip CPU. His design included arithmetic units (adders), multiplier units, registers, read-only memory (ROM), and a macro-instruction set to control a decimal computer system. Busicom then wanted a general-purpose LSI chipset, for not only desktop calculators, but also other equipment such as an automated teller machine (ATM), cash register and billing machine. Shima thus began work on a general-purpose LSI chipset in late 1968.

Sharp engineer Tadashi Sasaki was also involved with its development, and conceived of a single-chip CPU in 1968, when he discussed the concept at a brainstorming meeting that was held in Japan. Sasaki attributes the basic invention to break the calculator chipset into four parts with ROM (4001), RAM (4002), shift registers (4003) and CPU (4004) to an unnamed woman, a software engineering researcher from Nara Women's College, who was present at the meeting. Sasaki then had his first meeting with Robert Noyce from Intel in 1968, and presented the woman's four-division chipset concept to Intel and Busicom.

1969

Busicom approached the American company Intel for manufacturing help in 1969. Intel, which was more of a memory company back then, had facilities to manufacture the high density silicon gate MOS chip Busicom required.

Shima went to Intel in June 1969 to present his design proposal. Due to Intel lacking logic engineers to understand the logic schematics or circuit engineers to convert them, Intel asked Shima to simplify the logic. Intel wanted a single-chip CPU design, influenced by Sharp's Tadashi Sasaki who presented the concept to Busicom and Intel in 1968. The single-chip microprocessor design was then formulated by Intel's Marcian "Ted" Hoff in 1969, simplifying Shima's initial design down to four chips, including a single-chip CPU. Hoff, head of Intel's Application Research Department, contributed to the architectural proposal for Busicom. When asked where he got his ideas for the architecture, Hoff related that Plessey, "a British tractor company", had donated a minicomputer to Stanford, and he had "played with it some" while he was there.

Due to Hoff's formulation lacking key details, Shima came up with his own ideas to find solutions for its implementation. Shima was responsible for adding a 10-bit static shift register to make it useful as a printer's buffer and keyboard interface, many improvements in the instruction set, making the RAM organization suitable for a calculator, the memory address information transfer, the key program in an area of performance and program capacity, the functional specification, decimal computer idea, software, desktop calculator logic, real-time I/O control, and data exchange instruction between the accumulator and general purpose register. Hoff and Shima eventually realized the 4-bit microprocessor concept together, with the help of Intel's Stanley Mazor to interpret the ideas of Shima and Hoff. The specifications of the four chips were developed over a period of a few months in 1969, between an Intel team led by Hoff and a Busicom team led by Shima.

Intel made further modifications to the design. Serial memories required more components, and would use 40 pins, a packaging standard different from Intel’s own 16-pin standard, and so it was proposed that an updated design produced with standard 16-pin DIP packaging and reduced instruction set be developed, using a newly developed dynamic RAM (DRAM) memory chip. This resulted in the 4004 architecture, which is part of a family of chips, including ROM, DRAM, and serial-to-parallel shift register chips. The 4004 was subsequently designed using silicon gate technology and built of approximately 2,300 transistors.

In late 1969, Shima returned to Japan. After that, Intel had done no further work on the project until early 1970.

1970

Shima returned to Intel in early 1970, and found that no further work had been done on the 4004 since he left, and that Hoff had moved on to other projects. Only a week before Shima had returned to Intel, Federico Faggin had joined Intel and become the project leader. After Shima explained the project to Faggin, they worked together to design the 4004.

Faggin, the sole chip designer among the engineers on the MCS-4 project, was the only one with experience in metal-oxide semiconductor (MOS) random logic and circuit design. He also had the crucial knowledge of the new silicon gate process technology with self-aligned gates, which he had created at Fairchild in 1968. At Fairchild in 1968, Faggin also designed and manufactured the first commercial IC using SGT, the Fairchild 3708. As soon as he joined the Intel MOS Department, he created a new random logic design methodology based on silicon gate, and contributed many technology and circuit design inventions that enabled their single chip microprocessor to become a reality. His methodology set the design style for all the early Intel microprocessors and later for the Zilog Z80. He also led the MCS-4 project and was responsible for its successful outcome (1970–1971). Shima designed the logic and the Busicom calculator firmware, and assisted Faggin during the first six months of the implementation. The manager of Intel's MOS Design Department was Leslie L. Vadász. At the time of the MCS-4 development, Vadasz's attention was completely focused on the mainstream business of semiconductor memories and he left the leadership and the management of the MCS-4 project to Faggin.

Thus, the chief designers of the chip were Faggin who created the design methodology and the silicon-based chip design, Hoff who formulated the architecture before moving on to other projects, and Shima who produced the initial Busicom design and then assisted in the development of the final Intel design.

1971

The 4004 was first introduced in Japan, as the microprocessor for the Busicom 141-PF calculator, in March 1971. In North America, the first public mention of the 4004 was an advertisement in the November 15, 1971 edition of Electronic News, though unconfirmed reports put the date of first delivery as early as March 1971. Packaged in a 16-pin ceramic dual in-line package, the 4004 was the first commercially available computer processor designed and manufactured by chip maker Intel, which had previously made semiconductor memory chips. The 4004 was followed the next year by the first ever 8-bit microprocessor, the 3,500 transistor 8008 (and the 4040, a revised and improved 4004). It was not until the development of the 40-pin 8080 in 1974 that the address and data buses would be separated, giving faster and simpler access to memory.