KaiXian | |
Developer | Zhaoxin, VIA Technologies |
Manufacturer | TSMC, HLMC |
Type | Microprocessors |
Introduction | 2016 (announced) 2016 (launch) |
ISA | x86 |
µarch | Isaiah, Zhangjiang, WuDaoKou, LuJiaZui |
Word size | 64 bit 8 octets
16 nibbles |
Process | 40 nm 0.04 μm , 28 nm4.0e-5 mm 0.028 μm
2.8e-5 mm |
Technology | CMOS |
Succession | |
← | |
QuadCore |
KaiXian (ZX/KX) is a family of x86 microprocessors developed by Zhaoxin for the Chinese market.
Contents
Overview
KaiXian is a family of x86 microprocessors designed by Zhaoxin as part of China's national security initiative which attempts to reduce the reliance on foreign technology (e.g., Intel) and to gain greater control over their intellectual property. Those processors are x86-compatible with Intel's processors and are capable of booting all modern operating systems such as Red Hat Enterprise Linux and Windows 10.
Models
KaiXian ZX-A
- Main article: VIA's Isaiah
KaiXian ZX-A were the first series of processors released by Zhaoxin. Those processors were based on the same architecture as VIA Technologies Isaiah and where manufactured on a 40 nm process. For all practical purposes, those chips are identical to VIA's Nano X2 and QuadCore parts.
KaiXian ZX-B
ZX-B series models were identical to ZX-A except that they are fabricated in mainland China on HLMC's 40 nm process.
KaiXian ZX-C
- Main article: ZhangJiang microarchitecture
ZX-C which is based on the ZhangJiang microarchitecture introduced a number of enhancements including extending the architecture to support up to 8 cores. Since those parts were manufactured on TSMC's 28 nm process, they have lower power consumption and thus higher clock speed.
KaiXian KX-5000
- Main article: WuDaoKou microarchitecture
Announced at the end of 2017, the KX-5000 (formerly ZX-D) introduces the largest set of the improvements. Those SoCs are baased on WuDaoKou, fabricated on HLMC's 28nm, and is considered the first truly zhaoxin-developed architecture. Among the many improvements such as higher integration (incorporating the GPU and memory controller on-die), those processors now support dual-channel DDR4 memory and support supports HD 4K decoding.
See Also
designer | Zhaoxin + and VIA Technologies + |
first announced | 2016 + |
first launched | 2016 + |
full page name | zhaoxin/kaixian + |
instance of | microprocessor family + |
instruction set architecture | x86 + |
main designer | Zhaoxin + |
manufacturer | TSMC + and HLMC + |
microarchitecture | Isaiah +, Zhangjiang +, WuDaoKou + and LuJiaZui + |
name | KaiXian + |
process | 40 nm (0.04 μm, 4.0e-5 mm) + and 28 nm (0.028 μm, 2.8e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |