x86
Instruction Set Architecture

General

• History
• Families

Variants

• x86-16
• x86-32
• x86-64

Topics

• Instructions
• Addressing Modes
• Registers
• Model-Specific Register
• Assembly
• Interrupts
• Micro-Ops
• Timer
• Calling Convention
• Microarchitectures
• CPUID

CPUIDs

• AMD's CPUIDs
• Intel's CPUIDs

Modes

• Real
• Protected
• Long

Extensions(all)

• 3DNow!
• ABM
• ADX
• AES
• AMX
• AVX
• AVX2
• AVX-512
• BMI1
• BMI2
• CLMUL
• E3DNow!
• EMMX
• F16C
• FMA3
• FMA4
• FPU
• MKTME
• MMX
• MPX
• PMEM
• PREFETCH
• RdRAND
• SEV
• SGX
• SHA
• SME
• SMM
• SMX
• SSE
• SSE2
• SSE3
• SSE4.1
• SSE4.2
• SSE4a
• SSE5
• SSSE3
• TBM
• TME
• TSME
• TSX
• XOP

x86 is a family of little-endian variable-length instruction set architectures and extensions. As its namesake indicates, the x86 ISA offers binary compatibility all the way from the original 8086 to modern microarchitectures as well as source code compatibility since the 8080. The x86 architecture is widely used in the desktop and server markets. Today, custom x86-based implementations are designed by a number of companies including Intel, AMD, VIA, Zhaoxin, DM&P, and RDC.

Generally speaking, the term 'x86' is most often used as an umbrella term encompassing the original x86-16, x86-32 (IA-32), x86-64 (AMD64), and the various extensions such as MMX, 3DNOW!, and SSE.

History

Main article: History of x86

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Overview

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Registers

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Quad word (8 bytes)	Double word (4 bytes)	Word (2 bytes)	Byte 1	Byte 0
%rax	%eax	%ax	%ah	%al
%rcx	%ecx	%cx	%ch	%cl
%rdx	%edx	%dx	%dh	%dl
%rbx	%ebx	%bx	%bh	%bl
%rsi	%esi	%si		%sil
%rdi	%edi	%di		%dil
%rsp	%esp	%sp		%spl
%rbp	%ebp	%bp		%bpl
%r8	%r8d	%r8w		%r8b
%r9	%r9d	%r9w		%r9b
%r10	%r10d	%r10w		%r10b
%r11	%r11d	%r11w		%r11b
%r12	%r12d	%r12w		%r12b
%r13	%r13d	%r13w		%r13b
%r14	%r14d	%r14w		%r14b
%r15	%r15d	%r15w		%r15b

Operation Modes

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Instruction Set

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Syntaxes

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Interrupts

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Extensions

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Implementations

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See also

• ARM

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