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A '''tri-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements three independent physical execution units (referred to as [[core]]s) on a single [[die]] or package. | A '''tri-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements three independent physical execution units (referred to as [[core]]s) on a single [[die]] or package. | ||
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== Tri-core models == | == Tri-core models == | ||
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Revision as of 15:51, 28 May 2017
Multi-Core CPUs | |
Many-Core Microprocessor | |
Multi-Core Microprocessor |
A tri-core microprocessor refers to an integrated circuit that implements three independent physical execution units (referred to as cores) on a single die or package.
Tri-core models
List of Tri-Core Processors (40 most recent) | |||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Model | Designer | ISA | Family | Process | µarch | Core | L3$ | L2$ | Launched | Frequency | |||||||||
x86 Processors | |||||||||||||||||||
ARM Processors | |||||||||||||||||||
E2 | Renesas ARM Holdings | ARMv7 SuperH | R-Car | 28 nm 0.028 μm 2.8e-5 mm | Cortex-A7 SH-4A | Cortex-A7 SH-4A | 512 KiB 0.5 MiB 524,288 B 4.882812e-4 GiB | June 2016 | 1 GHz 1,000 MHz 0.78 GHz1,000,000 kHz 780 MHz 780,000 kHz | ||||||||||
M2 | Renesas ARM Holdings | ARMv7 SuperH | R-Car | 28 nm 0.028 μm 2.8e-5 mm | Cortex-A15 SH-4A | Cortex-A15 SH-4A | 2,048 KiB 2 MiB 2,097,152 B 0.00195 GiB | June 2015 | 1.5 GHz 1,500 MHz 1,500,000 kHz | ||||||||||
628 | Marvell | ARMv6 ARMv5 | ARMADA 600 | 55 nm 0.055 μm 5.5e-5 mm | Sheeva PJ4 | Sheeva PJ4 | 1,024 KiB 1 MiB 1,048,576 B 9.765625e-4 GiB | March 2011 | 1.5 GHz 1,500 MHz 0.624 GHz1,500,000 kHz 624 MHz 624,000 kHz | ||||||||||
Count: 3 |