Semiconductor & Computer Engineering
| Multi-Core CPUs | |
| Many-Core | |
| Multi-Core | |
A many-core microprocessor is a microprocessor that comprises of a large number of physical cores with the goal of achieving higher degree of explicit parallelism. The cores need not be identical nor necessarily fully-featured. Manycore processors often focus on optimizing specific aspects such as power or throughput (i.e. optimized for specific types of algorithms or tasks) at the expense of other characteristics (e.g. serial code performance, generality).
The term differs from a multi-core microprocessor which typically contains groups of homogeneous cores designed to deliver high performance for both serial and parallel code, preventing it from making the kind of sacrifices a many-core microprocessor can. The term "many-core" does not denote a specific number of cores but rather their capabilities and intended tasks.
For example the Core i7-6950X is a deca-core processor that would generally be considered a multi-core processor but not a many-core processor, while MIT's 16-core RAW and Tilera's 64-core TILE64 would be both.
Overview[edit]
This article is a work in progress!Initial effort & Polaris[edit]
Intel actual large effort research into the area of many-core started after the February 2004 Intel Developer Forum following Pradeep Dubey famous keynote titled "The Era of Tera". Around the 2004-2005 Intel formed a number of strategic research projects to explorer and study the feasibility and challenges of many-core and tera-scale processing. One of the earliest examples of such project was the Tera-scale Computing Research Program which was unveiled by Justin Rattner, then-CTO, at the spring 2006 Intel Developer Forum.
The first product to come directly from that project was Polaris, an 80-core chip designed using modular tiles that could scale in the x- and y- directions using a routing system that interconnected all the tiles in a mesh topology. Fabricated on a 65 nm process, the chip was around 275 mm² and incorporated around 100M transistors. The chip also attempted to solve some of the inherent problems dealing with a large amount of cores such as the bandwidth. 3D stacked SRAM was utilized to achieve bandwidths of over 1 Tb/s. Operating as high as 5.7 GHz, the chip could reach over 1.8 TFLOPS of sustained performance.
Larrabee[edit]
Research chips[edit]
- chip multiprocessor
- 16 cores - MIT RAW (2002)
- 48 cores - Intel Rock Creek (2009)
- 80 cores - Intel Polaris (2007)
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