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Difference between revisions of "intel/microarchitectures/sapphire rapids"
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|process=7 nm
 
|process=7 nm
 
|process 2=Intel 7
 
|process 2=Intel 7
 +
|cores=6
 +
|cores 2=8
 +
|cores 3=56
 +
|cores 4=60
 
|isa=x86-64
 
|isa=x86-64
 +
|succession=Yes
 
|predecessor=Ice Lake (server)
 
|predecessor=Ice Lake (server)
 
|predecessor link=intel/microarchitectures/ice lake (server)
 
|predecessor link=intel/microarchitectures/ice lake (server)
 +
|predecessor 2=• µarch •
 +
|predecessor 2 link=intel/microarchitectures
 +
|predecessor 3=Sierra Forest
 +
|predecessor 3 link=intel/microarchitectures/sierra forest
 
|successor=Emerald Rapids
 
|successor=Emerald Rapids
 
|successor link=intel/microarchitectures/emerald rapids
 
|successor link=intel/microarchitectures/emerald rapids
−
|succession=Yes
+
|successor 2=Granite Rapids
 +
|successor 2 link=intel/microarchitectures/granite rapids
 +
|successor 3=Diamond Rapids
 +
|successor 3 link=intel/microarchitectures/diamond rapids
 
}}
 
}}
  
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== History ==
 
== History ==
−
[[File:intel 2019 investor meeting sapphire roadmap.png|thumb|right|Intel Xeon Roadmap through 2021.]]
+
[[File:intel 2019 investor meeting sapphire roadmap.png|thumb|left|Intel Xeon Roadmap through 2021]]
−
Sapphire Rapids was first announced during the May 2019 Intel Investor Meeting. Sapphire Rapids was planned to succeed {{\\|Ice Lake (Server)|Ice Lake}} in [[2021]], was however delayed to [[2023]].
+
 
 +
'''Sapphire Rapids''' was first announced during the May [[2019]] [[Intel]] Investor Meeting.  
 +
 
 +
'''Sapphire Rapids''' was planned to succeed {{\\|Ice Lake (Server)|Ice Lake}} in [[2021]], was however delayed to [[2023]].
  
 
== Process Technology ==
 
== Process Technology ==
−
Sapphire Rapids is planned to be manufactured on the [[Intel 7]] ([[7 nm]]) process (previously 10nm Enhanced SuperFin (ESF)).
+
'''Sapphire Rapids''' is planned to be manufactured on the [[Intel 7]] <br>([[7 nm]]) process (previously 10nm Enhanced SuperFin (ESF)).
 +
 
 +
== Models ==
 +
=== Sapphire Rapids-based Xeon Processors===
 +
:;[[Intel]] • [[Xeon]] • {{intel|Roadmap}}
 +
*Introduced in [[2023]], the 4th generation {{intel|Xeon Scalable}} processors ('''Sapphire Rapids-SP''' and '''Sapphire Rapids-HBM''') and <br>'''[[Xeon W]]'''-2400 and W-3400 series ('''Sapphire Rapids-WS''') provide large performance enhancements over the prior generation.
 +
 
 +
{| class="wikitable" style="border:0; font-size:100%; background:white"
 +
|+ [[Intel]] {{intel|Xeon}} Processors Family (Server)
 +
|-
 +
! width="50px!" style="background-color:#dff;" | Sockets
 +
! colspan="3" style="background-color:#dff;" | 1 or 2 Sockets
 +
! colspan="3" style="background-color:#dff;" | 4 or 8 Sockets
 +
|-
 +
! Fab&nbsp;node !! Code named !! # of Cores !! Release date !! Code named !! # of Cores !! Release date
 +
|---- style="background-color:#FDFFC2;"
 +
| rowspan="2" style="text-align:left; vertical-align:center;" | '''[[Intel 7]]'''
 +
| {{intel|Sapphire Rapids|l=arch}} SP/WS/HBM ''(Xeon 4)'' || 6-56 || Jan 2023 || {{intel|Sapphire Rapids|l=arch}} SP ''(Xeon 4)'' || 8-60 || Jan 2023
 +
|---- style="background-color:#FDFFC2;"
 +
| {{intel|Emerald Rapids|l=arch}} SP ''(Xeon 5)'' || 8-64 || Dec 2023 || colspan="3" style="background-color: #FFF; border-width:0;" |
 +
|---- style="background-color:#FDFFC2;"
 +
| rowspan="2" style="text-align:left; vertical-align:center;" | '''Intel 3''' <br>'''[[3 nm]]''' 
 +
| {{intel|Granite Rapids|l=arch}} AP/SP ''(Xeon 6)'' || 64-128 || Oct 2024 || {{intel|Sierra Forest|l=arch}} AP/SP ''(Xeon 6)'' || 64-144 || Oct 2024
 +
|---- style="background-color:#FDFFC2;"
 +
| {{intel|Diamond Rapids|l=arch}} AP/SP || 64-128 || Dec 2025 || colspan="3" style="background-color: #FFF; border-width:0;" |
 +
|----
 +
! colspan="7" | [[Intel]] • {{intel|Atom}} • [[Core]] • {{intel|Roadmap}} • List of Intel Xeon Processors
 +
|-
 +
|}
  
 
== Compiler support ==
 
== Compiler support ==
−
Support for Sapphire Rapids was added in LLVM Clang 12 and GCC 11.
+
Support for '''Sapphire Rapids''' was added in LLVM Clang 12 and GCC 11.
  
 
{| class="wikitable"
 
{| class="wikitable"
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== Architecture ==
 
== Architecture ==
 
=== Key changes from {{\\|Ice Lake (server)|Ice Lake}}===
 
=== Key changes from {{\\|Ice Lake (server)|Ice Lake}}===
−
* [[Intel 7]] (from [[10 nm SuperFIN]])
+
* [[Intel 7]] (from [[10 nm]] [[SuperFIN]])
−
* Core
+
* [[Core]]
 
** {{\\|Sunny Cove}} '''→''' {{\\|Golden Cove}}
 
** {{\\|Sunny Cove}} '''→''' {{\\|Golden Cove}}
 
* New Integration
 
* New Integration
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** DDR5 (from DDR4)
 
** DDR5 (from DDR4)
 
** Optane DC DIMMs
 
** Optane DC DIMMs
−
*** Barlow Pass '''→''' Crow Pass
+
** ''Barlow Pass'' '''→''' ''Crow Pass''
 
* I/O
 
* I/O
 
** PCIe Gen 5.0 (from Gen 4.0)
 
** PCIe Gen 5.0 (from Gen 4.0)

Latest revision as of 18:24, 16 April 2025

Edit Values
Sapphire Rapids µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Introduction2023
Process7 nm, Intel 7
Core Configs6, 8, 56, 60
Instructions
ISAx86-64
Succession

Sapphire Rapids (SPR) is Intel's successor to Ice Lake, a 7 nm microarchitecture for enthusiasts and servers.

History[edit]

Intel Xeon Roadmap through 2021

Sapphire Rapids was first announced during the May 2019 Intel Investor Meeting.

Sapphire Rapids was planned to succeed Ice Lake in 2021, was however delayed to 2023.

Process Technology[edit]

Sapphire Rapids is planned to be manufactured on the Intel 7
(7 nm) process (previously 10nm Enhanced SuperFin (ESF)).

Models[edit]

Sapphire Rapids-based Xeon Processors[edit]

Intel • Xeon • Roadmap
  • Introduced in 2023, the 4th generation Xeon Scalable processors (Sapphire Rapids-SP and Sapphire Rapids-HBM) and
    Xeon W-2400 and W-3400 series (Sapphire Rapids-WS) provide large performance enhancements over the prior generation.
Intel Xeon Processors Family (Server)
Sockets 1 or 2 Sockets 4 or 8 Sockets
Fab node Code named # of Cores Release date Code named # of Cores Release date
Intel 7 Sapphire Rapids SP/WS/HBM (Xeon 4) 6-56 Jan 2023 Sapphire Rapids SP (Xeon 4) 8-60 Jan 2023
Emerald Rapids SP (Xeon 5) 8-64 Dec 2023
Intel 3
3 nm 		Granite Rapids AP/SP (Xeon 6) 64-128 Oct 2024 Sierra Forest AP/SP (Xeon 6) 64-144 Oct 2024
Diamond Rapids AP/SP 64-128 Dec 2025
Intel • Atom • Core • Roadmap • List of Intel Xeon Processors

Compiler support[edit]

Support for Sapphire Rapids was added in LLVM Clang 12 and GCC 11.

Compiler Arch-Specific Arch-Favorable
GCC -march=sapphirerapids -mtune=sapphirerapids
LLVM -march=sapphirerapids -mtune=sapphirerapids

CPUID[edit]

Core Extended
Family 		Family Extended
Model 		Model
SP 0 0x6 0x8 0xF
Family 6 Model 143

Architecture[edit]

Key changes from Ice Lake[edit]

This list is incomplete; you can help by expanding it.

See also[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/sapphire_rapids&oldid=103229"
Facts about "Sapphire Rapids - Microarchitectures - Intel"
RDF feed
codenameSapphire Rapids +
core count6 +, 8 +, 56 + and 60 +
designerIntel +
first launched2023 +
full page nameintel/microarchitectures/sapphire rapids +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameSapphire Rapids +
process7 nm (0.007 μm, 7.0e-6 mm) +